diff --git a/Documentation/how-to-build.rst b/Documentation/how-to-build.rst
index 252c1cf2dd424ad7da9648c0272742b32d453531..1db20eda46d7496588a15b56576b9f2a071821b3 100644
--- a/Documentation/how-to-build.rst
+++ b/Documentation/how-to-build.rst
@@ -1,3 +1,5 @@
+.. _how_to_build:
+
 How To Build
 ============
 If you just want to write MicroPython code for card10, you probably **won't**
@@ -102,6 +104,7 @@ firmware features:
   info related to BLE.
 - ``-Ddebug_core1=true``: Enable the core 1 SWD lines which are exposed on the
   SAO connector.  Only use this if you have a debugger which is modified for core 1.
+- ``-Djailbreak_card10=true``: Enable execution of .elf l0dables on core 1.
 
 .. warning::
 
diff --git a/Documentation/overview.rst b/Documentation/overview.rst
index 5a481989929c32da088f5c96ab97d886d4cfdebc..7fd03bf4aef93b5f18158256db0d964fee5fe607 100644
--- a/Documentation/overview.rst
+++ b/Documentation/overview.rst
@@ -51,6 +51,9 @@ Next to Pycardium, other bare-metal code can also run on core 1.  For example,
 a Rustcardium or C-cardium.  These l0dables must be compiled using our special
 linker script and should link against the api-caller library so they can
 interface with the :ref:`epicardium_api`.
+Note: this feature is disabled by default and has to be enabled at build time.
+To do this, run ``bootstrap.sh`` with the option ``-Djailbreak_card10=true``
+and rebuild the firmware as described in :ref:`how_to_build`.
 
 .. todo::