From 9cbff5a173bc2af21484dd795b7caf32ebfb1818 Mon Sep 17 00:00:00 2001
From: schneider <schneider@blinkenlichts.net>
Date: Tue, 7 May 2019 22:35:26 +0200
Subject: [PATCH] fix(testapp): Initialize ecg interrupt before the ecg chip
---
testapp/main.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/testapp/main.c b/testapp/main.c
index 391b0885..02024deb 100644
--- a/testapp/main.c
+++ b/testapp/main.c
@@ -290,6 +290,14 @@ int main(void)
// Enable 32 kHz output
RTC_SquareWave(MXC_RTC, SQUARE_WAVE_ENABLED, F_32KHZ, NOISE_IMMUNE_MODE, NULL);
+ const gpio_cfg_t interrupt_pin = {PORT_1, PIN_12, GPIO_FUNC_IN, GPIO_PAD_PULL_UP};
+ GPIO_Config(&interrupt_pin);
+ GPIO_RegisterCallback(&interrupt_pin, ecgFIFO_callback, NULL);
+ GPIO_IntConfig(&interrupt_pin, GPIO_INT_EDGE, GPIO_INT_FALLING);
+ GPIO_IntEnable(&interrupt_pin);
+ NVIC_EnableIRQ(MXC_GPIO_GET_IRQ(PORT_1));
+
+
// Enable SPI
sys_cfg_spi_t spi17y_master_cfg;
@@ -325,19 +333,12 @@ int main(void)
const int FIFO_FAST_SAMPLE_MASK = 0x1;
const int ETAG_BITS_MASK = 0x7;
- const gpio_cfg_t interrupt_pin = {PORT_1, PIN_12, GPIO_FUNC_IN, GPIO_PAD_PULL_UP};
- GPIO_Config(&interrupt_pin);
- GPIO_RegisterCallback(&interrupt_pin, ecgFIFO_callback, NULL);
- GPIO_IntConfig(&interrupt_pin, GPIO_INT_EDGE, GPIO_INT_FALLING);
- GPIO_IntEnable(&interrupt_pin);
- NVIC_EnableIRQ(MXC_GPIO_GET_IRQ(PORT_1));
-
while(1) {
#if 1
// Read back ECG samples from the FIFO
- if( ecgFIFOIntFlag || GPIO_InGet(&interrupt_pin) == 0) {
+ if( ecgFIFOIntFlag ) {
ecgFIFOIntFlag = false;
//printf("Int\n");
--
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