MAX32665 SDK Documentation  0.2
Software Development Kit Overview and API Documentation
rtc_regs.h
1 
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39 
40 #ifndef _RTC_REGS_H_
41 #define _RTC_REGS_H_
42 
43 /* **** Includes **** */
44 #include <stdint.h>
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 #if defined (__ICCARM__)
51  #pragma system_include
52 #endif
53 
54 #if defined (__CC_ARM)
55  #pragma anon_unions
56 #endif
57 /*
59  If types are not defined elsewhere (CMSIS) define them here
60 */
61 #ifndef __IO
62 #define __IO volatile
63 #endif
64 #ifndef __I
65 #define __I volatile const
66 #endif
67 #ifndef __O
68 #define __O volatile
69 #endif
70 #ifndef __R
71 #define __R volatile const
72 #endif
73 
75 /* **** Definitions **** */
76 
88 typedef struct {
89  __IO uint32_t sec;
90  __IO uint32_t ssec;
91  __IO uint32_t ras;
92  __IO uint32_t rssa;
93  __IO uint32_t ctrl;
94  __IO uint32_t trim;
95  __IO uint32_t oscctrl;
97 
98 /* Register offsets for module RTC */
105  #define MXC_R_RTC_SEC ((uint32_t)0x00000000UL)
106  #define MXC_R_RTC_SSEC ((uint32_t)0x00000004UL)
107  #define MXC_R_RTC_RAS ((uint32_t)0x00000008UL)
108  #define MXC_R_RTC_RSSA ((uint32_t)0x0000000CUL)
109  #define MXC_R_RTC_CTRL ((uint32_t)0x00000010UL)
110  #define MXC_R_RTC_TRIM ((uint32_t)0x00000014UL)
111  #define MXC_R_RTC_OSCCTRL ((uint32_t)0x00000018UL)
121  #define MXC_F_RTC_SSEC_RTSS_POS 0
122  #define MXC_F_RTC_SSEC_RTSS ((uint32_t)(0xFFUL << MXC_F_RTC_SSEC_RTSS_POS))
132  #define MXC_F_RTC_RAS_RAS_POS 0
133  #define MXC_F_RTC_RAS_RAS ((uint32_t)(0xFFFFFUL << MXC_F_RTC_RAS_RAS_POS))
144  #define MXC_F_RTC_RSSA_RSSA_POS 0
145  #define MXC_F_RTC_RSSA_RSSA ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_RSSA_RSSA_POS))
155  #define MXC_F_RTC_CTRL_RTCE_POS 0
156  #define MXC_F_RTC_CTRL_RTCE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_RTCE_POS))
158  #define MXC_F_RTC_CTRL_ADE_POS 1
159  #define MXC_F_RTC_CTRL_ADE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ADE_POS))
161  #define MXC_F_RTC_CTRL_ASE_POS 2
162  #define MXC_F_RTC_CTRL_ASE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ASE_POS))
164  #define MXC_F_RTC_CTRL_BUSY_POS 3
165  #define MXC_F_RTC_CTRL_BUSY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_BUSY_POS))
167  #define MXC_F_RTC_CTRL_RDY_POS 4
168  #define MXC_F_RTC_CTRL_RDY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_RDY_POS))
170  #define MXC_F_RTC_CTRL_RDYE_POS 5
171  #define MXC_F_RTC_CTRL_RDYE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_RDYE_POS))
173  #define MXC_F_RTC_CTRL_ALDF_POS 6
174  #define MXC_F_RTC_CTRL_ALDF ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ALDF_POS))
176  #define MXC_F_RTC_CTRL_ALSF_POS 7
177  #define MXC_F_RTC_CTRL_ALSF ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ALSF_POS))
179  #define MXC_F_RTC_CTRL_SQE_POS 8
180  #define MXC_F_RTC_CTRL_SQE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SQE_POS))
182  #define MXC_F_RTC_CTRL_FT_POS 9
183  #define MXC_F_RTC_CTRL_FT ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_FT_POS))
184  #define MXC_V_RTC_CTRL_FT_FREQ1HZ ((uint32_t)0x0UL)
185  #define MXC_S_RTC_CTRL_FT_FREQ1HZ (MXC_V_RTC_CTRL_FT_FREQ1HZ << MXC_F_RTC_CTRL_FT_POS)
186  #define MXC_V_RTC_CTRL_FT_FREQ512HZ ((uint32_t)0x1UL)
187  #define MXC_S_RTC_CTRL_FT_FREQ512HZ (MXC_V_RTC_CTRL_FT_FREQ512HZ << MXC_F_RTC_CTRL_FT_POS)
188  #define MXC_V_RTC_CTRL_FT_FREQ4KHZ ((uint32_t)0x2UL)
189  #define MXC_S_RTC_CTRL_FT_FREQ4KHZ (MXC_V_RTC_CTRL_FT_FREQ4KHZ << MXC_F_RTC_CTRL_FT_POS)
190  #define MXC_V_RTC_CTRL_FT_CLKDIV8 ((uint32_t)0x3UL)
191  #define MXC_S_RTC_CTRL_FT_CLKDIV8 (MXC_V_RTC_CTRL_FT_CLKDIV8 << MXC_F_RTC_CTRL_FT_POS)
193  #define MXC_F_RTC_CTRL_X32KMD_POS 11
194  #define MXC_F_RTC_CTRL_X32KMD ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_X32KMD_POS))
195  #define MXC_V_RTC_CTRL_X32KMD_NOISEIMMUNEMODE ((uint32_t)0x0UL)
196  #define MXC_S_RTC_CTRL_X32KMD_NOISEIMMUNEMODE (MXC_V_RTC_CTRL_X32KMD_NOISEIMMUNEMODE << MXC_F_RTC_CTRL_X32KMD_POS)
197  #define MXC_V_RTC_CTRL_X32KMD_QUIETMODE ((uint32_t)0x1UL)
198  #define MXC_S_RTC_CTRL_X32KMD_QUIETMODE (MXC_V_RTC_CTRL_X32KMD_QUIETMODE << MXC_F_RTC_CTRL_X32KMD_POS)
199  #define MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPWITHWARMUP ((uint32_t)0x2UL)
200  #define MXC_S_RTC_CTRL_X32KMD_QUIETINSTOPWITHWARMUP (MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPWITHWARMUP << MXC_F_RTC_CTRL_X32KMD_POS)
201  #define MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPNOWARMUP ((uint32_t)0x3UL)
202  #define MXC_S_RTC_CTRL_X32KMD_QUIETINSTOPNOWARMUP (MXC_V_RTC_CTRL_X32KMD_QUIETINSTOPNOWARMUP << MXC_F_RTC_CTRL_X32KMD_POS)
204  #define MXC_F_RTC_CTRL_WE_POS 15
205  #define MXC_F_RTC_CTRL_WE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_WE_POS))
215  #define MXC_F_RTC_TRIM_TRIM_POS 0
216  #define MXC_F_RTC_TRIM_TRIM ((uint32_t)(0xFFUL << MXC_F_RTC_TRIM_TRIM_POS))
218  #define MXC_F_RTC_TRIM_VBATTMR_POS 8
219  #define MXC_F_RTC_TRIM_VBATTMR ((uint32_t)(0xFFFFFFUL << MXC_F_RTC_TRIM_VBATTMR_POS))
229  #define MXC_F_RTC_OSCCTRL_FLITER_EN_POS 0
230  #define MXC_F_RTC_OSCCTRL_FLITER_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_FLITER_EN_POS))
232  #define MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS 1
233  #define MXC_F_RTC_OSCCTRL_IBIAS_SEL ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_SEL_POS))
235  #define MXC_F_RTC_OSCCTRL_HYST_EN_POS 2
236  #define MXC_F_RTC_OSCCTRL_HYST_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_HYST_EN_POS))
238  #define MXC_F_RTC_OSCCTRL_IBIAS_EN_POS 3
239  #define MXC_F_RTC_OSCCTRL_IBIAS_EN ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_IBIAS_EN_POS))
241  #define MXC_F_RTC_OSCCTRL_BYPASS_POS 4
242  #define MXC_F_RTC_OSCCTRL_BYPASS ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_BYPASS_POS))
244  #define MXC_F_RTC_OSCCTRL_32KOUT_POS 5
245  #define MXC_F_RTC_OSCCTRL_32KOUT ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_32KOUT_POS))
249 #ifdef __cplusplus
250 }
251 #endif
252 
253 #endif /* _RTC_REGS_H_ */
__IO uint32_t ctrl
0x10: RTC CTRL Register
Definition: rtc_regs.h:93
Structure type to access the RTC Registers.
Definition: rtc_regs.h:88
__IO uint32_t ssec
0x04: RTC SSEC Register
Definition: rtc_regs.h:90
__IO uint32_t oscctrl
0x18: RTC OSCCTRL Register
Definition: rtc_regs.h:95
__IO uint32_t rssa
0x0C: RTC RSSA Register
Definition: rtc_regs.h:92
__IO uint32_t trim
0x14: RTC TRIM Register
Definition: rtc_regs.h:94
__IO uint32_t sec
0x00: RTC SEC Register
Definition: rtc_regs.h:89
__IO uint32_t ras
0x08: RTC RAS Register
Definition: rtc_regs.h:91