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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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Registers, Bit Masks and Bit Positions for the PWRSEQ Peripheral Module. More...
Modules | |
Register Offsets | |
PWRSEQ Peripheral Register Offsets from the PWRSEQ Base Peripheral Address. | |
PWRSEQ_LPCN | |
Low Power Control Register. | |
PWRSEQ_LPWKST0 | |
Low Power I/O Wakeup Status Register 0. | |
PWRSEQ_LPWKEN0 | |
Low Power I/O Wakeup Enable Register 0. | |
PWRSEQ_LPPWST | |
Low Power Peripheral Wakeup Status Register. | |
PWRSEQ_LPPWEN | |
Low Power Peripheral Wakeup Enable Register. | |
PWRSEQ_LPMEMSD | |
Low Power Memory Shutdown Control. | |
PWRSEQ_LPVDDPD | |
Low Power VDD Domain Power Down Control. | |
Data Structures | |
struct | mxc_pwrseq_regs_t |
Structure type to access the PWRSEQ Registers. More... | |
Power Sequencer / Low Power Control Register.