40 #ifndef _SPI17Y_REGS_H_ 41 #define _SPI17Y_REGS_H_ 50 #if defined (__ICCARM__) 51 #pragma system_include 54 #if defined (__CC_ARM) 65 #define __I volatile const 71 #define __R volatile const 91 __IO uint16_t data16[2];
92 __IO uint8_t data8[4];
99 __R uint32_t rsv_0x18;
115 #define MXC_R_SPI17Y_DATA32 ((uint32_t)0x00000000UL) 116 #define MXC_R_SPI17Y_DATA16 ((uint32_t)0x00000000UL) 117 #define MXC_R_SPI17Y_DATA8 ((uint32_t)0x00000000UL) 118 #define MXC_R_SPI17Y_CTRL0 ((uint32_t)0x00000004UL) 119 #define MXC_R_SPI17Y_CTRL1 ((uint32_t)0x00000008UL) 120 #define MXC_R_SPI17Y_CTRL2 ((uint32_t)0x0000000CUL) 121 #define MXC_R_SPI17Y_SS_TIME ((uint32_t)0x00000010UL) 122 #define MXC_R_SPI17Y_CLK_CFG ((uint32_t)0x00000014UL) 123 #define MXC_R_SPI17Y_DMA ((uint32_t)0x0000001CUL) 124 #define MXC_R_SPI17Y_INT_FL ((uint32_t)0x00000020UL) 125 #define MXC_R_SPI17Y_INT_EN ((uint32_t)0x00000024UL) 126 #define MXC_R_SPI17Y_WAKE_FL ((uint32_t)0x00000028UL) 127 #define MXC_R_SPI17Y_WAKE_EN ((uint32_t)0x0000002CUL) 128 #define MXC_R_SPI17Y_STAT ((uint32_t)0x00000030UL) 137 #define MXC_F_SPI17Y_DATA32_DATA_POS 0 138 #define MXC_F_SPI17Y_DATA32_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_SPI17Y_DATA32_DATA_POS)) 148 #define MXC_F_SPI17Y_DATA16_DATA_POS 0 149 #define MXC_F_SPI17Y_DATA16_DATA ((uint16_t)(0xFFFFUL << MXC_F_SPI17Y_DATA16_DATA_POS)) 159 #define MXC_F_SPI17Y_DATA8_DATA_POS 0 160 #define MXC_F_SPI17Y_DATA8_DATA ((uint8_t)(0xFFUL << MXC_F_SPI17Y_DATA8_DATA_POS)) 170 #define MXC_F_SPI17Y_CTRL0_EN_POS 0 171 #define MXC_F_SPI17Y_CTRL0_EN ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL0_EN_POS)) 173 #define MXC_F_SPI17Y_CTRL0_MASTER_POS 1 174 #define MXC_F_SPI17Y_CTRL0_MASTER ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL0_MASTER_POS)) 176 #define MXC_F_SPI17Y_CTRL0_SS_IO_POS 4 177 #define MXC_F_SPI17Y_CTRL0_SS_IO ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL0_SS_IO_POS)) 179 #define MXC_F_SPI17Y_CTRL0_START_POS 5 180 #define MXC_F_SPI17Y_CTRL0_START ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL0_START_POS)) 182 #define MXC_F_SPI17Y_CTRL0_SS_CTRL_POS 8 183 #define MXC_F_SPI17Y_CTRL0_SS_CTRL ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL0_SS_CTRL_POS)) 185 #define MXC_F_SPI17Y_CTRL0_SS_POS 16 186 #define MXC_F_SPI17Y_CTRL0_SS ((uint32_t)(0xFUL << MXC_F_SPI17Y_CTRL0_SS_POS)) 187 #define MXC_V_SPI17Y_CTRL0_SS_SS0 ((uint32_t)0x1UL) 188 #define MXC_S_SPI17Y_CTRL0_SS_SS0 (MXC_V_SPI17Y_CTRL0_SS_SS0 << MXC_F_SPI17Y_CTRL0_SS_POS) 189 #define MXC_V_SPI17Y_CTRL0_SS_SS1 ((uint32_t)0x2UL) 190 #define MXC_S_SPI17Y_CTRL0_SS_SS1 (MXC_V_SPI17Y_CTRL0_SS_SS1 << MXC_F_SPI17Y_CTRL0_SS_POS) 191 #define MXC_V_SPI17Y_CTRL0_SS_SS2 ((uint32_t)0x4UL) 192 #define MXC_S_SPI17Y_CTRL0_SS_SS2 (MXC_V_SPI17Y_CTRL0_SS_SS2 << MXC_F_SPI17Y_CTRL0_SS_POS) 193 #define MXC_V_SPI17Y_CTRL0_SS_SS3 ((uint32_t)0x8UL) 194 #define MXC_S_SPI17Y_CTRL0_SS_SS3 (MXC_V_SPI17Y_CTRL0_SS_SS3 << MXC_F_SPI17Y_CTRL0_SS_POS) 204 #define MXC_F_SPI17Y_CTRL1_TX_NUM_CHAR_POS 0 205 #define MXC_F_SPI17Y_CTRL1_TX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPI17Y_CTRL1_TX_NUM_CHAR_POS)) 207 #define MXC_F_SPI17Y_CTRL1_RX_NUM_CHAR_POS 16 208 #define MXC_F_SPI17Y_CTRL1_RX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPI17Y_CTRL1_RX_NUM_CHAR_POS)) 218 #define MXC_F_SPI17Y_CTRL2_CPHA_POS 0 219 #define MXC_F_SPI17Y_CTRL2_CPHA ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL2_CPHA_POS)) 221 #define MXC_F_SPI17Y_CTRL2_CPOL_POS 1 222 #define MXC_F_SPI17Y_CTRL2_CPOL ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL2_CPOL_POS)) 224 #define MXC_F_SPI17Y_CTRL2_SCLK_INV_POS 4 225 #define MXC_F_SPI17Y_CTRL2_SCLK_INV ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL2_SCLK_INV_POS)) 227 #define MXC_F_SPI17Y_CTRL2_NUMBITS_POS 8 228 #define MXC_F_SPI17Y_CTRL2_NUMBITS ((uint32_t)(0xFUL << MXC_F_SPI17Y_CTRL2_NUMBITS_POS)) 229 #define MXC_V_SPI17Y_CTRL2_NUMBITS_0 ((uint32_t)0x0UL) 230 #define MXC_S_SPI17Y_CTRL2_NUMBITS_0 (MXC_V_SPI17Y_CTRL2_NUMBITS_0 << MXC_F_SPI17Y_CTRL2_NUMBITS_POS) 232 #define MXC_F_SPI17Y_CTRL2_DATA_WIDTH_POS 12 233 #define MXC_F_SPI17Y_CTRL2_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPI17Y_CTRL2_DATA_WIDTH_POS)) 234 #define MXC_V_SPI17Y_CTRL2_DATA_WIDTH_MONO ((uint32_t)0x0UL) 235 #define MXC_S_SPI17Y_CTRL2_DATA_WIDTH_MONO (MXC_V_SPI17Y_CTRL2_DATA_WIDTH_MONO << MXC_F_SPI17Y_CTRL2_DATA_WIDTH_POS) 236 #define MXC_V_SPI17Y_CTRL2_DATA_WIDTH_DUAL ((uint32_t)0x1UL) 237 #define MXC_S_SPI17Y_CTRL2_DATA_WIDTH_DUAL (MXC_V_SPI17Y_CTRL2_DATA_WIDTH_DUAL << MXC_F_SPI17Y_CTRL2_DATA_WIDTH_POS) 238 #define MXC_V_SPI17Y_CTRL2_DATA_WIDTH_QUAD ((uint32_t)0x2UL) 239 #define MXC_S_SPI17Y_CTRL2_DATA_WIDTH_QUAD (MXC_V_SPI17Y_CTRL2_DATA_WIDTH_QUAD << MXC_F_SPI17Y_CTRL2_DATA_WIDTH_POS) 241 #define MXC_F_SPI17Y_CTRL2_THREE_WIRE_POS 15 242 #define MXC_F_SPI17Y_CTRL2_THREE_WIRE ((uint32_t)(0x1UL << MXC_F_SPI17Y_CTRL2_THREE_WIRE_POS)) 244 #define MXC_F_SPI17Y_CTRL2_SS_POL_POS 16 245 #define MXC_F_SPI17Y_CTRL2_SS_POL ((uint32_t)(0xFFUL << MXC_F_SPI17Y_CTRL2_SS_POL_POS)) 246 #define MXC_V_SPI17Y_CTRL2_SS_POL_SS0_HIGH ((uint32_t)0x1UL) 247 #define MXC_S_SPI17Y_CTRL2_SS_POL_SS0_HIGH (MXC_V_SPI17Y_CTRL2_SS_POL_SS0_HIGH << MXC_F_SPI17Y_CTRL2_SS_POL_POS) 248 #define MXC_V_SPI17Y_CTRL2_SS_POL_SS1_HIGH ((uint32_t)0x2UL) 249 #define MXC_S_SPI17Y_CTRL2_SS_POL_SS1_HIGH (MXC_V_SPI17Y_CTRL2_SS_POL_SS1_HIGH << MXC_F_SPI17Y_CTRL2_SS_POL_POS) 250 #define MXC_V_SPI17Y_CTRL2_SS_POL_SS2_HIGH ((uint32_t)0x4UL) 251 #define MXC_S_SPI17Y_CTRL2_SS_POL_SS2_HIGH (MXC_V_SPI17Y_CTRL2_SS_POL_SS2_HIGH << MXC_F_SPI17Y_CTRL2_SS_POL_POS) 252 #define MXC_V_SPI17Y_CTRL2_SS_POL_SS3_HIGH ((uint32_t)0x8UL) 253 #define MXC_S_SPI17Y_CTRL2_SS_POL_SS3_HIGH (MXC_V_SPI17Y_CTRL2_SS_POL_SS3_HIGH << MXC_F_SPI17Y_CTRL2_SS_POL_POS) 255 #define MXC_F_SPI17Y_CTRL2_SRPOL_POS 24 256 #define MXC_F_SPI17Y_CTRL2_SRPOL ((uint32_t)(0xFFUL << MXC_F_SPI17Y_CTRL2_SRPOL_POS)) 257 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR0_HIGH ((uint32_t)0x1UL) 258 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR0_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR0_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 259 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR1_HIGH ((uint32_t)0x2UL) 260 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR1_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR1_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 261 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR2_HIGH ((uint32_t)0x4UL) 262 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR2_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR2_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 263 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR3_HIGH ((uint32_t)0x8UL) 264 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR3_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR3_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 265 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR4_HIGH ((uint32_t)0x10UL) 266 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR4_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR4_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 267 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR5_HIGH ((uint32_t)0x20UL) 268 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR5_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR5_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 269 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR6_HIGH ((uint32_t)0x40UL) 270 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR6_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR6_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 271 #define MXC_V_SPI17Y_CTRL2_SRPOL_SR7_HIGH ((uint32_t)0x80UL) 272 #define MXC_S_SPI17Y_CTRL2_SRPOL_SR7_HIGH (MXC_V_SPI17Y_CTRL2_SRPOL_SR7_HIGH << MXC_F_SPI17Y_CTRL2_SRPOL_POS) 282 #define MXC_F_SPI17Y_SS_TIME_PRE_POS 0 283 #define MXC_F_SPI17Y_SS_TIME_PRE ((uint32_t)(0xFFUL << MXC_F_SPI17Y_SS_TIME_PRE_POS)) 284 #define MXC_V_SPI17Y_SS_TIME_PRE_256 ((uint32_t)0x0UL) 285 #define MXC_S_SPI17Y_SS_TIME_PRE_256 (MXC_V_SPI17Y_SS_TIME_PRE_256 << MXC_F_SPI17Y_SS_TIME_PRE_POS) 287 #define MXC_F_SPI17Y_SS_TIME_POST_POS 8 288 #define MXC_F_SPI17Y_SS_TIME_POST ((uint32_t)(0xFFUL << MXC_F_SPI17Y_SS_TIME_POST_POS)) 289 #define MXC_V_SPI17Y_SS_TIME_POST_256 ((uint32_t)0x0UL) 290 #define MXC_S_SPI17Y_SS_TIME_POST_256 (MXC_V_SPI17Y_SS_TIME_POST_256 << MXC_F_SPI17Y_SS_TIME_POST_POS) 292 #define MXC_F_SPI17Y_SS_TIME_INACT_POS 16 293 #define MXC_F_SPI17Y_SS_TIME_INACT ((uint32_t)(0xFFUL << MXC_F_SPI17Y_SS_TIME_INACT_POS)) 294 #define MXC_V_SPI17Y_SS_TIME_INACT_256 ((uint32_t)0x0UL) 295 #define MXC_S_SPI17Y_SS_TIME_INACT_256 (MXC_V_SPI17Y_SS_TIME_INACT_256 << MXC_F_SPI17Y_SS_TIME_INACT_POS) 305 #define MXC_F_SPI17Y_CLK_CFG_LO_POS 0 306 #define MXC_F_SPI17Y_CLK_CFG_LO ((uint32_t)(0xFFUL << MXC_F_SPI17Y_CLK_CFG_LO_POS)) 307 #define MXC_V_SPI17Y_CLK_CFG_LO_DIS ((uint32_t)0x0UL) 308 #define MXC_S_SPI17Y_CLK_CFG_LO_DIS (MXC_V_SPI17Y_CLK_CFG_LO_DIS << MXC_F_SPI17Y_CLK_CFG_LO_POS) 310 #define MXC_F_SPI17Y_CLK_CFG_HI_POS 8 311 #define MXC_F_SPI17Y_CLK_CFG_HI ((uint32_t)(0xFFUL << MXC_F_SPI17Y_CLK_CFG_HI_POS)) 312 #define MXC_V_SPI17Y_CLK_CFG_HI_DIS ((uint32_t)0x0UL) 313 #define MXC_S_SPI17Y_CLK_CFG_HI_DIS (MXC_V_SPI17Y_CLK_CFG_HI_DIS << MXC_F_SPI17Y_CLK_CFG_HI_POS) 315 #define MXC_F_SPI17Y_CLK_CFG_SCALE_POS 16 316 #define MXC_F_SPI17Y_CLK_CFG_SCALE ((uint32_t)(0xFUL << MXC_F_SPI17Y_CLK_CFG_SCALE_POS)) 326 #define MXC_F_SPI17Y_DMA_TX_FIFO_LEVEL_POS 0 327 #define MXC_F_SPI17Y_DMA_TX_FIFO_LEVEL ((uint32_t)(0x1FUL << MXC_F_SPI17Y_DMA_TX_FIFO_LEVEL_POS)) 329 #define MXC_F_SPI17Y_DMA_TX_FIFO_EN_POS 6 330 #define MXC_F_SPI17Y_DMA_TX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPI17Y_DMA_TX_FIFO_EN_POS)) 332 #define MXC_F_SPI17Y_DMA_TX_FIFO_CLEAR_POS 7 333 #define MXC_F_SPI17Y_DMA_TX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPI17Y_DMA_TX_FIFO_CLEAR_POS)) 335 #define MXC_F_SPI17Y_DMA_TX_FIFO_CNT_POS 8 336 #define MXC_F_SPI17Y_DMA_TX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPI17Y_DMA_TX_FIFO_CNT_POS)) 338 #define MXC_F_SPI17Y_DMA_TX_DMA_EN_POS 15 339 #define MXC_F_SPI17Y_DMA_TX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPI17Y_DMA_TX_DMA_EN_POS)) 341 #define MXC_F_SPI17Y_DMA_RX_FIFO_LEVEL_POS 16 342 #define MXC_F_SPI17Y_DMA_RX_FIFO_LEVEL ((uint32_t)(0x1FUL << MXC_F_SPI17Y_DMA_RX_FIFO_LEVEL_POS)) 344 #define MXC_F_SPI17Y_DMA_RX_FIFO_EN_POS 22 345 #define MXC_F_SPI17Y_DMA_RX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPI17Y_DMA_RX_FIFO_EN_POS)) 347 #define MXC_F_SPI17Y_DMA_RX_FIFO_CLEAR_POS 23 348 #define MXC_F_SPI17Y_DMA_RX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPI17Y_DMA_RX_FIFO_CLEAR_POS)) 350 #define MXC_F_SPI17Y_DMA_RX_FIFO_CNT_POS 24 351 #define MXC_F_SPI17Y_DMA_RX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPI17Y_DMA_RX_FIFO_CNT_POS)) 353 #define MXC_F_SPI17Y_DMA_RX_DMA_EN_POS 31 354 #define MXC_F_SPI17Y_DMA_RX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPI17Y_DMA_RX_DMA_EN_POS)) 365 #define MXC_F_SPI17Y_INT_FL_TX_THRESH_POS 0 366 #define MXC_F_SPI17Y_INT_FL_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_TX_THRESH_POS)) 368 #define MXC_F_SPI17Y_INT_FL_TX_EMPTY_POS 1 369 #define MXC_F_SPI17Y_INT_FL_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_TX_EMPTY_POS)) 371 #define MXC_F_SPI17Y_INT_FL_RX_THRESH_POS 2 372 #define MXC_F_SPI17Y_INT_FL_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_RX_THRESH_POS)) 374 #define MXC_F_SPI17Y_INT_FL_RX_FULL_POS 3 375 #define MXC_F_SPI17Y_INT_FL_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_RX_FULL_POS)) 377 #define MXC_F_SPI17Y_INT_FL_SSA_POS 4 378 #define MXC_F_SPI17Y_INT_FL_SSA ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_SSA_POS)) 380 #define MXC_F_SPI17Y_INT_FL_SSD_POS 5 381 #define MXC_F_SPI17Y_INT_FL_SSD ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_SSD_POS)) 383 #define MXC_F_SPI17Y_INT_FL_FAULT_POS 8 384 #define MXC_F_SPI17Y_INT_FL_FAULT ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_FAULT_POS)) 386 #define MXC_F_SPI17Y_INT_FL_ABORT_POS 9 387 #define MXC_F_SPI17Y_INT_FL_ABORT ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_ABORT_POS)) 389 #define MXC_F_SPI17Y_INT_FL_M_DONE_POS 11 390 #define MXC_F_SPI17Y_INT_FL_M_DONE ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_M_DONE_POS)) 392 #define MXC_F_SPI17Y_INT_FL_TX_OVR_POS 12 393 #define MXC_F_SPI17Y_INT_FL_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_TX_OVR_POS)) 395 #define MXC_F_SPI17Y_INT_FL_TX_UND_POS 13 396 #define MXC_F_SPI17Y_INT_FL_TX_UND ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_TX_UND_POS)) 398 #define MXC_F_SPI17Y_INT_FL_RX_OVR_POS 14 399 #define MXC_F_SPI17Y_INT_FL_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_RX_OVR_POS)) 401 #define MXC_F_SPI17Y_INT_FL_RX_UND_POS 15 402 #define MXC_F_SPI17Y_INT_FL_RX_UND ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_FL_RX_UND_POS)) 412 #define MXC_F_SPI17Y_INT_EN_TX_THRESH_POS 0 413 #define MXC_F_SPI17Y_INT_EN_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_TX_THRESH_POS)) 415 #define MXC_F_SPI17Y_INT_EN_TX_EMPTY_POS 1 416 #define MXC_F_SPI17Y_INT_EN_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_TX_EMPTY_POS)) 418 #define MXC_F_SPI17Y_INT_EN_RX_THRESH_POS 2 419 #define MXC_F_SPI17Y_INT_EN_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_RX_THRESH_POS)) 421 #define MXC_F_SPI17Y_INT_EN_RX_FULL_POS 3 422 #define MXC_F_SPI17Y_INT_EN_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_RX_FULL_POS)) 424 #define MXC_F_SPI17Y_INT_EN_SSA_POS 4 425 #define MXC_F_SPI17Y_INT_EN_SSA ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_SSA_POS)) 427 #define MXC_F_SPI17Y_INT_EN_SSD_POS 5 428 #define MXC_F_SPI17Y_INT_EN_SSD ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_SSD_POS)) 430 #define MXC_F_SPI17Y_INT_EN_FAULT_POS 8 431 #define MXC_F_SPI17Y_INT_EN_FAULT ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_FAULT_POS)) 433 #define MXC_F_SPI17Y_INT_EN_ABORT_POS 9 434 #define MXC_F_SPI17Y_INT_EN_ABORT ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_ABORT_POS)) 436 #define MXC_F_SPI17Y_INT_EN_M_DONE_POS 11 437 #define MXC_F_SPI17Y_INT_EN_M_DONE ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_M_DONE_POS)) 439 #define MXC_F_SPI17Y_INT_EN_TX_OVR_POS 12 440 #define MXC_F_SPI17Y_INT_EN_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_TX_OVR_POS)) 442 #define MXC_F_SPI17Y_INT_EN_TX_UND_POS 13 443 #define MXC_F_SPI17Y_INT_EN_TX_UND ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_TX_UND_POS)) 445 #define MXC_F_SPI17Y_INT_EN_RX_OVR_POS 14 446 #define MXC_F_SPI17Y_INT_EN_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_RX_OVR_POS)) 448 #define MXC_F_SPI17Y_INT_EN_RX_UND_POS 15 449 #define MXC_F_SPI17Y_INT_EN_RX_UND ((uint32_t)(0x1UL << MXC_F_SPI17Y_INT_EN_RX_UND_POS)) 459 #define MXC_F_SPI17Y_WAKE_FL_TX_THRESH_POS 0 460 #define MXC_F_SPI17Y_WAKE_FL_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_FL_TX_THRESH_POS)) 462 #define MXC_F_SPI17Y_WAKE_FL_TX_EMPTY_POS 1 463 #define MXC_F_SPI17Y_WAKE_FL_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_FL_TX_EMPTY_POS)) 465 #define MXC_F_SPI17Y_WAKE_FL_RX_THRESH_POS 2 466 #define MXC_F_SPI17Y_WAKE_FL_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_FL_RX_THRESH_POS)) 468 #define MXC_F_SPI17Y_WAKE_FL_RX_FULL_POS 3 469 #define MXC_F_SPI17Y_WAKE_FL_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_FL_RX_FULL_POS)) 479 #define MXC_F_SPI17Y_WAKE_EN_TX_THRESH_POS 0 480 #define MXC_F_SPI17Y_WAKE_EN_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_EN_TX_THRESH_POS)) 482 #define MXC_F_SPI17Y_WAKE_EN_TX_EMPTY_POS 1 483 #define MXC_F_SPI17Y_WAKE_EN_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_EN_TX_EMPTY_POS)) 485 #define MXC_F_SPI17Y_WAKE_EN_RX_THRESH_POS 2 486 #define MXC_F_SPI17Y_WAKE_EN_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_EN_RX_THRESH_POS)) 488 #define MXC_F_SPI17Y_WAKE_EN_RX_FULL_POS 3 489 #define MXC_F_SPI17Y_WAKE_EN_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI17Y_WAKE_EN_RX_FULL_POS)) 499 #define MXC_F_SPI17Y_STAT_BUSY_POS 0 500 #define MXC_F_SPI17Y_STAT_BUSY ((uint32_t)(0x1UL << MXC_F_SPI17Y_STAT_BUSY_POS)) __IO uint32_t clk_cfg
0x14: SPI17Y CLK_CFG Register
Definition: spi17y_regs.h:98
__IO uint32_t int_en
0x24: SPI17Y INT_EN Register
Definition: spi17y_regs.h:102
__IO uint32_t ctrl0
0x04: SPI17Y CTRL0 Register
Definition: spi17y_regs.h:94
__IO uint32_t data32
0x00: SPI17Y DATA32 Register
Definition: spi17y_regs.h:90
__IO uint32_t wake_fl
0x28: SPI17Y WAKE_FL Register
Definition: spi17y_regs.h:103
__I uint32_t stat
0x30: SPI17Y STAT Register
Definition: spi17y_regs.h:105
__IO uint32_t dma
0x1C: SPI17Y DMA Register
Definition: spi17y_regs.h:100
__IO uint32_t wake_en
0x2C: SPI17Y WAKE_EN Register
Definition: spi17y_regs.h:104
__IO uint32_t ss_time
0x10: SPI17Y SS_TIME Register
Definition: spi17y_regs.h:97
Structure type to access the SPI17Y Registers.
Definition: spi17y_regs.h:88
__IO uint32_t ctrl2
0x0C: SPI17Y CTRL2 Register
Definition: spi17y_regs.h:96
__IO uint32_t int_fl
0x20: SPI17Y INT_FL Register
Definition: spi17y_regs.h:101
__IO uint32_t ctrl1
0x08: SPI17Y CTRL1 Register
Definition: spi17y_regs.h:95