MAX32665 SDK Documentation  0.2
Software Development Kit Overview and API Documentation
mxc_gpio_regs_t Struct Reference

Structure type to access the GPIO Registers.

#include <gpio_regs.h>

Data Fields

__IO uint32_t en
 0x00: GPIO EN Register
 
__IO uint32_t en_set
 0x04: GPIO EN_SET Register
 
__IO uint32_t en_clr
 0x08: GPIO EN_CLR Register
 
__IO uint32_t out_en
 0x0C: GPIO OUT_EN Register
 
__IO uint32_t out_en_set
 0x10: GPIO OUT_EN_SET Register
 
__IO uint32_t out_en_clr
 0x14: GPIO OUT_EN_CLR Register
 
__IO uint32_t out
 0x18: GPIO OUT Register
 
__O uint32_t out_set
 0x1C: GPIO OUT_SET Register
 
__O uint32_t out_clr
 0x20: GPIO OUT_CLR Register
 
__I uint32_t in
 0x24: GPIO IN Register
 
__IO uint32_t int_mod
 0x28: GPIO INT_MOD Register
 
__IO uint32_t int_pol
 0x2C: GPIO INT_POL Register
 
__R uint32_t rsv_0x30
 
__IO uint32_t int_en
 0x34: GPIO INT_EN Register
 
__IO uint32_t int_en_set
 0x38: GPIO INT_EN_SET Register
 
__IO uint32_t int_en_clr
 0x3C: GPIO INT_EN_CLR Register
 
__I uint32_t int_stat
 0x40: GPIO INT_STAT Register
 
__R uint32_t rsv_0x44
 
__IO uint32_t int_clr
 0x48: GPIO INT_CLR Register
 
__IO uint32_t wake_en
 0x4C: GPIO WAKE_EN Register
 
__IO uint32_t wake_en_set
 0x50: GPIO WAKE_EN_SET Register
 
__IO uint32_t wake_en_clr
 0x54: GPIO WAKE_EN_CLR Register
 
__R uint32_t rsv_0x58
 
__IO uint32_t int_dual_edge
 0x5C: GPIO INT_DUAL_EDGE Register
 
__IO uint32_t pad_cfg1
 0x60: GPIO PAD_CFG1 Register
 
__IO uint32_t pad_cfg2
 0x64: GPIO PAD_CFG2 Register
 
__IO uint32_t en1
 0x68: GPIO EN1 Register
 
__IO uint32_t en1_set
 0x6C: GPIO EN1_SET Register
 
__IO uint32_t en1_clr
 0x70: GPIO EN1_CLR Register
 
__IO uint32_t en2
 0x74: GPIO EN2 Register
 
__IO uint32_t en2_set
 0x78: GPIO EN2_SET Register
 
__IO uint32_t en2_clr
 0x7C: GPIO EN2_CLR Register
 
__R uint32_t rsv_0x80_0xa7 [10]
 
__IO uint32_t is
 0xA8: GPIO IS Register
 
__IO uint32_t sr
 0xAC: GPIO SR Register
 
__IO uint32_t ds
 0xB0: GPIO DS Register
 
__IO uint32_t ds1
 0xB4: GPIO DS1 Register
 
__IO uint32_t ps
 0xB8: GPIO PS Register
 
__R uint32_t rsv_0xbc
 
__IO uint32_t vssel
 0xC0: GPIO VSSEL Register
 

The documentation for this struct was generated from the following file: