49 #include "uart_regs.h" 56 #define UART_ALTERNATE_CLOCK_HZ 7372800 123 #if (TARGET != 32660) 135 uart_parity_t parity;
141 #if (TARGET != 32660) Non-blocking UART transaction request.
Definition: uart.h:149
Use the device's alternate UART bit rate clock.
Definition: uart.h:128
Use for mark parity 0.
Definition: uart.h:78
Conventional odd parity.
Definition: uart.h:77
UART configuration type.
Definition: uart.h:134
uart_flow_ctrl_t
Flow control.
Definition: uart.h:111
void UART_Disable(mxc_uart_regs_t *uart)
Disable the UART.
uart_stop_t
Stop bit settings.
Definition: uart.h:103
void UART_Enable(mxc_uart_regs_t *uart)
Enables the UART.
UART Stop 1.5 clock cycle.
Definition: uart.h:105
#define MXC_S_UART_CTRL_CHAR_SIZE_6
CTRL_CHAR_SIZE_6 Setting.
Definition: uart_regs.h:160
uint8_t UART_ReadByte(mxc_uart_regs_t *uart)
Read a single byte from the UART.
void UART_DrainTX(mxc_uart_regs_t *uart)
Drains/empties any data in the TX FIFO, discarding any bytes not yet transmitted. ...
#define MXC_S_UART_CTRL_PARITY_EVEN
CTRL_PARITY_EVEN Setting.
Definition: uart_regs.h:135
UART Configuration Object.
Definition: mxc_sys.h:186
#define MXC_S_UART_CTRL_CHAR_SIZE_8
CTRL_CHAR_SIZE_8 Setting.
Definition: uart_regs.h:164
int UART_Write(mxc_uart_regs_t *uart, const uint8_t *data, int len)
Write UART data.
Use for mark parity 1.
Definition: uart.h:81
uart_flow_pol_t pol
Configure hardware flow control.
Definition: uart.h:139
Data Size 7 Bits.
Definition: uart.h:97
uint32_t baud
Configure hardware flow control.
Definition: uart.h:140
void UART_DrainRX(mxc_uart_regs_t *uart)
Drains/empties and data in the RX FIFO, discarding any bytes not yet consumed.
uart_size_t size
Configure parity checking.
Definition: uart.h:136
uart_parity_t
Parity settings type.
Definition: uart.h:64
Use for odd parity 1.
Definition: uart.h:75
#define MXC_S_UART_CTRL_CHAR_SIZE_5
CTRL_CHAR_SIZE_5 Setting.
Definition: uart_regs.h:158
Conventional mark parity.
Definition: uart.h:83
int UART_Read(mxc_uart_regs_t *uart, uint8_t *data, int len, int *num)
Read UART data, blocking until transaction is complete.
#define MXC_F_UART_CTRL_FLOW_CTRL
CTRL_FLOW_CTRL Mask.
Definition: uart_regs.h:170
Data Size 6 Bits.
Definition: uart.h:96
#define MXC_S_UART_CTRL_PARITY_MARK
CTRL_PARITY_MARK Setting.
Definition: uart_regs.h:139
int UART_Init(mxc_uart_regs_t *uart, const uart_cfg_t *cfg, const sys_cfg_uart_t *sys_cfg)
Initialize and enable UART module.
RTS/CTS asserted is high.
Definition: uart.h:120
Parity disabled.
Definition: uart.h:65
#define MXC_F_UART_CTRL_FLOW_POL
CTRL_FLOW_POL Mask.
Definition: uart_regs.h:173
int UART_Busy(mxc_uart_regs_t *uart)
Check to see if the UART is busy.
int num
Length of characters in data to send or receive.
Definition: uart.h:152
Conventional space parity.
Definition: uart.h:89
Use for space parity 1.
Definition: uart.h:87
Conventional even parity.
Definition: uart.h:71
uart_stop_t stop
Configure character size.
Definition: uart.h:137
Use for odd parity 0.
Definition: uart.h:72
uart_flow_ctrl_t flow
Configure the number of stop bits to use.
Definition: uart.h:138
int UART_ReadAsync(mxc_uart_regs_t *uart, uart_req_t *req)
Asynchronously read UART data.
unsigned UART_NumReadAvail(mxc_uart_regs_t *uart)
Returns the number of bytes available to be read from the RX FIFO.
uart_size_t
Message size settings.
Definition: uart.h:94
Use for even parity 1.
Definition: uart.h:69
uart_clksel_t clksel
Configure baud rate.
Definition: uart.h:142
void UART_ClearFlags(mxc_uart_regs_t *uart, uint32_t mask)
Clears the specified interrupt flags.
int UART_WriteAsync(mxc_uart_regs_t *uart, uart_req_t *req)
Asynchronously write/transmit UART data.
Structure type to access the UART Registers.
Definition: uart_regs.h:88
unsigned UART_GetFlags(mxc_uart_regs_t *uart)
Get the UART interrupt flags.
#define MXC_F_UART_CTRL_CLKSEL
CTRL_CLKSEL Mask.
Definition: uart_regs.h:182
#define MXC_S_UART_CTRL_PARITY_SPACE
CTRL_PARITY_SPACE Setting.
Definition: uart_regs.h:141
void UART_WriteByte(mxc_uart_regs_t *uart, uint8_t data)
Write one byte at a time to the UART.
int UART_Shutdown(mxc_uart_regs_t *uart)
Shutdown UART module.
Peripheral clock will be used as the bit rate clock.
Definition: uart.h:127
RTS/CTS flow is enabled.
Definition: uart.h:113
uart_clksel_t
Clock Source Select.
Definition: uart.h:126
#define MXC_S_UART_CTRL_CHAR_SIZE_7
CTRL_CHAR_SIZE_7 Setting.
Definition: uart_regs.h:162
Data Size 5 Bits.
Definition: uart.h:95
Data Size 8 Bits.
Definition: uart.h:98
int UART_AbortAsync(uart_req_t *req)
Abort asynchronous request.
void(* callback)(uart_req_t *, int)
Number of characters actually sent or received.
Definition: uart.h:161
UART Stop 1 clock cycle.
Definition: uart.h:104
#define MXC_F_UART_CTRL_PARITY_EN
CTRL_PARITY_EN Mask.
Definition: uart_regs.h:130
#define MXC_F_UART_CTRL_PARMD
CTRL_PARMD Mask.
Definition: uart_regs.h:144
#define MXC_S_UART_CTRL_PARITY_ODD
CTRL_PARITY_ODD Setting.
Definition: uart_regs.h:137
#define MXC_F_UART_CTRL_STOPBITS
CTRL_STOPBITS Mask.
Definition: uart_regs.h:167
int len
Data buffer for characters.
Definition: uart.h:151
void UART_Handler(mxc_uart_regs_t *uart)
UART interrupt handler.
unsigned UART_NumWriteAvail(mxc_uart_regs_t *uart)
Returns the number of bytes still pending transmission in the UART TX FIFO.
Use for even parity 0.
Definition: uart.h:66
int UART_PrepForSleep(mxc_uart_regs_t *uart)
Prepare the UART for entry into a Low-Power mode (DEEPSLEEP/BACKUP).
RTS/CTS flow is disabled.
Definition: uart.h:112
RTS/CTS asserted is low.
Definition: uart.h:119
Use for space parity 0.
Definition: uart.h:84
UART Stop 2 clock cycle.
Definition: uart.h:106
uart_flow_pol_t
Flow control Polarity.
Definition: uart.h:118