50 #if defined (__ICCARM__) 51 #pragma system_include 54 #if defined (__CC_ARM) 65 #define __I volatile const 71 #define __R volatile const 104 #define MXC_R_TMR_CNT ((uint32_t)0x00000000UL) 105 #define MXC_R_TMR_CMP ((uint32_t)0x00000004UL) 106 #define MXC_R_TMR_PWM ((uint32_t)0x00000008UL) 107 #define MXC_R_TMR_INTR ((uint32_t)0x0000000CUL) 108 #define MXC_R_TMR_CN ((uint32_t)0x00000010UL) 109 #define MXC_R_TMR_NOLCMP ((uint32_t)0x00000014UL) 119 #define MXC_F_TMR_INTR_IRQ_CLR_POS 0 120 #define MXC_F_TMR_INTR_IRQ_CLR ((uint32_t)(0x1UL << MXC_F_TMR_INTR_IRQ_CLR_POS)) 130 #define MXC_F_TMR_CN_TMODE_POS 0 131 #define MXC_F_TMR_CN_TMODE ((uint32_t)(0x7UL << MXC_F_TMR_CN_TMODE_POS)) 132 #define MXC_V_TMR_CN_TMODE_ONESHOT ((uint32_t)0x0UL) 133 #define MXC_S_TMR_CN_TMODE_ONESHOT (MXC_V_TMR_CN_TMODE_ONESHOT << MXC_F_TMR_CN_TMODE_POS) 134 #define MXC_V_TMR_CN_TMODE_CONTINUOUS ((uint32_t)0x1UL) 135 #define MXC_S_TMR_CN_TMODE_CONTINUOUS (MXC_V_TMR_CN_TMODE_CONTINUOUS << MXC_F_TMR_CN_TMODE_POS) 136 #define MXC_V_TMR_CN_TMODE_COUNTER ((uint32_t)0x2UL) 137 #define MXC_S_TMR_CN_TMODE_COUNTER (MXC_V_TMR_CN_TMODE_COUNTER << MXC_F_TMR_CN_TMODE_POS) 138 #define MXC_V_TMR_CN_TMODE_PWM ((uint32_t)0x3UL) 139 #define MXC_S_TMR_CN_TMODE_PWM (MXC_V_TMR_CN_TMODE_PWM << MXC_F_TMR_CN_TMODE_POS) 140 #define MXC_V_TMR_CN_TMODE_CAPTURE ((uint32_t)0x4UL) 141 #define MXC_S_TMR_CN_TMODE_CAPTURE (MXC_V_TMR_CN_TMODE_CAPTURE << MXC_F_TMR_CN_TMODE_POS) 142 #define MXC_V_TMR_CN_TMODE_COMPARE ((uint32_t)0x5UL) 143 #define MXC_S_TMR_CN_TMODE_COMPARE (MXC_V_TMR_CN_TMODE_COMPARE << MXC_F_TMR_CN_TMODE_POS) 144 #define MXC_V_TMR_CN_TMODE_GATED ((uint32_t)0x6UL) 145 #define MXC_S_TMR_CN_TMODE_GATED (MXC_V_TMR_CN_TMODE_GATED << MXC_F_TMR_CN_TMODE_POS) 146 #define MXC_V_TMR_CN_TMODE_CAPTURECOMPARE ((uint32_t)0x7UL) 147 #define MXC_S_TMR_CN_TMODE_CAPTURECOMPARE (MXC_V_TMR_CN_TMODE_CAPTURECOMPARE << MXC_F_TMR_CN_TMODE_POS) 149 #define MXC_F_TMR_CN_PRES_POS 3 150 #define MXC_F_TMR_CN_PRES ((uint32_t)(0x7UL << MXC_F_TMR_CN_PRES_POS)) 151 #define MXC_V_TMR_CN_PRES_DIV1 ((uint32_t)0x0UL) 152 #define MXC_S_TMR_CN_PRES_DIV1 (MXC_V_TMR_CN_PRES_DIV1 << MXC_F_TMR_CN_PRES_POS) 153 #define MXC_V_TMR_CN_PRES_DIV2 ((uint32_t)0x1UL) 154 #define MXC_S_TMR_CN_PRES_DIV2 (MXC_V_TMR_CN_PRES_DIV2 << MXC_F_TMR_CN_PRES_POS) 155 #define MXC_V_TMR_CN_PRES_DIV4 ((uint32_t)0x2UL) 156 #define MXC_S_TMR_CN_PRES_DIV4 (MXC_V_TMR_CN_PRES_DIV4 << MXC_F_TMR_CN_PRES_POS) 157 #define MXC_V_TMR_CN_PRES_DIV8 ((uint32_t)0x3UL) 158 #define MXC_S_TMR_CN_PRES_DIV8 (MXC_V_TMR_CN_PRES_DIV8 << MXC_F_TMR_CN_PRES_POS) 159 #define MXC_V_TMR_CN_PRES_DIV16 ((uint32_t)0x4UL) 160 #define MXC_S_TMR_CN_PRES_DIV16 (MXC_V_TMR_CN_PRES_DIV16 << MXC_F_TMR_CN_PRES_POS) 161 #define MXC_V_TMR_CN_PRES_DIV32 ((uint32_t)0x5UL) 162 #define MXC_S_TMR_CN_PRES_DIV32 (MXC_V_TMR_CN_PRES_DIV32 << MXC_F_TMR_CN_PRES_POS) 163 #define MXC_V_TMR_CN_PRES_DIV64 ((uint32_t)0x6UL) 164 #define MXC_S_TMR_CN_PRES_DIV64 (MXC_V_TMR_CN_PRES_DIV64 << MXC_F_TMR_CN_PRES_POS) 165 #define MXC_V_TMR_CN_PRES_DIV128 ((uint32_t)0x7UL) 166 #define MXC_S_TMR_CN_PRES_DIV128 (MXC_V_TMR_CN_PRES_DIV128 << MXC_F_TMR_CN_PRES_POS) 168 #define MXC_F_TMR_CN_TPOL_POS 6 169 #define MXC_F_TMR_CN_TPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_TPOL_POS)) 171 #define MXC_F_TMR_CN_TEN_POS 7 172 #define MXC_F_TMR_CN_TEN ((uint32_t)(0x1UL << MXC_F_TMR_CN_TEN_POS)) 174 #define MXC_F_TMR_CN_PRES3_POS 8 175 #define MXC_F_TMR_CN_PRES3 ((uint32_t)(0x1UL << MXC_F_TMR_CN_PRES3_POS)) 177 #define MXC_F_TMR_CN_PWMSYNC_POS 9 178 #define MXC_F_TMR_CN_PWMSYNC ((uint32_t)(0x1UL << MXC_F_TMR_CN_PWMSYNC_POS)) 180 #define MXC_F_TMR_CN_NOLHPOL_POS 10 181 #define MXC_F_TMR_CN_NOLHPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_NOLHPOL_POS)) 183 #define MXC_F_TMR_CN_NOLLPOL_POS 11 184 #define MXC_F_TMR_CN_NOLLPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_NOLLPOL_POS)) 186 #define MXC_F_TMR_CN_PWMCKBD_POS 12 187 #define MXC_F_TMR_CN_PWMCKBD ((uint32_t)(0x1UL << MXC_F_TMR_CN_PWMCKBD_POS)) 197 #define MXC_F_TMR_NOLCMP_NOLLCMP_POS 0 198 #define MXC_F_TMR_NOLCMP_NOLLCMP ((uint32_t)(0xFFUL << MXC_F_TMR_NOLCMP_NOLLCMP_POS)) 200 #define MXC_F_TMR_NOLCMP_NOLHCMP_POS 8 201 #define MXC_F_TMR_NOLCMP_NOLHCMP ((uint32_t)(0xFFUL << MXC_F_TMR_NOLCMP_NOLHCMP_POS)) __IO uint32_t cmp
0x04: TMR CMP Register
Definition: tmr_regs.h:90
__IO uint32_t cnt
0x00: TMR CNT Register
Definition: tmr_regs.h:89
__IO uint32_t nolcmp
0x14: TMR NOLCMP Register
Definition: tmr_regs.h:94
__IO uint32_t intr
0x0C: TMR INTR Register
Definition: tmr_regs.h:92
__IO uint32_t pwm
0x08: TMR PWM Register
Definition: tmr_regs.h:91
Structure type to access the TMR Registers.
Definition: tmr_regs.h:88
__IO uint32_t cn
0x10: TMR CN Register
Definition: tmr_regs.h:93