MAX32665 SDK Documentation  0.2
Software Development Kit Overview and API Documentation
pt.h
1 
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41 
42 /* Define to prevent redundant inclusion */
43 #ifndef _PT_H_
44 #define _PT_H_
45 
46 /* **** Includes **** */
47 #include "mxc_config.h"
48 #include "ptg_regs.h"
49 #include "pt_regs.h"
50 #include "mxc_assert.h"
51 #include "mxc_sys.h"
52 
53 #ifdef __cplusplus
54 extern "C" {
55 #endif
56 
65 typedef enum {
66  ENABLE_PT0 = MXC_F_PTG_ENABLE_PT0,
67  ENABLE_PT1 = MXC_F_PTG_ENABLE_PT1,
68  ENABLE_PT2 = MXC_F_PTG_ENABLE_PT2,
69  ENABLE_PT3 = MXC_F_PTG_ENABLE_PT3,
70  ENABLE_PT4 = MXC_F_PTG_ENABLE_PT4,
71  ENABLE_PT5 = MXC_F_PTG_ENABLE_PT5,
72  ENABLE_PT6 = MXC_F_PTG_ENABLE_PT6,
73  ENABLE_PT7 = MXC_F_PTG_ENABLE_PT7,
74  ENABLE_PT8 = MXC_F_PTG_ENABLE_PT8,
75  ENABLE_PT9 = MXC_F_PTG_ENABLE_PT9,
76  ENABLE_PT10 = MXC_F_PTG_ENABLE_PT10,
77  ENABLE_PT11 = MXC_F_PTG_ENABLE_PT11,
78  ENABLE_PT12 = MXC_F_PTG_ENABLE_PT12,
79  ENABLE_PT13 = MXC_F_PTG_ENABLE_PT13,
80  ENABLE_PT14 = MXC_F_PTG_ENABLE_PT14,
81  ENABLE_PT15 = MXC_F_PTG_ENABLE_PT15,
82 } sys_pt_en_t;
83 
85 typedef enum {
86  RESYNC_PT0 = MXC_F_PTG_RESYNC_PT0,
87  RESYNC_PT1 = MXC_F_PTG_RESYNC_PT1,
88  RESYNC_PT2 = MXC_F_PTG_RESYNC_PT2,
89  RESYNC_PT3 = MXC_F_PTG_RESYNC_PT3,
90  RESYNC_PT4 = MXC_F_PTG_RESYNC_PT4,
91  RESYNC_PT5 = MXC_F_PTG_RESYNC_PT5,
92  RESYNC_PT6 = MXC_F_PTG_RESYNC_PT6,
93  RESYNC_PT7 = MXC_F_PTG_RESYNC_PT7,
94  RESYNC_PT8 = MXC_F_PTG_RESYNC_PT8,
95  RESYNC_PT9 = MXC_F_PTG_RESYNC_PT9,
96  RESYNC_PT10 = MXC_F_PTG_RESYNC_PT10,
97  RESYNC_PT11 = MXC_F_PTG_RESYNC_PT11,
98  RESYNC_PT12 = MXC_F_PTG_RESYNC_PT12,
99  RESYNC_PT13 = MXC_F_PTG_RESYNC_PT13,
100  RESYNC_PT14 = MXC_F_PTG_RESYNC_PT14,
101  RESYNC_PT15 = MXC_F_PTG_RESYNC_PT15,
107 typedef struct {
108  uint32_t bps;
109  uint32_t pattern;
110  uint8_t ptLength;
111  uint16_t loop;
112  uint16_t loopDelay;
113 } pt_pt_cfg_t;
114 
121 void PT_Init(mxc_ptg_regs_t *ptg,const sys_cfg_ptg_t* sys_cfg);
122 
137 int PT_PTConfig(mxc_pt_regs_t *pt, pt_pt_cfg_t *cfg, const sys_cfg_pt_t *sysCfg);
138 
150 int PT_SqrWaveConfig(mxc_pt_regs_t *pt, uint32_t freq, const sys_cfg_pt_t *sysCfg);
151 
156 void PT_Start(mxc_pt_regs_t *pt);
157 
164 void PT_StartMulti(mxc_ptg_regs_t *ptg, uint32_t pts);
165 
170 void PT_Stop(mxc_pt_regs_t *pt);
171 
178 void PT_StopMulti(mxc_ptg_regs_t *ptg, uint32_t pts);
179 
186 uint32_t PT_IsActive(mxc_pt_regs_t *pt);
187 
196 uint32_t PT_IsActiveMulti(mxc_ptg_regs_t *ptg, uint32_t pts);
197 
205 void PT_SetPattern(mxc_pt_regs_t *pt, uint32_t pattern);
206 
214 float PT_GetBPS(mxc_pt_regs_t *pt);
215 
221 void PT_EnableINT(mxc_pt_regs_t *pt);
222 
231 void PT_EnableINTMulti(mxc_ptg_regs_t *ptg, uint32_t pts);
232 
238 void PT_DisableINT(mxc_pt_regs_t *pt);
239 
248 void PT_DisableINTMulti(mxc_ptg_regs_t *ptg, uint32_t pts);
249 
256 uint32_t PT_GetFlags(mxc_ptg_regs_t *ptg);
257 
264 void PT_ClearFlags(mxc_ptg_regs_t *ptg, uint32_t mask);
265 
276 void PT_SetRestart(mxc_pt_regs_t *ptToRestart, mxc_pt_regs_t *ptStop, uint8_t restartIndex);
277 
284 void PT_RestartDisable(mxc_pt_regs_t *ptToRestart, uint8_t restartIndex);
285 
293 void PT_Resync(mxc_ptg_regs_t *ptg, uint32_t resyncPts);
294 
297 #ifdef __cplusplus
298 }
299 #endif
300 
301 #endif /* _PT_H_ */
Resync PT7.
Definition: pt.h:93
Enable PT6.
Definition: pt.h:72
void PT_EnableINT(mxc_pt_regs_t *pt)
Enable pulse train interrupt.
Structure type for configuring a GPIO port.
Definition: gpio.h:138
Enable PT11.
Definition: pt.h:77
void PT_DisableINTMulti(mxc_ptg_regs_t *ptg, uint32_t pts)
Disable interrupts for the pulse trains selected.
Enable PT5.
Definition: pt.h:71
uint8_t ptLength
Number of bits in pulse train, 0 = 32bits, 1 = non valid , 2 = 2 bits, ...
Definition: pt.h:110
Resync PT3.
Definition: pt.h:89
Structure type for pulse train mode configuration.
Definition: pt.h:107
float PT_GetBPS(mxc_pt_regs_t *pt)
Sets the pattern of the pulse train.
uint16_t loop
Number of times to repeat the train, 0 = continuous.
Definition: pt.h:111
sys_pt_en_t
Pulse Train ENable enumeration.
Definition: pt.h:65
Resync PT1.
Definition: pt.h:87
Resync PT11.
Definition: pt.h:97
sys_pt_resync_t
Pulse Train Resync enumeration.
Definition: pt.h:85
Resync PT2.
Definition: pt.h:88
int PT_PTConfig(mxc_pt_regs_t *pt, pt_pt_cfg_t *cfg, const sys_cfg_pt_t *sysCfg)
Configures the pulse train in the specified mode.
void PT_Start(mxc_pt_regs_t *pt)
Starts the pulse train specified.
Enable PT2.
Definition: pt.h:68
Resync PT9.
Definition: pt.h:95
uint32_t bps
pulse train bit rate
Definition: pt.h:108
Resync PT6.
Definition: pt.h:92
Enable PT3.
Definition: pt.h:69
Resync PT14.
Definition: pt.h:100
void PT_SetPattern(mxc_pt_regs_t *pt, uint32_t pattern)
Sets the pattern of the pulse train.
Resync PT12.
Definition: pt.h:98
void PT_Resync(mxc_ptg_regs_t *ptg, uint32_t resyncPts)
Resynchronize individual pulse trains together.
Resync PT13.
Definition: pt.h:99
Resync PT4.
Definition: pt.h:90
Enable PT1.
Definition: pt.h:67
void PT_Init(mxc_ptg_regs_t *ptg, const sys_cfg_ptg_t *sys_cfg)
This function initializes the pulse trains to a known stopped state and sets the global PT clock scal...
void PT_RestartDisable(mxc_pt_regs_t *ptToRestart, uint8_t restartIndex)
Disable the restart for the specified pulse train.
Resync PT8.
Definition: pt.h:94
Enable PT0.
Definition: pt.h:66
void PT_EnableINTMulti(mxc_ptg_regs_t *ptg, uint32_t pts)
Enable interrupts for the pulse trains selected.
void PT_StartMulti(mxc_ptg_regs_t *ptg, uint32_t pts)
Start multiple pulse train modules together.
void PT_DisableINT(mxc_pt_regs_t *pt)
Disable pulse train interrupt.
Enable PT13.
Definition: pt.h:79
Enable PT14.
Definition: pt.h:80
Enable PT15.
Definition: pt.h:81
uint32_t pattern
Output pattern to shift out, starts at LSB.
Definition: pt.h:109
Resync PT0.
Definition: pt.h:86
Resync PT15.
Definition: pt.h:101
uint32_t PT_GetFlags(mxc_ptg_regs_t *ptg)
Gets the pulse trains' interrupt flags.
Enable PT12.
Definition: pt.h:78
void PT_StopMulti(mxc_ptg_regs_t *ptg, uint32_t pts)
Stop multiple pulse trains together.
Resync PT10.
Definition: pt.h:96
uint32_t PT_IsActive(mxc_pt_regs_t *pt)
Determines if the pulse train is running.
Enable PT10.
Definition: pt.h:76
Enable PT7.
Definition: pt.h:73
Enable PT4.
Definition: pt.h:70
uint16_t loopDelay
Delay between loops specified in multiples of bps.
Definition: pt.h:112
Enable PT9.
Definition: pt.h:75
Resync PT5.
Definition: pt.h:91
Structure type to access the PT Registers.
Definition: pt_regs.h:88
uint32_t PT_IsActiveMulti(mxc_ptg_regs_t *ptg, uint32_t pts)
Determines if the pulse trains selected are running.
void PT_SetRestart(mxc_pt_regs_t *ptToRestart, mxc_pt_regs_t *ptStop, uint8_t restartIndex)
Setup and enables a pulse train to restart after another pulse train has exited its loop...
Enable PT8.
Definition: pt.h:74
int PT_SqrWaveConfig(mxc_pt_regs_t *pt, uint32_t freq, const sys_cfg_pt_t *sysCfg)
Configures the pulse train in the square wave mode.
void PT_Stop(mxc_pt_regs_t *pt)
Stops a pulse train.
void PT_ClearFlags(mxc_ptg_regs_t *ptg, uint32_t mask)
Clears the pulse trains' interrupt flag.