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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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MAA Control Register. More...
Macros | |
#define | MXC_F_TPU_MAA_CTRL_STC_POS 0 |
MAA_CTRL_STC Position. | |
#define | MXC_F_TPU_MAA_CTRL_STC ((uint32_t)(0x1UL << MXC_F_TPU_MAA_CTRL_STC_POS)) |
MAA_CTRL_STC Mask. | |
#define | MXC_F_TPU_MAA_CTRL_CLC_POS 1 |
MAA_CTRL_CLC Position. | |
#define | MXC_F_TPU_MAA_CTRL_CLC ((uint32_t)(0x7UL << MXC_F_TPU_MAA_CTRL_CLC_POS)) |
MAA_CTRL_CLC Mask. | |
#define | MXC_V_TPU_MAA_CTRL_CLC_EXP ((uint32_t)0x0UL) |
MAA_CTRL_CLC_EXP Value. | |
#define | MXC_S_TPU_MAA_CTRL_CLC_EXP (MXC_V_TPU_MAA_CTRL_CLC_EXP << MXC_F_TPU_MAA_CTRL_CLC_POS) |
MAA_CTRL_CLC_EXP Setting. | |
#define | MXC_V_TPU_MAA_CTRL_CLC_SQ ((uint32_t)0x1UL) |
MAA_CTRL_CLC_SQ Value. | |
#define | MXC_S_TPU_MAA_CTRL_CLC_SQ (MXC_V_TPU_MAA_CTRL_CLC_SQ << MXC_F_TPU_MAA_CTRL_CLC_POS) |
MAA_CTRL_CLC_SQ Setting. | |
#define | MXC_V_TPU_MAA_CTRL_CLC_MUL ((uint32_t)0x2UL) |
MAA_CTRL_CLC_MUL Value. | |
#define | MXC_S_TPU_MAA_CTRL_CLC_MUL (MXC_V_TPU_MAA_CTRL_CLC_MUL << MXC_F_TPU_MAA_CTRL_CLC_POS) |
MAA_CTRL_CLC_MUL Setting. | |
#define | MXC_V_TPU_MAA_CTRL_CLC_SQMUL ((uint32_t)0x3UL) |
MAA_CTRL_CLC_SQMUL Value. | |
#define | MXC_S_TPU_MAA_CTRL_CLC_SQMUL (MXC_V_TPU_MAA_CTRL_CLC_SQMUL << MXC_F_TPU_MAA_CTRL_CLC_POS) |
MAA_CTRL_CLC_SQMUL Setting. | |
#define | MXC_V_TPU_MAA_CTRL_CLC_ADD ((uint32_t)0x4UL) |
MAA_CTRL_CLC_ADD Value. | |
#define | MXC_S_TPU_MAA_CTRL_CLC_ADD (MXC_V_TPU_MAA_CTRL_CLC_ADD << MXC_F_TPU_MAA_CTRL_CLC_POS) |
MAA_CTRL_CLC_ADD Setting. | |
#define | MXC_V_TPU_MAA_CTRL_CLC_SUB ((uint32_t)0x5UL) |
MAA_CTRL_CLC_SUB Value. | |
#define | MXC_S_TPU_MAA_CTRL_CLC_SUB (MXC_V_TPU_MAA_CTRL_CLC_SUB << MXC_F_TPU_MAA_CTRL_CLC_POS) |
MAA_CTRL_CLC_SUB Setting. | |
#define | MXC_F_TPU_MAA_CTRL_OCALC_POS 4 |
MAA_CTRL_OCALC Position. | |
#define | MXC_F_TPU_MAA_CTRL_OCALC ((uint32_t)(0x1UL << MXC_F_TPU_MAA_CTRL_OCALC_POS)) |
MAA_CTRL_OCALC Mask. | |
#define | MXC_F_TPU_MAA_CTRL_MAAER_POS 7 |
MAA_CTRL_MAAER Position. | |
#define | MXC_F_TPU_MAA_CTRL_MAAER ((uint32_t)(0x1UL << MXC_F_TPU_MAA_CTRL_MAAER_POS)) |
MAA_CTRL_MAAER Mask. | |
#define | MXC_F_TPU_MAA_CTRL_AMS_POS 8 |
MAA_CTRL_AMS Position. | |
#define | MXC_F_TPU_MAA_CTRL_AMS ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_AMS_POS)) |
MAA_CTRL_AMS Mask. | |
#define | MXC_F_TPU_MAA_CTRL_BMS_POS 10 |
MAA_CTRL_BMS Position. | |
#define | MXC_F_TPU_MAA_CTRL_BMS ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_BMS_POS)) |
MAA_CTRL_BMS Mask. | |
#define | MXC_F_TPU_MAA_CTRL_EMS_POS 12 |
MAA_CTRL_EMS Position. | |
#define | MXC_F_TPU_MAA_CTRL_EMS ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_EMS_POS)) |
MAA_CTRL_EMS Mask. | |
#define | MXC_F_TPU_MAA_CTRL_MMS_POS 14 |
MAA_CTRL_MMS Position. | |
#define | MXC_F_TPU_MAA_CTRL_MMS ((uint32_t)(0x3UL << MXC_F_TPU_MAA_CTRL_MMS_POS)) |
MAA_CTRL_MMS Mask. | |
#define | MXC_F_TPU_MAA_CTRL_AMA_POS 16 |
MAA_CTRL_AMA Position. | |
#define | MXC_F_TPU_MAA_CTRL_AMA ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_AMA_POS)) |
MAA_CTRL_AMA Mask. | |
#define | MXC_F_TPU_MAA_CTRL_BMA_POS 20 |
MAA_CTRL_BMA Position. | |
#define | MXC_F_TPU_MAA_CTRL_BMA ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_BMA_POS)) |
MAA_CTRL_BMA Mask. | |
#define | MXC_F_TPU_MAA_CTRL_RMA_POS 24 |
MAA_CTRL_RMA Position. | |
#define | MXC_F_TPU_MAA_CTRL_RMA ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_RMA_POS)) |
MAA_CTRL_RMA Mask. | |
#define | MXC_F_TPU_MAA_CTRL_TMA_POS 28 |
MAA_CTRL_TMA Position. | |
#define | MXC_F_TPU_MAA_CTRL_TMA ((uint32_t)(0xFUL << MXC_F_TPU_MAA_CTRL_TMA_POS)) |
MAA_CTRL_TMA Mask. | |