50 #if defined (__ICCARM__) 51 #pragma system_include 54 #if defined (__CC_ARM) 65 #define __I volatile const 71 #define __R volatile const 91 __R uint32_t rsv_0x8_0xff[62];
93 __R uint32_t rsv_0x104_0x6ff[383];
104 #define MXC_R_ICC_CACHE_ID ((uint32_t)0x00000000UL) 105 #define MXC_R_ICC_MEMCFG ((uint32_t)0x00000004UL) 106 #define MXC_R_ICC_CACHE_CTRL ((uint32_t)0x00000100UL) 107 #define MXC_R_ICC_INVALIDATE ((uint32_t)0x00000700UL) 116 #define MXC_F_ICC_CACHE_ID_RELNUM_POS 0 117 #define MXC_F_ICC_CACHE_ID_RELNUM ((uint32_t)(0x3FUL << MXC_F_ICC_CACHE_ID_RELNUM_POS)) 119 #define MXC_F_ICC_CACHE_ID_PARTNUM_POS 6 120 #define MXC_F_ICC_CACHE_ID_PARTNUM ((uint32_t)(0xFUL << MXC_F_ICC_CACHE_ID_PARTNUM_POS)) 122 #define MXC_F_ICC_CACHE_ID_CCHID_POS 10 123 #define MXC_F_ICC_CACHE_ID_CCHID ((uint32_t)(0x3FUL << MXC_F_ICC_CACHE_ID_CCHID_POS)) 133 #define MXC_F_ICC_MEMCFG_CCHSZ_POS 0 134 #define MXC_F_ICC_MEMCFG_CCHSZ ((uint32_t)(0xFFFFUL << MXC_F_ICC_MEMCFG_CCHSZ_POS)) 136 #define MXC_F_ICC_MEMCFG_MEMSZ_POS 16 137 #define MXC_F_ICC_MEMCFG_MEMSZ ((uint32_t)(0xFFFFUL << MXC_F_ICC_MEMCFG_MEMSZ_POS)) 147 #define MXC_F_ICC_CACHE_CTRL_CACHE_EN_POS 0 148 #define MXC_F_ICC_CACHE_CTRL_CACHE_EN ((uint32_t)(0x1UL << MXC_F_ICC_CACHE_CTRL_CACHE_EN_POS)) 150 #define MXC_F_ICC_CACHE_CTRL_CACHE_RDY_POS 16 151 #define MXC_F_ICC_CACHE_CTRL_CACHE_RDY ((uint32_t)(0x1UL << MXC_F_ICC_CACHE_CTRL_CACHE_RDY_POS)) __I uint32_t cache_id
0x0000: ICC CACHE_ID Register
Definition: icc_regs.h:89
__IO uint32_t invalidate
0x0700: ICC INVALIDATE Register
Definition: icc_regs.h:94
__I uint32_t memcfg
0x0004: ICC MEMCFG Register
Definition: icc_regs.h:90
__IO uint32_t cache_ctrl
0x0100: ICC CACHE_CTRL Register
Definition: icc_regs.h:92
Structure type to access the ICC Registers.
Definition: icc_regs.h:88