40 #ifndef _SPIXR_REGS_H_ 41 #define _SPIXR_REGS_H_ 50 #if defined (__ICCARM__) 51 #pragma system_include 54 #if defined (__CC_ARM) 65 #define __I volatile const 71 #define __R volatile const 91 __IO uint16_t data16[2];
92 __IO uint8_t data8[4];
116 #define MXC_R_SPIXR_DATA32 ((uint32_t)0x00000000UL) 117 #define MXC_R_SPIXR_DATA16 ((uint32_t)0x00000000UL) 118 #define MXC_R_SPIXR_DATA8 ((uint32_t)0x00000000UL) 119 #define MXC_R_SPIXR_CTRL1 ((uint32_t)0x00000004UL) 120 #define MXC_R_SPIXR_CTRL2 ((uint32_t)0x00000008UL) 121 #define MXC_R_SPIXR_CTRL3 ((uint32_t)0x0000000CUL) 122 #define MXC_R_SPIXR_CTRL4 ((uint32_t)0x00000010UL) 123 #define MXC_R_SPIXR_BRG_CTRL ((uint32_t)0x00000014UL) 124 #define MXC_R_SPIXR_I2S_CTRL ((uint32_t)0x00000018UL) 125 #define MXC_R_SPIXR_DMA ((uint32_t)0x0000001CUL) 126 #define MXC_R_SPIXR_IRQ ((uint32_t)0x00000020UL) 127 #define MXC_R_SPIXR_IRQE ((uint32_t)0x00000024UL) 128 #define MXC_R_SPIXR_WAKE ((uint32_t)0x00000028UL) 129 #define MXC_R_SPIXR_WAKEE ((uint32_t)0x0000002CUL) 130 #define MXC_R_SPIXR_STAT ((uint32_t)0x00000030UL) 131 #define MXC_R_SPIXR_XMEM_CTRL ((uint32_t)0x00000034UL) 140 #define MXC_F_SPIXR_DATA32_DATA_POS 0 141 #define MXC_F_SPIXR_DATA32_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_SPIXR_DATA32_DATA_POS)) 151 #define MXC_F_SPIXR_DATA16_DATA_POS 0 152 #define MXC_F_SPIXR_DATA16_DATA ((uint16_t)(0xFFFFUL << MXC_F_SPIXR_DATA16_DATA_POS)) 162 #define MXC_F_SPIXR_DATA8_DATA_POS 0 163 #define MXC_F_SPIXR_DATA8_DATA ((uint8_t)(0xFFUL << MXC_F_SPIXR_DATA8_DATA_POS)) 173 #define MXC_F_SPIXR_CTRL1_SPIEN_POS 0 174 #define MXC_F_SPIXR_CTRL1_SPIEN ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_SPIEN_POS)) 176 #define MXC_F_SPIXR_CTRL1_MMEN_POS 1 177 #define MXC_F_SPIXR_CTRL1_MMEN ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_MMEN_POS)) 179 #define MXC_F_SPIXR_CTRL1_TIMER_POS 2 180 #define MXC_F_SPIXR_CTRL1_TIMER ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_TIMER_POS)) 182 #define MXC_F_SPIXR_CTRL1_FL_EN_POS 3 183 #define MXC_F_SPIXR_CTRL1_FL_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_FL_EN_POS)) 185 #define MXC_F_SPIXR_CTRL1_SSIO_POS 4 186 #define MXC_F_SPIXR_CTRL1_SSIO ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_SSIO_POS)) 188 #define MXC_F_SPIXR_CTRL1_TX_START_POS 5 189 #define MXC_F_SPIXR_CTRL1_TX_START ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_TX_START_POS)) 191 #define MXC_F_SPIXR_CTRL1_SS_CTRL_POS 8 192 #define MXC_F_SPIXR_CTRL1_SS_CTRL ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_SS_CTRL_POS)) 194 #define MXC_F_SPIXR_CTRL1_SS_POS 16 195 #define MXC_F_SPIXR_CTRL1_SS ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL1_SS_POS)) 196 #define MXC_V_SPIXR_CTRL1_SS_SS0 ((uint32_t)0x1UL) 197 #define MXC_S_SPIXR_CTRL1_SS_SS0 (MXC_V_SPIXR_CTRL1_SS_SS0 << MXC_F_SPIXR_CTRL1_SS_POS) 198 #define MXC_V_SPIXR_CTRL1_SS_SS1 ((uint32_t)0x2UL) 199 #define MXC_S_SPIXR_CTRL1_SS_SS1 (MXC_V_SPIXR_CTRL1_SS_SS1 << MXC_F_SPIXR_CTRL1_SS_POS) 200 #define MXC_V_SPIXR_CTRL1_SS_SS2 ((uint32_t)0x4UL) 201 #define MXC_S_SPIXR_CTRL1_SS_SS2 (MXC_V_SPIXR_CTRL1_SS_SS2 << MXC_F_SPIXR_CTRL1_SS_POS) 202 #define MXC_V_SPIXR_CTRL1_SS_SS3 ((uint32_t)0x8UL) 203 #define MXC_S_SPIXR_CTRL1_SS_SS3 (MXC_V_SPIXR_CTRL1_SS_SS3 << MXC_F_SPIXR_CTRL1_SS_POS) 204 #define MXC_V_SPIXR_CTRL1_SS_SS4 ((uint32_t)0x10UL) 205 #define MXC_S_SPIXR_CTRL1_SS_SS4 (MXC_V_SPIXR_CTRL1_SS_SS4 << MXC_F_SPIXR_CTRL1_SS_POS) 206 #define MXC_V_SPIXR_CTRL1_SS_SS5 ((uint32_t)0x20UL) 207 #define MXC_S_SPIXR_CTRL1_SS_SS5 (MXC_V_SPIXR_CTRL1_SS_SS5 << MXC_F_SPIXR_CTRL1_SS_POS) 208 #define MXC_V_SPIXR_CTRL1_SS_SS6 ((uint32_t)0x40UL) 209 #define MXC_S_SPIXR_CTRL1_SS_SS6 (MXC_V_SPIXR_CTRL1_SS_SS6 << MXC_F_SPIXR_CTRL1_SS_POS) 210 #define MXC_V_SPIXR_CTRL1_SS_SS7 ((uint32_t)0x80UL) 211 #define MXC_S_SPIXR_CTRL1_SS_SS7 (MXC_V_SPIXR_CTRL1_SS_SS7 << MXC_F_SPIXR_CTRL1_SS_POS) 221 #define MXC_F_SPIXR_CTRL2_TX_NUM_CHAR_POS 0 222 #define MXC_F_SPIXR_CTRL2_TX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPIXR_CTRL2_TX_NUM_CHAR_POS)) 224 #define MXC_F_SPIXR_CTRL2_RX_NUM_CHAR_POS 16 225 #define MXC_F_SPIXR_CTRL2_RX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPIXR_CTRL2_RX_NUM_CHAR_POS)) 235 #define MXC_F_SPIXR_CTRL3_CPHA_POS 0 236 #define MXC_F_SPIXR_CTRL3_CPHA ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_CPHA_POS)) 238 #define MXC_F_SPIXR_CTRL3_CPOL_POS 1 239 #define MXC_F_SPIXR_CTRL3_CPOL ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_CPOL_POS)) 241 #define MXC_F_SPIXR_CTRL3_SCLK_FB_INV_POS 4 242 #define MXC_F_SPIXR_CTRL3_SCLK_FB_INV ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_SCLK_FB_INV_POS)) 244 #define MXC_F_SPIXR_CTRL3_NUMBITS_POS 8 245 #define MXC_F_SPIXR_CTRL3_NUMBITS ((uint32_t)(0xFUL << MXC_F_SPIXR_CTRL3_NUMBITS_POS)) 246 #define MXC_V_SPIXR_CTRL3_NUMBITS_0 ((uint32_t)0x0UL) 247 #define MXC_S_SPIXR_CTRL3_NUMBITS_0 (MXC_V_SPIXR_CTRL3_NUMBITS_0 << MXC_F_SPIXR_CTRL3_NUMBITS_POS) 249 #define MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS 12 250 #define MXC_F_SPIXR_CTRL3_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS)) 251 #define MXC_V_SPIXR_CTRL3_DATA_WIDTH_MONO ((uint32_t)0x0UL) 252 #define MXC_S_SPIXR_CTRL3_DATA_WIDTH_MONO (MXC_V_SPIXR_CTRL3_DATA_WIDTH_MONO << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS) 253 #define MXC_V_SPIXR_CTRL3_DATA_WIDTH_DUAL ((uint32_t)0x1UL) 254 #define MXC_S_SPIXR_CTRL3_DATA_WIDTH_DUAL (MXC_V_SPIXR_CTRL3_DATA_WIDTH_DUAL << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS) 255 #define MXC_V_SPIXR_CTRL3_DATA_WIDTH_QUAD ((uint32_t)0x2UL) 256 #define MXC_S_SPIXR_CTRL3_DATA_WIDTH_QUAD (MXC_V_SPIXR_CTRL3_DATA_WIDTH_QUAD << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS) 258 #define MXC_F_SPIXR_CTRL3_THREE_WIRE_POS 15 259 #define MXC_F_SPIXR_CTRL3_THREE_WIRE ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_THREE_WIRE_POS)) 261 #define MXC_F_SPIXR_CTRL3_SSPOL_POS 16 262 #define MXC_F_SPIXR_CTRL3_SSPOL ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL3_SSPOL_POS)) 263 #define MXC_V_SPIXR_CTRL3_SSPOL_SS0_HIGH ((uint32_t)0x1UL) 264 #define MXC_S_SPIXR_CTRL3_SSPOL_SS0_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS0_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 265 #define MXC_V_SPIXR_CTRL3_SSPOL_SS1_HIGH ((uint32_t)0x2UL) 266 #define MXC_S_SPIXR_CTRL3_SSPOL_SS1_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS1_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 267 #define MXC_V_SPIXR_CTRL3_SSPOL_SS2_HIGH ((uint32_t)0x4UL) 268 #define MXC_S_SPIXR_CTRL3_SSPOL_SS2_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS2_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 269 #define MXC_V_SPIXR_CTRL3_SSPOL_SS3_HIGH ((uint32_t)0x8UL) 270 #define MXC_S_SPIXR_CTRL3_SSPOL_SS3_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS3_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 271 #define MXC_V_SPIXR_CTRL3_SSPOL_SS4_HIGH ((uint32_t)0x10UL) 272 #define MXC_S_SPIXR_CTRL3_SSPOL_SS4_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS4_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 273 #define MXC_V_SPIXR_CTRL3_SSPOL_SS5_HIGH ((uint32_t)0x20UL) 274 #define MXC_S_SPIXR_CTRL3_SSPOL_SS5_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS5_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 275 #define MXC_V_SPIXR_CTRL3_SSPOL_SS6_HIGH ((uint32_t)0x40UL) 276 #define MXC_S_SPIXR_CTRL3_SSPOL_SS6_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS6_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 277 #define MXC_V_SPIXR_CTRL3_SSPOL_SS7_HIGH ((uint32_t)0x80UL) 278 #define MXC_S_SPIXR_CTRL3_SSPOL_SS7_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS7_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 280 #define MXC_F_SPIXR_CTRL3_SRPOL_POS 24 281 #define MXC_F_SPIXR_CTRL3_SRPOL ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL3_SRPOL_POS)) 282 #define MXC_V_SPIXR_CTRL3_SRPOL_SR0_HIGH ((uint32_t)0x1UL) 283 #define MXC_S_SPIXR_CTRL3_SRPOL_SR0_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR0_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 284 #define MXC_V_SPIXR_CTRL3_SRPOL_SR1_HIGH ((uint32_t)0x2UL) 285 #define MXC_S_SPIXR_CTRL3_SRPOL_SR1_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR1_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 286 #define MXC_V_SPIXR_CTRL3_SRPOL_SR2_HIGH ((uint32_t)0x4UL) 287 #define MXC_S_SPIXR_CTRL3_SRPOL_SR2_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR2_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 288 #define MXC_V_SPIXR_CTRL3_SRPOL_SR3_HIGH ((uint32_t)0x8UL) 289 #define MXC_S_SPIXR_CTRL3_SRPOL_SR3_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR3_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 290 #define MXC_V_SPIXR_CTRL3_SRPOL_SR4_HIGH ((uint32_t)0x10UL) 291 #define MXC_S_SPIXR_CTRL3_SRPOL_SR4_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR4_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 292 #define MXC_V_SPIXR_CTRL3_SRPOL_SR5_HIGH ((uint32_t)0x20UL) 293 #define MXC_S_SPIXR_CTRL3_SRPOL_SR5_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR5_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 294 #define MXC_V_SPIXR_CTRL3_SRPOL_SR6_HIGH ((uint32_t)0x40UL) 295 #define MXC_S_SPIXR_CTRL3_SRPOL_SR6_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR6_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 296 #define MXC_V_SPIXR_CTRL3_SRPOL_SR7_HIGH ((uint32_t)0x80UL) 297 #define MXC_S_SPIXR_CTRL3_SRPOL_SR7_HIGH (MXC_V_SPIXR_CTRL3_SRPOL_SR7_HIGH << MXC_F_SPIXR_CTRL3_SRPOL_POS) 307 #define MXC_F_SPIXR_CTRL4_SSACT1_POS 0 308 #define MXC_F_SPIXR_CTRL4_SSACT1 ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL4_SSACT1_POS)) 309 #define MXC_V_SPIXR_CTRL4_SSACT1_256 ((uint32_t)0x0UL) 310 #define MXC_S_SPIXR_CTRL4_SSACT1_256 (MXC_V_SPIXR_CTRL4_SSACT1_256 << MXC_F_SPIXR_CTRL4_SSACT1_POS) 312 #define MXC_F_SPIXR_CTRL4_SSACT2_POS 8 313 #define MXC_F_SPIXR_CTRL4_SSACT2 ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL4_SSACT2_POS)) 314 #define MXC_V_SPIXR_CTRL4_SSACT2_256 ((uint32_t)0x0UL) 315 #define MXC_S_SPIXR_CTRL4_SSACT2_256 (MXC_V_SPIXR_CTRL4_SSACT2_256 << MXC_F_SPIXR_CTRL4_SSACT2_POS) 317 #define MXC_F_SPIXR_CTRL4_SSINACT_POS 16 318 #define MXC_F_SPIXR_CTRL4_SSINACT ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL4_SSINACT_POS)) 319 #define MXC_V_SPIXR_CTRL4_SSINACT_256 ((uint32_t)0x0UL) 320 #define MXC_S_SPIXR_CTRL4_SSINACT_256 (MXC_V_SPIXR_CTRL4_SSINACT_256 << MXC_F_SPIXR_CTRL4_SSINACT_POS) 330 #define MXC_F_SPIXR_BRG_CTRL_LOW_POS 0 331 #define MXC_F_SPIXR_BRG_CTRL_LOW ((uint32_t)(0xFFUL << MXC_F_SPIXR_BRG_CTRL_LOW_POS)) 332 #define MXC_V_SPIXR_BRG_CTRL_LOW_DIS ((uint32_t)0x0UL) 333 #define MXC_S_SPIXR_BRG_CTRL_LOW_DIS (MXC_V_SPIXR_BRG_CTRL_LOW_DIS << MXC_F_SPIXR_BRG_CTRL_LOW_POS) 335 #define MXC_F_SPIXR_BRG_CTRL_HI_POS 8 336 #define MXC_F_SPIXR_BRG_CTRL_HI ((uint32_t)(0xFFUL << MXC_F_SPIXR_BRG_CTRL_HI_POS)) 337 #define MXC_V_SPIXR_BRG_CTRL_HI_DIS ((uint32_t)0x0UL) 338 #define MXC_S_SPIXR_BRG_CTRL_HI_DIS (MXC_V_SPIXR_BRG_CTRL_HI_DIS << MXC_F_SPIXR_BRG_CTRL_HI_POS) 340 #define MXC_F_SPIXR_BRG_CTRL_SCALE_POS 16 341 #define MXC_F_SPIXR_BRG_CTRL_SCALE ((uint32_t)(0xFUL << MXC_F_SPIXR_BRG_CTRL_SCALE_POS)) 351 #define MXC_F_SPIXR_I2S_CTRL_I2S_EN_POS 0 352 #define MXC_F_SPIXR_I2S_CTRL_I2S_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_I2S_CTRL_I2S_EN_POS)) 354 #define MXC_F_SPIXR_I2S_CTRL_I2S_MUTE_POS 1 355 #define MXC_F_SPIXR_I2S_CTRL_I2S_MUTE ((uint32_t)(0x1UL << MXC_F_SPIXR_I2S_CTRL_I2S_MUTE_POS)) 357 #define MXC_F_SPIXR_I2S_CTRL_I2S_PAUSE_POS 2 358 #define MXC_F_SPIXR_I2S_CTRL_I2S_PAUSE ((uint32_t)(0x1UL << MXC_F_SPIXR_I2S_CTRL_I2S_PAUSE_POS)) 360 #define MXC_F_SPIXR_I2S_CTRL_I2S_MONO_POS 3 361 #define MXC_F_SPIXR_I2S_CTRL_I2S_MONO ((uint32_t)(0x1UL << MXC_F_SPIXR_I2S_CTRL_I2S_MONO_POS)) 363 #define MXC_F_SPIXR_I2S_CTRL_I2S_LJ_POS 4 364 #define MXC_F_SPIXR_I2S_CTRL_I2S_LJ ((uint32_t)(0x1UL << MXC_F_SPIXR_I2S_CTRL_I2S_LJ_POS)) 374 #define MXC_F_SPIXR_DMA_TX_FIFO_LEVEL_POS 0 375 #define MXC_F_SPIXR_DMA_TX_FIFO_LEVEL ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_TX_FIFO_LEVEL_POS)) 377 #define MXC_F_SPIXR_DMA_TX_FIFO_EN_POS 6 378 #define MXC_F_SPIXR_DMA_TX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_FIFO_EN_POS)) 380 #define MXC_F_SPIXR_DMA_TX_FIFO_CLEAR_POS 7 381 #define MXC_F_SPIXR_DMA_TX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_FIFO_CLEAR_POS)) 383 #define MXC_F_SPIXR_DMA_TX_FIFO_CNT_POS 8 384 #define MXC_F_SPIXR_DMA_TX_FIFO_CNT ((uint32_t)(0x1FUL << MXC_F_SPIXR_DMA_TX_FIFO_CNT_POS)) 386 #define MXC_F_SPIXR_DMA_TX_DMA_EN_POS 15 387 #define MXC_F_SPIXR_DMA_TX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_DMA_EN_POS)) 389 #define MXC_F_SPIXR_DMA_RX_FIFO_LEVEL_POS 16 390 #define MXC_F_SPIXR_DMA_RX_FIFO_LEVEL ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_RX_FIFO_LEVEL_POS)) 392 #define MXC_F_SPIXR_DMA_RX_FIFO_EN_POS 22 393 #define MXC_F_SPIXR_DMA_RX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_FIFO_EN_POS)) 395 #define MXC_F_SPIXR_DMA_RX_FIFO_CLEAR_POS 23 396 #define MXC_F_SPIXR_DMA_RX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_FIFO_CLEAR_POS)) 398 #define MXC_F_SPIXR_DMA_RX_FIFO_CNT_POS 24 399 #define MXC_F_SPIXR_DMA_RX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_RX_FIFO_CNT_POS)) 401 #define MXC_F_SPIXR_DMA_RX_DMA_EN_POS 31 402 #define MXC_F_SPIXR_DMA_RX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_DMA_EN_POS)) 413 #define MXC_F_SPIXR_IRQ_TX_THRESH_POS 0 414 #define MXC_F_SPIXR_IRQ_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_THRESH_POS)) 416 #define MXC_F_SPIXR_IRQ_TX_EMPTY_POS 1 417 #define MXC_F_SPIXR_IRQ_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_EMPTY_POS)) 419 #define MXC_F_SPIXR_IRQ_RX_THRESH_POS 2 420 #define MXC_F_SPIXR_IRQ_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_THRESH_POS)) 422 #define MXC_F_SPIXR_IRQ_RX_FULL_POS 3 423 #define MXC_F_SPIXR_IRQ_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_FULL_POS)) 425 #define MXC_F_SPIXR_IRQ_SSA_POS 4 426 #define MXC_F_SPIXR_IRQ_SSA ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SSA_POS)) 428 #define MXC_F_SPIXR_IRQ_SSD_POS 5 429 #define MXC_F_SPIXR_IRQ_SSD ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SSD_POS)) 431 #define MXC_F_SPIXR_IRQ_FAULT_POS 8 432 #define MXC_F_SPIXR_IRQ_FAULT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_FAULT_POS)) 434 #define MXC_F_SPIXR_IRQ_ABORT_POS 9 435 #define MXC_F_SPIXR_IRQ_ABORT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_ABORT_POS)) 437 #define MXC_F_SPIXR_IRQ_TIMEOUT_POS 10 438 #define MXC_F_SPIXR_IRQ_TIMEOUT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TIMEOUT_POS)) 440 #define MXC_F_SPIXR_IRQ_M_DONE_POS 11 441 #define MXC_F_SPIXR_IRQ_M_DONE ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_M_DONE_POS)) 443 #define MXC_F_SPIXR_IRQ_TX_OVR_POS 12 444 #define MXC_F_SPIXR_IRQ_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_OVR_POS)) 446 #define MXC_F_SPIXR_IRQ_TX_UND_POS 13 447 #define MXC_F_SPIXR_IRQ_TX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_UND_POS)) 449 #define MXC_F_SPIXR_IRQ_RX_OVR_POS 14 450 #define MXC_F_SPIXR_IRQ_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_OVR_POS)) 452 #define MXC_F_SPIXR_IRQ_RX_UND_POS 15 453 #define MXC_F_SPIXR_IRQ_RX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_UND_POS)) 455 #define MXC_F_SPIXR_IRQ_SR0A_POS 16 456 #define MXC_F_SPIXR_IRQ_SR0A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR0A_POS)) 458 #define MXC_F_SPIXR_IRQ_SR1A_POS 17 459 #define MXC_F_SPIXR_IRQ_SR1A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR1A_POS)) 461 #define MXC_F_SPIXR_IRQ_SR2A_POS 18 462 #define MXC_F_SPIXR_IRQ_SR2A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR2A_POS)) 464 #define MXC_F_SPIXR_IRQ_SR3A_POS 19 465 #define MXC_F_SPIXR_IRQ_SR3A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR3A_POS)) 467 #define MXC_F_SPIXR_IRQ_SR4A_POS 20 468 #define MXC_F_SPIXR_IRQ_SR4A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR4A_POS)) 470 #define MXC_F_SPIXR_IRQ_SR5A_POS 21 471 #define MXC_F_SPIXR_IRQ_SR5A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR5A_POS)) 473 #define MXC_F_SPIXR_IRQ_SR6A_POS 22 474 #define MXC_F_SPIXR_IRQ_SR6A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR6A_POS)) 476 #define MXC_F_SPIXR_IRQ_SR7A_POS 23 477 #define MXC_F_SPIXR_IRQ_SR7A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SR7A_POS)) 487 #define MXC_F_SPIXR_IRQE_TX_THRESH_POS 0 488 #define MXC_F_SPIXR_IRQE_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_THRESH_POS)) 490 #define MXC_F_SPIXR_IRQE_TX_EMPTY_POS 1 491 #define MXC_F_SPIXR_IRQE_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_EMPTY_POS)) 493 #define MXC_F_SPIXR_IRQE_RX_THRESH_POS 2 494 #define MXC_F_SPIXR_IRQE_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_THRESH_POS)) 496 #define MXC_F_SPIXR_IRQE_RX_FULL_POS 3 497 #define MXC_F_SPIXR_IRQE_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_FULL_POS)) 499 #define MXC_F_SPIXR_IRQE_SSA_POS 4 500 #define MXC_F_SPIXR_IRQE_SSA ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SSA_POS)) 502 #define MXC_F_SPIXR_IRQE_SSD_POS 5 503 #define MXC_F_SPIXR_IRQE_SSD ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SSD_POS)) 505 #define MXC_F_SPIXR_IRQE_FAULT_POS 8 506 #define MXC_F_SPIXR_IRQE_FAULT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_FAULT_POS)) 508 #define MXC_F_SPIXR_IRQE_ABORT_POS 9 509 #define MXC_F_SPIXR_IRQE_ABORT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_ABORT_POS)) 511 #define MXC_F_SPIXR_IRQE_TIMEOUT_POS 10 512 #define MXC_F_SPIXR_IRQE_TIMEOUT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TIMEOUT_POS)) 514 #define MXC_F_SPIXR_IRQE_M_DONE_POS 11 515 #define MXC_F_SPIXR_IRQE_M_DONE ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_M_DONE_POS)) 517 #define MXC_F_SPIXR_IRQE_TX_OVR_POS 12 518 #define MXC_F_SPIXR_IRQE_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_OVR_POS)) 520 #define MXC_F_SPIXR_IRQE_TX_UND_POS 13 521 #define MXC_F_SPIXR_IRQE_TX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_UND_POS)) 523 #define MXC_F_SPIXR_IRQE_RX_OVR_POS 14 524 #define MXC_F_SPIXR_IRQE_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_OVR_POS)) 526 #define MXC_F_SPIXR_IRQE_RX_UND_POS 15 527 #define MXC_F_SPIXR_IRQE_RX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_UND_POS)) 529 #define MXC_F_SPIXR_IRQE_SR0A_POS 16 530 #define MXC_F_SPIXR_IRQE_SR0A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR0A_POS)) 532 #define MXC_F_SPIXR_IRQE_SR1A_POS 17 533 #define MXC_F_SPIXR_IRQE_SR1A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR1A_POS)) 535 #define MXC_F_SPIXR_IRQE_SR2A_POS 18 536 #define MXC_F_SPIXR_IRQE_SR2A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR2A_POS)) 538 #define MXC_F_SPIXR_IRQE_SR3A_POS 19 539 #define MXC_F_SPIXR_IRQE_SR3A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR3A_POS)) 541 #define MXC_F_SPIXR_IRQE_SR4A_POS 20 542 #define MXC_F_SPIXR_IRQE_SR4A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR4A_POS)) 544 #define MXC_F_SPIXR_IRQE_SR5A_POS 21 545 #define MXC_F_SPIXR_IRQE_SR5A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR5A_POS)) 547 #define MXC_F_SPIXR_IRQE_SR6A_POS 22 548 #define MXC_F_SPIXR_IRQE_SR6A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR6A_POS)) 550 #define MXC_F_SPIXR_IRQE_SR7A_POS 23 551 #define MXC_F_SPIXR_IRQE_SR7A ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SR7A_POS)) 561 #define MXC_F_SPIXR_WAKE_TX_THRESH_POS 0 562 #define MXC_F_SPIXR_WAKE_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_TX_THRESH_POS)) 564 #define MXC_F_SPIXR_WAKE_TX_EMPTY_POS 1 565 #define MXC_F_SPIXR_WAKE_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_TX_EMPTY_POS)) 567 #define MXC_F_SPIXR_WAKE_RX_THRESH_POS 2 568 #define MXC_F_SPIXR_WAKE_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_RX_THRESH_POS)) 570 #define MXC_F_SPIXR_WAKE_RX_FULL_POS 3 571 #define MXC_F_SPIXR_WAKE_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_RX_FULL_POS)) 581 #define MXC_F_SPIXR_WAKEE_TX_THRESH_POS 0 582 #define MXC_F_SPIXR_WAKEE_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_TX_THRESH_POS)) 584 #define MXC_F_SPIXR_WAKEE_TX_EMPTY_POS 1 585 #define MXC_F_SPIXR_WAKEE_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_TX_EMPTY_POS)) 587 #define MXC_F_SPIXR_WAKEE_RX_THRESH_POS 2 588 #define MXC_F_SPIXR_WAKEE_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_RX_THRESH_POS)) 590 #define MXC_F_SPIXR_WAKEE_RX_FULL_POS 3 591 #define MXC_F_SPIXR_WAKEE_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_RX_FULL_POS)) 601 #define MXC_F_SPIXR_STAT_BUSY_POS 0 602 #define MXC_F_SPIXR_STAT_BUSY ((uint32_t)(0x1UL << MXC_F_SPIXR_STAT_BUSY_POS)) 612 #define MXC_F_SPIXR_XMEM_CTRL_RD_CMD_POS 0 613 #define MXC_F_SPIXR_XMEM_CTRL_RD_CMD ((uint32_t)(0xFFUL << MXC_F_SPIXR_XMEM_CTRL_RD_CMD_POS)) 615 #define MXC_F_SPIXR_XMEM_CTRL_WR_CMD_POS 8 616 #define MXC_F_SPIXR_XMEM_CTRL_WR_CMD ((uint32_t)(0xFFUL << MXC_F_SPIXR_XMEM_CTRL_WR_CMD_POS)) 618 #define MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK_POS 16 619 #define MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK ((uint32_t)(0xFFUL << MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK_POS)) 621 #define MXC_F_SPIXR_XMEM_CTRL_XMEM_EN_POS 31 622 #define MXC_F_SPIXR_XMEM_CTRL_XMEM_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_XMEM_CTRL_XMEM_EN_POS)) __IO uint32_t wake
0x28: SPIXR WAKE Register
Definition: spixr_regs.h:103
__IO uint32_t dma
0x1C: SPIXR DMA Register
Definition: spixr_regs.h:100
__IO uint32_t ctrl4
0x10: SPIXR CTRL4 Register
Definition: spixr_regs.h:97
__I uint32_t stat
0x30: SPIXR STAT Register
Definition: spixr_regs.h:105
__IO uint32_t irqe
0x24: SPIXR IRQE Register
Definition: spixr_regs.h:102
__IO uint32_t brg_ctrl
0x14: SPIXR BRG_CTRL Register
Definition: spixr_regs.h:98
__IO uint32_t ctrl3
0x0C: SPIXR CTRL3 Register
Definition: spixr_regs.h:96
__IO uint32_t data32
0x00: SPIXR DATA32 Register
Definition: spixr_regs.h:90
__IO uint32_t irq
0x20: SPIXR IRQ Register
Definition: spixr_regs.h:101
__IO uint32_t xmem_ctrl
0x34: SPIXR XMEM_CTRL Register
Definition: spixr_regs.h:106
__IO uint32_t ctrl1
0x04: SPIXR CTRL1 Register
Definition: spixr_regs.h:94
__IO uint32_t ctrl2
0x08: SPIXR CTRL2 Register
Definition: spixr_regs.h:95
__IO uint32_t i2s_ctrl
0x18: SPIXR I2S_CTRL Register
Definition: spixr_regs.h:99
Structure type to access the SPIXR Registers.
Definition: spixr_regs.h:88
__IO uint32_t wakee
0x2C: SPIXR WAKEE Register
Definition: spixr_regs.h:104