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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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PWRSEQ Peripheral Register Offsets from the PWRSEQ Base Peripheral Address. More...
Macros | |
#define | MXC_R_PWRSEQ_LPCN ((uint32_t)0x00000000UL) |
Offset from PWRSEQ Base Address: 0x0000 | |
#define | MXC_R_PWRSEQ_LPWKST0 ((uint32_t)0x00000004UL) |
Offset from PWRSEQ Base Address: 0x0004 | |
#define | MXC_R_PWRSEQ_LPWKEN0 ((uint32_t)0x00000008UL) |
Offset from PWRSEQ Base Address: 0x0008 | |
#define | MXC_R_PWRSEQ_LPWKST1 ((uint32_t)0x0000000CUL) |
Offset from PWRSEQ Base Address: 0x000C | |
#define | MXC_R_PWRSEQ_LPWKEN1 ((uint32_t)0x00000010UL) |
Offset from PWRSEQ Base Address: 0x0010 | |
#define | MXC_R_PWRSEQ_LPWKST2 ((uint32_t)0x00000014UL) |
Offset from PWRSEQ Base Address: 0x0014 | |
#define | MXC_R_PWRSEQ_LPWKEN2 ((uint32_t)0x00000018UL) |
Offset from PWRSEQ Base Address: 0x0018 | |
#define | MXC_R_PWRSEQ_LPWKST3 ((uint32_t)0x0000001CUL) |
Offset from PWRSEQ Base Address: 0x001C | |
#define | MXC_R_PWRSEQ_LPWKEN3 ((uint32_t)0x00000020UL) |
Offset from PWRSEQ Base Address: 0x0020 | |
#define | MXC_R_PWRSEQ_LPPWST ((uint32_t)0x00000030UL) |
Offset from PWRSEQ Base Address: 0x0030 | |
#define | MXC_R_PWRSEQ_LPPWEN ((uint32_t)0x00000034UL) |
Offset from PWRSEQ Base Address: 0x0034 | |
#define | MXC_R_PWRSEQ_LPMEMSD ((uint32_t)0x00000040UL) |
Offset from PWRSEQ Base Address: 0x0040 | |
#define | MXC_R_PWRSEQ_LPVDDPD ((uint32_t)0x00000044UL) |
Offset from PWRSEQ Base Address: 0x0044 | |
#define | MXC_R_PWRSEQ_GP0 ((uint32_t)0x00000048UL) |
Offset from PWRSEQ Base Address: 0x0048 | |
#define | MXC_R_PWRSEQ_GP1 ((uint32_t)0x0000004CUL) |
Offset from PWRSEQ Base Address: 0x004C | |
#define | MXC_R_PWRSEQ_LPMCSTAT ((uint32_t)0x00000050UL) |
Offset from PWRSEQ Base Address: 0x0050 | |
#define | MXC_R_PWRSEQ_LPMCREQ ((uint32_t)0x00000054UL) |
Offset from PWRSEQ Base Address: 0x0054 | |