MAX32665 SDK Documentation  0.2
Software Development Kit Overview and API Documentation

SPI-XIP Master Protection Register. More...

Macros

#define MXC_F_RPU_SPIXIPM_DMA0ACN_POS   0
 SPIXIPM_DMA0ACN Position.
 
#define MXC_F_RPU_SPIXIPM_DMA0ACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_DMA0ACN_POS))
 SPIXIPM_DMA0ACN Mask.
 
#define MXC_F_RPU_SPIXIPM_DMA1ACN_POS   1
 SPIXIPM_DMA1ACN Position.
 
#define MXC_F_RPU_SPIXIPM_DMA1ACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_DMA1ACN_POS))
 SPIXIPM_DMA1ACN Mask.
 
#define MXC_F_RPU_SPIXIPM_USBACN_POS   2
 SPIXIPM_USBACN Position.
 
#define MXC_F_RPU_SPIXIPM_USBACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_USBACN_POS))
 SPIXIPM_USBACN Mask.
 
#define MXC_F_RPU_SPIXIPM_SYS0ACN_POS   3
 SPIXIPM_SYS0ACN Position.
 
#define MXC_F_RPU_SPIXIPM_SYS0ACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_SYS0ACN_POS))
 SPIXIPM_SYS0ACN Mask.
 
#define MXC_F_RPU_SPIXIPM_SYS1ACN_POS   4
 SPIXIPM_SYS1ACN Position.
 
#define MXC_F_RPU_SPIXIPM_SYS1ACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_SYS1ACN_POS))
 SPIXIPM_SYS1ACN Mask.
 
#define MXC_F_RPU_SPIXIPM_SDMADACN_POS   5
 SPIXIPM_SDMADACN Position.
 
#define MXC_F_RPU_SPIXIPM_SDMADACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_SDMADACN_POS))
 SPIXIPM_SDMADACN Mask.
 
#define MXC_F_RPU_SPIXIPM_SDMAIACN_POS   6
 SPIXIPM_SDMAIACN Position.
 
#define MXC_F_RPU_SPIXIPM_SDMAIACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_SDMAIACN_POS))
 SPIXIPM_SDMAIACN Mask.
 
#define MXC_F_RPU_SPIXIPM_CRYPTOACN_POS   7
 SPIXIPM_CRYPTOACN Position.
 
#define MXC_F_RPU_SPIXIPM_CRYPTOACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_CRYPTOACN_POS))
 SPIXIPM_CRYPTOACN Mask.
 
#define MXC_F_RPU_SPIXIPM_SDIOACN_POS   8
 SPIXIPM_SDIOACN Position.
 
#define MXC_F_RPU_SPIXIPM_SDIOACN   ((uint32_t)(0x1UL << MXC_F_RPU_SPIXIPM_SDIOACN_POS))
 SPIXIPM_SDIOACN Mask.
 

Detailed Description