50 #if defined (__ICCARM__) 51 #pragma system_include 54 #if defined (__CC_ARM) 65 #define __I volatile const 71 #define __R volatile const 102 __R uint32_t rsv_0x8_0xff[62];
113 #define MXC_R_DMA_CFG ((uint32_t)0x00000100UL) 114 #define MXC_R_DMA_ST ((uint32_t)0x00000104UL) 115 #define MXC_R_DMA_SRC ((uint32_t)0x00000108UL) 116 #define MXC_R_DMA_DST ((uint32_t)0x0000010CUL) 117 #define MXC_R_DMA_CNT ((uint32_t)0x00000110UL) 118 #define MXC_R_DMA_SRC_RLD ((uint32_t)0x00000114UL) 119 #define MXC_R_DMA_DST_RLD ((uint32_t)0x00000118UL) 120 #define MXC_R_DMA_CNT_RLD ((uint32_t)0x0000011CUL) 121 #define MXC_R_DMA_CN ((uint32_t)0x00000000UL) 122 #define MXC_R_DMA_INTR ((uint32_t)0x00000004UL) 123 #define MXC_R_DMA_CH ((uint32_t)0x00000100UL) 132 #define MXC_F_DMA_CN_CH0_IEN_POS 0 133 #define MXC_F_DMA_CN_CH0_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH0_IEN_POS)) 135 #define MXC_F_DMA_CN_CH1_IEN_POS 1 136 #define MXC_F_DMA_CN_CH1_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH1_IEN_POS)) 138 #define MXC_F_DMA_CN_CH2_IEN_POS 2 139 #define MXC_F_DMA_CN_CH2_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH2_IEN_POS)) 141 #define MXC_F_DMA_CN_CH3_IEN_POS 3 142 #define MXC_F_DMA_CN_CH3_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH3_IEN_POS)) 144 #define MXC_F_DMA_CN_CH4_IEN_POS 4 145 #define MXC_F_DMA_CN_CH4_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH4_IEN_POS)) 147 #define MXC_F_DMA_CN_CH5_IEN_POS 5 148 #define MXC_F_DMA_CN_CH5_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH5_IEN_POS)) 150 #define MXC_F_DMA_CN_CH6_IEN_POS 6 151 #define MXC_F_DMA_CN_CH6_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH6_IEN_POS)) 153 #define MXC_F_DMA_CN_CH7_IEN_POS 7 154 #define MXC_F_DMA_CN_CH7_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH7_IEN_POS)) 156 #define MXC_F_DMA_CN_CH8_IEN_POS 8 157 #define MXC_F_DMA_CN_CH8_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH8_IEN_POS)) 159 #define MXC_F_DMA_CN_CH9_IEN_POS 9 160 #define MXC_F_DMA_CN_CH9_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH9_IEN_POS)) 162 #define MXC_F_DMA_CN_CH10_IEN_POS 10 163 #define MXC_F_DMA_CN_CH10_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH10_IEN_POS)) 165 #define MXC_F_DMA_CN_CH11_IEN_POS 11 166 #define MXC_F_DMA_CN_CH11_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH11_IEN_POS)) 168 #define MXC_F_DMA_CN_CH12_IEN_POS 12 169 #define MXC_F_DMA_CN_CH12_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH12_IEN_POS)) 171 #define MXC_F_DMA_CN_CH13_IEN_POS 13 172 #define MXC_F_DMA_CN_CH13_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH13_IEN_POS)) 174 #define MXC_F_DMA_CN_CH14_IEN_POS 14 175 #define MXC_F_DMA_CN_CH14_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH14_IEN_POS)) 177 #define MXC_F_DMA_CN_CH15_IEN_POS 15 178 #define MXC_F_DMA_CN_CH15_IEN ((uint32_t)(0x1UL << MXC_F_DMA_CN_CH15_IEN_POS)) 188 #define MXC_F_DMA_INTR_CH0_IPEND_POS 0 189 #define MXC_F_DMA_INTR_CH0_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH0_IPEND_POS)) 191 #define MXC_F_DMA_INTR_CH1_IPEND_POS 1 192 #define MXC_F_DMA_INTR_CH1_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH1_IPEND_POS)) 194 #define MXC_F_DMA_INTR_CH2_IPEND_POS 2 195 #define MXC_F_DMA_INTR_CH2_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH2_IPEND_POS)) 197 #define MXC_F_DMA_INTR_CH3_IPEND_POS 3 198 #define MXC_F_DMA_INTR_CH3_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH3_IPEND_POS)) 200 #define MXC_F_DMA_INTR_CH4_IPEND_POS 4 201 #define MXC_F_DMA_INTR_CH4_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH4_IPEND_POS)) 203 #define MXC_F_DMA_INTR_CH5_IPEND_POS 5 204 #define MXC_F_DMA_INTR_CH5_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH5_IPEND_POS)) 206 #define MXC_F_DMA_INTR_CH6_IPEND_POS 6 207 #define MXC_F_DMA_INTR_CH6_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH6_IPEND_POS)) 209 #define MXC_F_DMA_INTR_CH7_IPEND_POS 7 210 #define MXC_F_DMA_INTR_CH7_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH7_IPEND_POS)) 212 #define MXC_F_DMA_INTR_CH8_IPEND_POS 8 213 #define MXC_F_DMA_INTR_CH8_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH8_IPEND_POS)) 215 #define MXC_F_DMA_INTR_CH9_IPEND_POS 9 216 #define MXC_F_DMA_INTR_CH9_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH9_IPEND_POS)) 218 #define MXC_F_DMA_INTR_CH10_IPEND_POS 10 219 #define MXC_F_DMA_INTR_CH10_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH10_IPEND_POS)) 221 #define MXC_F_DMA_INTR_CH11_IPEND_POS 11 222 #define MXC_F_DMA_INTR_CH11_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH11_IPEND_POS)) 224 #define MXC_F_DMA_INTR_CH12_IPEND_POS 12 225 #define MXC_F_DMA_INTR_CH12_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH12_IPEND_POS)) 227 #define MXC_F_DMA_INTR_CH13_IPEND_POS 13 228 #define MXC_F_DMA_INTR_CH13_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH13_IPEND_POS)) 230 #define MXC_F_DMA_INTR_CH14_IPEND_POS 14 231 #define MXC_F_DMA_INTR_CH14_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH14_IPEND_POS)) 233 #define MXC_F_DMA_INTR_CH15_IPEND_POS 15 234 #define MXC_F_DMA_INTR_CH15_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_INTR_CH15_IPEND_POS)) 244 #define MXC_F_DMA_CFG_CHEN_POS 0 245 #define MXC_F_DMA_CFG_CHEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_CHEN_POS)) 247 #define MXC_F_DMA_CFG_RLDEN_POS 1 248 #define MXC_F_DMA_CFG_RLDEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_RLDEN_POS)) 250 #define MXC_F_DMA_CFG_PRI_POS 2 251 #define MXC_F_DMA_CFG_PRI ((uint32_t)(0x3UL << MXC_F_DMA_CFG_PRI_POS)) 252 #define MXC_V_DMA_CFG_PRI_HIGH ((uint32_t)0x0UL) 253 #define MXC_S_DMA_CFG_PRI_HIGH (MXC_V_DMA_CFG_PRI_HIGH << MXC_F_DMA_CFG_PRI_POS) 254 #define MXC_V_DMA_CFG_PRI_MEDHIGH ((uint32_t)0x1UL) 255 #define MXC_S_DMA_CFG_PRI_MEDHIGH (MXC_V_DMA_CFG_PRI_MEDHIGH << MXC_F_DMA_CFG_PRI_POS) 256 #define MXC_V_DMA_CFG_PRI_MEDLOW ((uint32_t)0x2UL) 257 #define MXC_S_DMA_CFG_PRI_MEDLOW (MXC_V_DMA_CFG_PRI_MEDLOW << MXC_F_DMA_CFG_PRI_POS) 258 #define MXC_V_DMA_CFG_PRI_LOW ((uint32_t)0x3UL) 259 #define MXC_S_DMA_CFG_PRI_LOW (MXC_V_DMA_CFG_PRI_LOW << MXC_F_DMA_CFG_PRI_POS) 261 #define MXC_F_DMA_CFG_REQSEL_POS 4 262 #define MXC_F_DMA_CFG_REQSEL ((uint32_t)(0x3FUL << MXC_F_DMA_CFG_REQSEL_POS)) 263 #define MXC_V_DMA_CFG_REQSEL_MEMTOMEM ((uint32_t)0x0UL) 264 #define MXC_S_DMA_CFG_REQSEL_MEMTOMEM (MXC_V_DMA_CFG_REQSEL_MEMTOMEM << MXC_F_DMA_CFG_REQSEL_POS) 265 #define MXC_V_DMA_CFG_REQSEL_SPI0RX ((uint32_t)0x1UL) 266 #define MXC_S_DMA_CFG_REQSEL_SPI0RX (MXC_V_DMA_CFG_REQSEL_SPI0RX << MXC_F_DMA_CFG_REQSEL_POS) 267 #define MXC_V_DMA_CFG_REQSEL_SPI1RX ((uint32_t)0x2UL) 268 #define MXC_S_DMA_CFG_REQSEL_SPI1RX (MXC_V_DMA_CFG_REQSEL_SPI1RX << MXC_F_DMA_CFG_REQSEL_POS) 269 #define MXC_V_DMA_CFG_REQSEL_SPI2RX ((uint32_t)0x3UL) 270 #define MXC_S_DMA_CFG_REQSEL_SPI2RX (MXC_V_DMA_CFG_REQSEL_SPI2RX << MXC_F_DMA_CFG_REQSEL_POS) 271 #define MXC_V_DMA_CFG_REQSEL_UART0RX ((uint32_t)0x4UL) 272 #define MXC_S_DMA_CFG_REQSEL_UART0RX (MXC_V_DMA_CFG_REQSEL_UART0RX << MXC_F_DMA_CFG_REQSEL_POS) 273 #define MXC_V_DMA_CFG_REQSEL_UART1RX ((uint32_t)0x5UL) 274 #define MXC_S_DMA_CFG_REQSEL_UART1RX (MXC_V_DMA_CFG_REQSEL_UART1RX << MXC_F_DMA_CFG_REQSEL_POS) 275 #define MXC_V_DMA_CFG_REQSEL_I2C0RX ((uint32_t)0x7UL) 276 #define MXC_S_DMA_CFG_REQSEL_I2C0RX (MXC_V_DMA_CFG_REQSEL_I2C0RX << MXC_F_DMA_CFG_REQSEL_POS) 277 #define MXC_V_DMA_CFG_REQSEL_I2C1RX ((uint32_t)0x8UL) 278 #define MXC_S_DMA_CFG_REQSEL_I2C1RX (MXC_V_DMA_CFG_REQSEL_I2C1RX << MXC_F_DMA_CFG_REQSEL_POS) 279 #define MXC_V_DMA_CFG_REQSEL_ADC ((uint32_t)0x9UL) 280 #define MXC_S_DMA_CFG_REQSEL_ADC (MXC_V_DMA_CFG_REQSEL_ADC << MXC_F_DMA_CFG_REQSEL_POS) 281 #define MXC_V_DMA_CFG_REQSEL_UART2RX ((uint32_t)0xEUL) 282 #define MXC_S_DMA_CFG_REQSEL_UART2RX (MXC_V_DMA_CFG_REQSEL_UART2RX << MXC_F_DMA_CFG_REQSEL_POS) 283 #define MXC_V_DMA_CFG_REQSEL_SPI3RX ((uint32_t)0xFUL) 284 #define MXC_S_DMA_CFG_REQSEL_SPI3RX (MXC_V_DMA_CFG_REQSEL_SPI3RX << MXC_F_DMA_CFG_REQSEL_POS) 285 #define MXC_V_DMA_CFG_REQSEL_SPI_MSS0RX ((uint32_t)0x10UL) 286 #define MXC_S_DMA_CFG_REQSEL_SPI_MSS0RX (MXC_V_DMA_CFG_REQSEL_SPI_MSS0RX << MXC_F_DMA_CFG_REQSEL_POS) 287 #define MXC_V_DMA_CFG_REQSEL_USBRXEP1 ((uint32_t)0x11UL) 288 #define MXC_S_DMA_CFG_REQSEL_USBRXEP1 (MXC_V_DMA_CFG_REQSEL_USBRXEP1 << MXC_F_DMA_CFG_REQSEL_POS) 289 #define MXC_V_DMA_CFG_REQSEL_USBRXEP2 ((uint32_t)0x12UL) 290 #define MXC_S_DMA_CFG_REQSEL_USBRXEP2 (MXC_V_DMA_CFG_REQSEL_USBRXEP2 << MXC_F_DMA_CFG_REQSEL_POS) 291 #define MXC_V_DMA_CFG_REQSEL_USBRXEP3 ((uint32_t)0x13UL) 292 #define MXC_S_DMA_CFG_REQSEL_USBRXEP3 (MXC_V_DMA_CFG_REQSEL_USBRXEP3 << MXC_F_DMA_CFG_REQSEL_POS) 293 #define MXC_V_DMA_CFG_REQSEL_USBRXEP4 ((uint32_t)0x14UL) 294 #define MXC_S_DMA_CFG_REQSEL_USBRXEP4 (MXC_V_DMA_CFG_REQSEL_USBRXEP4 << MXC_F_DMA_CFG_REQSEL_POS) 295 #define MXC_V_DMA_CFG_REQSEL_USBRXEP5 ((uint32_t)0x15UL) 296 #define MXC_S_DMA_CFG_REQSEL_USBRXEP5 (MXC_V_DMA_CFG_REQSEL_USBRXEP5 << MXC_F_DMA_CFG_REQSEL_POS) 297 #define MXC_V_DMA_CFG_REQSEL_USBRXEP6 ((uint32_t)0x16UL) 298 #define MXC_S_DMA_CFG_REQSEL_USBRXEP6 (MXC_V_DMA_CFG_REQSEL_USBRXEP6 << MXC_F_DMA_CFG_REQSEL_POS) 299 #define MXC_V_DMA_CFG_REQSEL_USBRXEP7 ((uint32_t)0x17UL) 300 #define MXC_S_DMA_CFG_REQSEL_USBRXEP7 (MXC_V_DMA_CFG_REQSEL_USBRXEP7 << MXC_F_DMA_CFG_REQSEL_POS) 301 #define MXC_V_DMA_CFG_REQSEL_USBRXEP8 ((uint32_t)0x18UL) 302 #define MXC_S_DMA_CFG_REQSEL_USBRXEP8 (MXC_V_DMA_CFG_REQSEL_USBRXEP8 << MXC_F_DMA_CFG_REQSEL_POS) 303 #define MXC_V_DMA_CFG_REQSEL_USBRXEP9 ((uint32_t)0x19UL) 304 #define MXC_S_DMA_CFG_REQSEL_USBRXEP9 (MXC_V_DMA_CFG_REQSEL_USBRXEP9 << MXC_F_DMA_CFG_REQSEL_POS) 305 #define MXC_V_DMA_CFG_REQSEL_USBRXEP10 ((uint32_t)0x1AUL) 306 #define MXC_S_DMA_CFG_REQSEL_USBRXEP10 (MXC_V_DMA_CFG_REQSEL_USBRXEP10 << MXC_F_DMA_CFG_REQSEL_POS) 307 #define MXC_V_DMA_CFG_REQSEL_USBRXEP11 ((uint32_t)0x1BUL) 308 #define MXC_S_DMA_CFG_REQSEL_USBRXEP11 (MXC_V_DMA_CFG_REQSEL_USBRXEP11 << MXC_F_DMA_CFG_REQSEL_POS) 309 #define MXC_V_DMA_CFG_REQSEL_SPI0TX ((uint32_t)0x21UL) 310 #define MXC_S_DMA_CFG_REQSEL_SPI0TX (MXC_V_DMA_CFG_REQSEL_SPI0TX << MXC_F_DMA_CFG_REQSEL_POS) 311 #define MXC_V_DMA_CFG_REQSEL_SPI1TX ((uint32_t)0x22UL) 312 #define MXC_S_DMA_CFG_REQSEL_SPI1TX (MXC_V_DMA_CFG_REQSEL_SPI1TX << MXC_F_DMA_CFG_REQSEL_POS) 313 #define MXC_V_DMA_CFG_REQSEL_SPI2TX ((uint32_t)0x23UL) 314 #define MXC_S_DMA_CFG_REQSEL_SPI2TX (MXC_V_DMA_CFG_REQSEL_SPI2TX << MXC_F_DMA_CFG_REQSEL_POS) 315 #define MXC_V_DMA_CFG_REQSEL_UART0TX ((uint32_t)0x24UL) 316 #define MXC_S_DMA_CFG_REQSEL_UART0TX (MXC_V_DMA_CFG_REQSEL_UART0TX << MXC_F_DMA_CFG_REQSEL_POS) 317 #define MXC_V_DMA_CFG_REQSEL_UART1TX ((uint32_t)0x25UL) 318 #define MXC_S_DMA_CFG_REQSEL_UART1TX (MXC_V_DMA_CFG_REQSEL_UART1TX << MXC_F_DMA_CFG_REQSEL_POS) 319 #define MXC_V_DMA_CFG_REQSEL_I2C0TX ((uint32_t)0x27UL) 320 #define MXC_S_DMA_CFG_REQSEL_I2C0TX (MXC_V_DMA_CFG_REQSEL_I2C0TX << MXC_F_DMA_CFG_REQSEL_POS) 321 #define MXC_V_DMA_CFG_REQSEL_I2C1TX ((uint32_t)0x28UL) 322 #define MXC_S_DMA_CFG_REQSEL_I2C1TX (MXC_V_DMA_CFG_REQSEL_I2C1TX << MXC_F_DMA_CFG_REQSEL_POS) 323 #define MXC_V_DMA_CFG_REQSEL_UART2TX ((uint32_t)0x2EUL) 324 #define MXC_S_DMA_CFG_REQSEL_UART2TX (MXC_V_DMA_CFG_REQSEL_UART2TX << MXC_F_DMA_CFG_REQSEL_POS) 325 #define MXC_V_DMA_CFG_REQSEL_SPI3TX ((uint32_t)0x2FUL) 326 #define MXC_S_DMA_CFG_REQSEL_SPI3TX (MXC_V_DMA_CFG_REQSEL_SPI3TX << MXC_F_DMA_CFG_REQSEL_POS) 327 #define MXC_V_DMA_CFG_REQSEL_SPI_MSS0TX ((uint32_t)0x30UL) 328 #define MXC_S_DMA_CFG_REQSEL_SPI_MSS0TX (MXC_V_DMA_CFG_REQSEL_SPI_MSS0TX << MXC_F_DMA_CFG_REQSEL_POS) 329 #define MXC_V_DMA_CFG_REQSEL_USBTXEP1 ((uint32_t)0x31UL) 330 #define MXC_S_DMA_CFG_REQSEL_USBTXEP1 (MXC_V_DMA_CFG_REQSEL_USBTXEP1 << MXC_F_DMA_CFG_REQSEL_POS) 331 #define MXC_V_DMA_CFG_REQSEL_USBTXEP2 ((uint32_t)0x32UL) 332 #define MXC_S_DMA_CFG_REQSEL_USBTXEP2 (MXC_V_DMA_CFG_REQSEL_USBTXEP2 << MXC_F_DMA_CFG_REQSEL_POS) 333 #define MXC_V_DMA_CFG_REQSEL_USBTXEP3 ((uint32_t)0x33UL) 334 #define MXC_S_DMA_CFG_REQSEL_USBTXEP3 (MXC_V_DMA_CFG_REQSEL_USBTXEP3 << MXC_F_DMA_CFG_REQSEL_POS) 335 #define MXC_V_DMA_CFG_REQSEL_USBTXEP4 ((uint32_t)0x34UL) 336 #define MXC_S_DMA_CFG_REQSEL_USBTXEP4 (MXC_V_DMA_CFG_REQSEL_USBTXEP4 << MXC_F_DMA_CFG_REQSEL_POS) 337 #define MXC_V_DMA_CFG_REQSEL_USBTXEP5 ((uint32_t)0x35UL) 338 #define MXC_S_DMA_CFG_REQSEL_USBTXEP5 (MXC_V_DMA_CFG_REQSEL_USBTXEP5 << MXC_F_DMA_CFG_REQSEL_POS) 339 #define MXC_V_DMA_CFG_REQSEL_USBTXEP6 ((uint32_t)0x36UL) 340 #define MXC_S_DMA_CFG_REQSEL_USBTXEP6 (MXC_V_DMA_CFG_REQSEL_USBTXEP6 << MXC_F_DMA_CFG_REQSEL_POS) 341 #define MXC_V_DMA_CFG_REQSEL_USBTXEP7 ((uint32_t)0x37UL) 342 #define MXC_S_DMA_CFG_REQSEL_USBTXEP7 (MXC_V_DMA_CFG_REQSEL_USBTXEP7 << MXC_F_DMA_CFG_REQSEL_POS) 343 #define MXC_V_DMA_CFG_REQSEL_USBTXEP8 ((uint32_t)0x38UL) 344 #define MXC_S_DMA_CFG_REQSEL_USBTXEP8 (MXC_V_DMA_CFG_REQSEL_USBTXEP8 << MXC_F_DMA_CFG_REQSEL_POS) 345 #define MXC_V_DMA_CFG_REQSEL_USBTXEP9 ((uint32_t)0x39UL) 346 #define MXC_S_DMA_CFG_REQSEL_USBTXEP9 (MXC_V_DMA_CFG_REQSEL_USBTXEP9 << MXC_F_DMA_CFG_REQSEL_POS) 347 #define MXC_V_DMA_CFG_REQSEL_USBTXEP10 ((uint32_t)0x3AUL) 348 #define MXC_S_DMA_CFG_REQSEL_USBTXEP10 (MXC_V_DMA_CFG_REQSEL_USBTXEP10 << MXC_F_DMA_CFG_REQSEL_POS) 349 #define MXC_V_DMA_CFG_REQSEL_USBTXEP11 ((uint32_t)0x3BUL) 350 #define MXC_S_DMA_CFG_REQSEL_USBTXEP11 (MXC_V_DMA_CFG_REQSEL_USBTXEP11 << MXC_F_DMA_CFG_REQSEL_POS) 352 #define MXC_F_DMA_CFG_REQWAIT_POS 10 353 #define MXC_F_DMA_CFG_REQWAIT ((uint32_t)(0x1UL << MXC_F_DMA_CFG_REQWAIT_POS)) 355 #define MXC_F_DMA_CFG_TOSEL_POS 11 356 #define MXC_F_DMA_CFG_TOSEL ((uint32_t)(0x7UL << MXC_F_DMA_CFG_TOSEL_POS)) 357 #define MXC_V_DMA_CFG_TOSEL_TO4 ((uint32_t)0x0UL) 358 #define MXC_S_DMA_CFG_TOSEL_TO4 (MXC_V_DMA_CFG_TOSEL_TO4 << MXC_F_DMA_CFG_TOSEL_POS) 359 #define MXC_V_DMA_CFG_TOSEL_TO8 ((uint32_t)0x1UL) 360 #define MXC_S_DMA_CFG_TOSEL_TO8 (MXC_V_DMA_CFG_TOSEL_TO8 << MXC_F_DMA_CFG_TOSEL_POS) 361 #define MXC_V_DMA_CFG_TOSEL_TO16 ((uint32_t)0x2UL) 362 #define MXC_S_DMA_CFG_TOSEL_TO16 (MXC_V_DMA_CFG_TOSEL_TO16 << MXC_F_DMA_CFG_TOSEL_POS) 363 #define MXC_V_DMA_CFG_TOSEL_TO32 ((uint32_t)0x3UL) 364 #define MXC_S_DMA_CFG_TOSEL_TO32 (MXC_V_DMA_CFG_TOSEL_TO32 << MXC_F_DMA_CFG_TOSEL_POS) 365 #define MXC_V_DMA_CFG_TOSEL_TO64 ((uint32_t)0x4UL) 366 #define MXC_S_DMA_CFG_TOSEL_TO64 (MXC_V_DMA_CFG_TOSEL_TO64 << MXC_F_DMA_CFG_TOSEL_POS) 367 #define MXC_V_DMA_CFG_TOSEL_TO128 ((uint32_t)0x5UL) 368 #define MXC_S_DMA_CFG_TOSEL_TO128 (MXC_V_DMA_CFG_TOSEL_TO128 << MXC_F_DMA_CFG_TOSEL_POS) 369 #define MXC_V_DMA_CFG_TOSEL_TO256 ((uint32_t)0x6UL) 370 #define MXC_S_DMA_CFG_TOSEL_TO256 (MXC_V_DMA_CFG_TOSEL_TO256 << MXC_F_DMA_CFG_TOSEL_POS) 371 #define MXC_V_DMA_CFG_TOSEL_TO512 ((uint32_t)0x7UL) 372 #define MXC_S_DMA_CFG_TOSEL_TO512 (MXC_V_DMA_CFG_TOSEL_TO512 << MXC_F_DMA_CFG_TOSEL_POS) 374 #define MXC_F_DMA_CFG_PSSEL_POS 14 375 #define MXC_F_DMA_CFG_PSSEL ((uint32_t)(0x3UL << MXC_F_DMA_CFG_PSSEL_POS)) 376 #define MXC_V_DMA_CFG_PSSEL_DIS ((uint32_t)0x0UL) 377 #define MXC_S_DMA_CFG_PSSEL_DIS (MXC_V_DMA_CFG_PSSEL_DIS << MXC_F_DMA_CFG_PSSEL_POS) 378 #define MXC_V_DMA_CFG_PSSEL_DIV256 ((uint32_t)0x1UL) 379 #define MXC_S_DMA_CFG_PSSEL_DIV256 (MXC_V_DMA_CFG_PSSEL_DIV256 << MXC_F_DMA_CFG_PSSEL_POS) 380 #define MXC_V_DMA_CFG_PSSEL_DIV64K ((uint32_t)0x2UL) 381 #define MXC_S_DMA_CFG_PSSEL_DIV64K (MXC_V_DMA_CFG_PSSEL_DIV64K << MXC_F_DMA_CFG_PSSEL_POS) 382 #define MXC_V_DMA_CFG_PSSEL_DIV16M ((uint32_t)0x3UL) 383 #define MXC_S_DMA_CFG_PSSEL_DIV16M (MXC_V_DMA_CFG_PSSEL_DIV16M << MXC_F_DMA_CFG_PSSEL_POS) 385 #define MXC_F_DMA_CFG_SRCWD_POS 16 386 #define MXC_F_DMA_CFG_SRCWD ((uint32_t)(0x3UL << MXC_F_DMA_CFG_SRCWD_POS)) 387 #define MXC_V_DMA_CFG_SRCWD_BYTE ((uint32_t)0x0UL) 388 #define MXC_S_DMA_CFG_SRCWD_BYTE (MXC_V_DMA_CFG_SRCWD_BYTE << MXC_F_DMA_CFG_SRCWD_POS) 389 #define MXC_V_DMA_CFG_SRCWD_HALFWORD ((uint32_t)0x1UL) 390 #define MXC_S_DMA_CFG_SRCWD_HALFWORD (MXC_V_DMA_CFG_SRCWD_HALFWORD << MXC_F_DMA_CFG_SRCWD_POS) 391 #define MXC_V_DMA_CFG_SRCWD_WORD ((uint32_t)0x2UL) 392 #define MXC_S_DMA_CFG_SRCWD_WORD (MXC_V_DMA_CFG_SRCWD_WORD << MXC_F_DMA_CFG_SRCWD_POS) 394 #define MXC_F_DMA_CFG_SRCINC_POS 18 395 #define MXC_F_DMA_CFG_SRCINC ((uint32_t)(0x1UL << MXC_F_DMA_CFG_SRCINC_POS)) 397 #define MXC_F_DMA_CFG_DSTWD_POS 20 398 #define MXC_F_DMA_CFG_DSTWD ((uint32_t)(0x3UL << MXC_F_DMA_CFG_DSTWD_POS)) 399 #define MXC_V_DMA_CFG_DSTWD_BYTE ((uint32_t)0x0UL) 400 #define MXC_S_DMA_CFG_DSTWD_BYTE (MXC_V_DMA_CFG_DSTWD_BYTE << MXC_F_DMA_CFG_DSTWD_POS) 401 #define MXC_V_DMA_CFG_DSTWD_HALFWORD ((uint32_t)0x1UL) 402 #define MXC_S_DMA_CFG_DSTWD_HALFWORD (MXC_V_DMA_CFG_DSTWD_HALFWORD << MXC_F_DMA_CFG_DSTWD_POS) 403 #define MXC_V_DMA_CFG_DSTWD_WORD ((uint32_t)0x2UL) 404 #define MXC_S_DMA_CFG_DSTWD_WORD (MXC_V_DMA_CFG_DSTWD_WORD << MXC_F_DMA_CFG_DSTWD_POS) 406 #define MXC_F_DMA_CFG_DSTINC_POS 22 407 #define MXC_F_DMA_CFG_DSTINC ((uint32_t)(0x1UL << MXC_F_DMA_CFG_DSTINC_POS)) 409 #define MXC_F_DMA_CFG_BRST_POS 24 410 #define MXC_F_DMA_CFG_BRST ((uint32_t)(0x1FUL << MXC_F_DMA_CFG_BRST_POS)) 412 #define MXC_F_DMA_CFG_CHDIEN_POS 30 413 #define MXC_F_DMA_CFG_CHDIEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_CHDIEN_POS)) 415 #define MXC_F_DMA_CFG_CTZIEN_POS 31 416 #define MXC_F_DMA_CFG_CTZIEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_CTZIEN_POS)) 426 #define MXC_F_DMA_ST_CH_ST_POS 0 427 #define MXC_F_DMA_ST_CH_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CH_ST_POS)) 429 #define MXC_F_DMA_ST_IPEND_POS 1 430 #define MXC_F_DMA_ST_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_ST_IPEND_POS)) 432 #define MXC_F_DMA_ST_CTZ_ST_POS 2 433 #define MXC_F_DMA_ST_CTZ_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CTZ_ST_POS)) 435 #define MXC_F_DMA_ST_RLD_ST_POS 3 436 #define MXC_F_DMA_ST_RLD_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_RLD_ST_POS)) 438 #define MXC_F_DMA_ST_BUS_ERR_POS 4 439 #define MXC_F_DMA_ST_BUS_ERR ((uint32_t)(0x1UL << MXC_F_DMA_ST_BUS_ERR_POS)) 441 #define MXC_F_DMA_ST_TO_ST_POS 6 442 #define MXC_F_DMA_ST_TO_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_TO_ST_POS)) 456 #define MXC_F_DMA_SRC_ADDR_POS 0 457 #define MXC_F_DMA_SRC_ADDR ((uint32_t)(0xFFFFFFFFUL << MXC_F_DMA_SRC_ADDR_POS)) 471 #define MXC_F_DMA_DST_ADDR_POS 0 472 #define MXC_F_DMA_DST_ADDR ((uint32_t)(0xFFFFFFFFUL << MXC_F_DMA_DST_ADDR_POS)) 485 #define MXC_F_DMA_CNT_CNT_POS 0 486 #define MXC_F_DMA_CNT_CNT ((uint32_t)(0xFFFFFFUL << MXC_F_DMA_CNT_CNT_POS)) 497 #define MXC_F_DMA_SRC_RLD_SRC_RLD_POS 0 498 #define MXC_F_DMA_SRC_RLD_SRC_RLD ((uint32_t)(0x7FFFFFFFUL << MXC_F_DMA_SRC_RLD_SRC_RLD_POS)) 509 #define MXC_F_DMA_DST_RLD_DST_RLD_POS 0 510 #define MXC_F_DMA_DST_RLD_DST_RLD ((uint32_t)(0x7FFFFFFFUL << MXC_F_DMA_DST_RLD_DST_RLD_POS)) 520 #define MXC_F_DMA_CNT_RLD_CNT_RLD_POS 0 521 #define MXC_F_DMA_CNT_RLD_CNT_RLD ((uint32_t)(0xFFFFFFUL << MXC_F_DMA_CNT_RLD_CNT_RLD_POS)) 523 #define MXC_F_DMA_CNT_RLD_RLDEN_POS 31 524 #define MXC_F_DMA_CNT_RLD_RLDEN ((uint32_t)(0x1UL << MXC_F_DMA_CNT_RLD_RLDEN_POS)) __IO uint32_t cnt_rld
0x11C: DMA CNT_RLD Register
Definition: dma_regs.h:96
__IO uint32_t dst
0x10C: DMA DST Register
Definition: dma_regs.h:92
Structure type to access the DMA Registers.
Definition: dma_regs.h:88
__IO uint32_t cn
0x000: DMA CN Register
Definition: dma_regs.h:100
__IO uint32_t dst_rld
0x118: DMA DST_RLD Register
Definition: dma_regs.h:95
__IO uint32_t src_rld
0x114: DMA SRC_RLD Register
Definition: dma_regs.h:94
__I uint32_t intr
0x004: DMA INTR Register
Definition: dma_regs.h:101
__IO uint32_t cfg
0x100: DMA CFG Register
Definition: dma_regs.h:89
__IO uint32_t cnt
0x110: DMA CNT Register
Definition: dma_regs.h:93
__IO uint32_t src
0x108: DMA SRC Register
Definition: dma_regs.h:91
Definition: dma_regs.h:99
__IO uint32_t st
0x104: DMA ST Register
Definition: dma_regs.h:90