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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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Interrupt Status Register. More...
Macros | |
#define | MXC_F_I2C_INT_FL0_DONE_POS 0 |
INT_FL0_DONE Position. | |
#define | MXC_F_I2C_INT_FL0_DONE ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DONE_POS)) |
INT_FL0_DONE Mask. | |
#define | MXC_F_I2C_INT_FL0_RX_MODE_POS 1 |
INT_FL0_RX_MODE Position. | |
#define | MXC_F_I2C_INT_FL0_RX_MODE ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_MODE_POS)) |
INT_FL0_RX_MODE Mask. | |
#define | MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS 2 |
INT_FL0_GEN_CALL_ADDR Position. | |
#define | MXC_F_I2C_INT_FL0_GEN_CALL_ADDR ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS)) |
INT_FL0_GEN_CALL_ADDR Mask. | |
#define | MXC_F_I2C_INT_FL0_ADDR_MATCH_POS 3 |
INT_FL0_ADDR_MATCH Position. | |
#define | MXC_F_I2C_INT_FL0_ADDR_MATCH ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_MATCH_POS)) |
INT_FL0_ADDR_MATCH Mask. | |
#define | MXC_F_I2C_INT_FL0_RX_THRESH_POS 4 |
INT_FL0_RX_THRESH Position. | |
#define | MXC_F_I2C_INT_FL0_RX_THRESH ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_THRESH_POS)) |
INT_FL0_RX_THRESH Mask. | |
#define | MXC_F_I2C_INT_FL0_TX_THRESH_POS 5 |
INT_FL0_TX_THRESH Position. | |
#define | MXC_F_I2C_INT_FL0_TX_THRESH ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_THRESH_POS)) |
INT_FL0_TX_THRESH Mask. | |
#define | MXC_F_I2C_INT_FL0_STOP_POS 6 |
INT_FL0_STOP Position. | |
#define | MXC_F_I2C_INT_FL0_STOP ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_POS)) |
INT_FL0_STOP Mask. | |
#define | MXC_F_I2C_INT_FL0_ADDR_ACK_POS 7 |
INT_FL0_ADDR_ACK Position. | |
#define | MXC_F_I2C_INT_FL0_ADDR_ACK ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_ACK_POS)) |
INT_FL0_ADDR_ACK Mask. | |
#define | MXC_F_I2C_INT_FL0_ARB_ER_POS 8 |
INT_FL0_ARB_ER Position. | |
#define | MXC_F_I2C_INT_FL0_ARB_ER ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ARB_ER_POS)) |
INT_FL0_ARB_ER Mask. | |
#define | MXC_F_I2C_INT_FL0_TO_ER_POS 9 |
INT_FL0_TO_ER Position. | |
#define | MXC_F_I2C_INT_FL0_TO_ER ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TO_ER_POS)) |
INT_FL0_TO_ER Mask. | |
#define | MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS 10 |
INT_FL0_ADDR_NACK_ER Position. | |
#define | MXC_F_I2C_INT_FL0_ADDR_NACK_ER ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS)) |
INT_FL0_ADDR_NACK_ER Mask. | |
#define | MXC_F_I2C_INT_FL0_DATA_ER_POS 11 |
INT_FL0_DATA_ER Position. | |
#define | MXC_F_I2C_INT_FL0_DATA_ER ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DATA_ER_POS)) |
INT_FL0_DATA_ER Mask. | |
#define | MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS 12 |
INT_FL0_DO_NOT_RESP_ER Position. | |
#define | MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS)) |
INT_FL0_DO_NOT_RESP_ER Mask. | |
#define | MXC_F_I2C_INT_FL0_START_ER_POS 13 |
INT_FL0_START_ER Position. | |
#define | MXC_F_I2C_INT_FL0_START_ER ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_START_ER_POS)) |
INT_FL0_START_ER Mask. | |
#define | MXC_F_I2C_INT_FL0_STOP_ER_POS 14 |
INT_FL0_STOP_ER Position. | |
#define | MXC_F_I2C_INT_FL0_STOP_ER ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_ER_POS)) |
INT_FL0_STOP_ER Mask. | |
#define | MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS 15 |
INT_FL0_TX_LOCK_OUT Position. | |
#define | MXC_F_I2C_INT_FL0_TX_LOCK_OUT ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS)) |
INT_FL0_TX_LOCK_OUT Mask. | |