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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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Structure type to access the RPU Registers.
#include <rpu_regs.h>
Data Fields | |
__IO uint32_t | gcr |
0x00: RPU GCR Register | |
__IO uint32_t | sir |
0x04: RPU SIR Register | |
__IO uint32_t | fcr |
0x08: RPU FCR Register | |
__IO uint32_t | crypto |
0x0C: RPU CRYPTO Register | |
__R uint32_t | rsv_0x10_0x2f [8] |
__IO uint32_t | wdt0 |
0x30: RPU WDT0 Register | |
__IO uint32_t | wdt1 |
0x0034: RPU WDT1 Register | |
__IO uint32_t | wdt2 |
0x0038: RPU WDT2 Register | |
__R uint32_t | rsv_0x3c |
__IO uint32_t | smon |
0x0040: RPU SMON Register | |
__IO uint32_t | simo |
0x0044: RPU SIMO Register | |
__IO uint32_t | dvs |
0x0048: RPU DVS Register | |
__R uint32_t | rsv_0x4c_0x53 [2] |
__IO uint32_t | bbsir |
0x0054: RPU BBSIR Register | |
__R uint32_t | rsv_0x58_0x5f [2] |
__IO uint32_t | rtc |
0x0060: RPU RTC Register | |
__IO uint32_t | wut |
0x0064: RPU WUT Register | |
__IO uint32_t | pwrseq |
0x0068: RPU PWRSEQ Register | |
__IO uint32_t | bbcr |
0x006C: RPU BBCR Register | |
__R uint32_t | rsv_0x70_0x7f [4] |
__IO uint32_t | gpio0 |
0x0080: RPU GPIO0 Register | |
__R uint32_t | rsv_0x84_0x8f [3] |
__IO uint32_t | gpio1 |
0x0090: RPU GPIO1 Register | |
__R uint32_t | rsv_0x94_0xff [27] |
__IO uint32_t | tmr0 |
0x0100: RPU TMR0 Register | |
__R uint32_t | rsv_0x104_0x10f [3] |
__IO uint32_t | tmr1 |
0x0110: RPU TMR1 Register | |
__R uint32_t | rsv_0x114_0x11f [3] |
__IO uint32_t | tmr2 |
0x0120: RPU TMR2 Register | |
__R uint32_t | rsv_0x124_0x12f [3] |
__IO uint32_t | tmr3 |
0x0130: RPU TMR3 Register | |
__R uint32_t | rsv_0x134_0x13f [3] |
__IO uint32_t | tmr4 |
0x0140: RPU TMR4 Register | |
__R uint32_t | rsv_0x144_0x14f [3] |
__IO uint32_t | tmr5 |
0x0150: RPU TMR5 Register | |
__R uint32_t | rsv_0x154_0x1af [23] |
__IO uint32_t | htimer0 |
0x01B0: RPU HTIMER0 Register | |
__R uint32_t | rsv_0x1b4_0x1bf [3] |
__IO uint32_t | htimer1 |
0x01C0: RPU HTIMER1 Register | |
__R uint32_t | rsv_0x1c4_0x1cf [3] |
__IO uint32_t | i2c0 |
0x01D0: RPU I2C0 Register | |
__R uint32_t | rsv_0x1d4_0x1df [3] |
__IO uint32_t | i2c1 |
0x01E0: RPU I2C1 Register | |
__R uint32_t | rsv_0x1e4_0x1ef [3] |
__IO uint32_t | i2c2 |
0x01F0: RPU I2C2 Register | |
__R uint32_t | rsv_0x1f4_0x25f [27] |
__IO uint32_t | spixipm |
0x0260: RPU SPIXIPM Register | |
__R uint32_t | rsv_0x264_0x26f [3] |
__IO uint32_t | spixipmc |
0x0270: RPU SPIXIPMC Register | |
__R uint32_t | rsv_0x274_0x27f [3] |
__IO uint32_t | dma0 |
0x0280: RPU DMA0 Register | |
__R uint32_t | rsv_0x284_0x28f [3] |
__IO uint32_t | flc0 |
0x0290: RPU FLC0 Register | |
__IO uint32_t | flc1 |
0x0294: RPU FLC1 Register | |
__R uint32_t | rsv_0x298_0x29f [2] |
__IO uint32_t | icache0 |
0x02A0: RPU ICACHE0 Register | |
__IO uint32_t | icache1 |
0x02A4: RPU ICACHE1 Register | |
__R uint32_t | rsv_0x2a8_0x2ef [18] |
__IO uint32_t | icachexip |
0x02F0: RPU ICACHEXIP Register | |
__R uint32_t | rsv_0x2f4_0x32f [15] |
__IO uint32_t | dcache |
0x0330: RPU DCACHE Register | |
__R uint32_t | rsv_0x334_0x33f [3] |
__IO uint32_t | adc |
0x0340: RPU ADC Register | |
__R uint32_t | rsv_0x344_0x34f [3] |
__IO uint32_t | dma1 |
0x0350: RPU DMA1 Register | |
__R uint32_t | rsv_0x354_0x35f [3] |
__IO uint32_t | sdma |
0x0360: RPU SDMA Register | |
__R uint32_t | rsv_0x364_0x36f [3] |
__IO uint32_t | sdhcctrl |
0x0370: RPU SDHCCTRL Register | |
__R uint32_t | rsv_0x374_0x39f [11] |
__IO uint32_t | spid |
0x03A0: RPU SPID Register | |
__R uint32_t | rsv_0x3a4_0x3bf [7] |
__IO uint32_t | pt |
0x03C0: RPU PT Register | |
__R uint32_t | rsv_0x3c4_0x3cf [3] |
__IO uint32_t | owm |
0x03D0: RPU OWM Register | |
__R uint32_t | rsv_0x3d4_0x3df [3] |
__IO uint32_t | sema |
0x03E0: RPU SEMA Register | |
__R uint32_t | rsv_0x3e4_0x41f [15] |
__IO uint32_t | uart0 |
0x0420: RPU UART0 Register | |
__R uint32_t | rsv_0x424_0x42f [3] |
__IO uint32_t | uart1 |
0x0430: RPU UART1 Register | |
__R uint32_t | rsv_0x434_0x43f [3] |
__IO uint32_t | uart2 |
0x0440: RPU UART2 Register | |
__R uint32_t | rsv_0x444_0x45f [7] |
__IO uint32_t | qspi1 |
0x0460: RPU QSPI1 Register | |
__R uint32_t | rsv_0x464_0x47f [7] |
__IO uint32_t | qspi2 |
0x0480: RPU QSPI2 Register | |
__R uint32_t | rsv_0x484_0x4bf [15] |
__IO uint32_t | audio |
0x04C0: RPU AUDIO Register | |
__R uint32_t | rsv_0x4c4_0x4cf [3] |
__IO uint32_t | trng |
0x04D0: RPU TRNG Register | |
__R uint32_t | rsv_0x4d4_0x4ff [11] |
__IO uint32_t | btle |
0x0500: RPU BTLE Register | |
__R uint32_t | rsv_0x504_0xb0f [387] |
__IO uint32_t | usbhs |
0x0B10: RPU USBHS Register | |
__R uint32_t | rsv_0xb14_0xb5f [19] |
__IO uint32_t | sdio |
0x0B60: RPU SDIO Register | |
__R uint32_t | rsv_0xb64_0xbbf [23] |
__IO uint32_t | spixipmfifo |
0x0BC0: RPU SPIXIPMFIFO Register | |
__R uint32_t | rsv_0xbc4_0xbdf [7] |
__IO uint32_t | qspi0 |
0x0BE0: RPU QSPI0 Register | |
__R uint32_t | rsv_0xbe4_0xeff [199] |
__IO uint32_t | sram0 |
0x0F00: RPU SRAM0 Register | |
__R uint32_t | rsv_0xf04_0xf0f [3] |
__IO uint32_t | sram1 |
0x0F10: RPU SRAM1 Register | |
__R uint32_t | rsv_0xf14_0xf1f [3] |
__IO uint32_t | sram2 |
0x0F20: RPU SRAM2 Register | |
__R uint32_t | rsv_0xf24_0xf2f [3] |
__IO uint32_t | sram3 |
0x0F30: RPU SRAM3 Register | |
__R uint32_t | rsv_0xf34_0xf3f [3] |
__IO uint32_t | sram4 |
0x0F40: RPU SRAM4 Register | |
__R uint32_t | rsv_0xf44_0xf4f [3] |
__IO uint32_t | sram5 |
0x0F50: RPU SRAM5 Register | |
__R uint32_t | rsv_0xf54_0xf5f [3] |
__IO uint32_t | sram6 |
0x0F60: RPU SRAM6 Register | |