MAX32665 SDK Documentation  0.2
Software Development Kit Overview and API Documentation

TMR0 Protection Register. More...

Macros

#define MXC_F_RPU_TMR0_DMA0ACN_POS   0
 TMR0_DMA0ACN Position.
 
#define MXC_F_RPU_TMR0_DMA0ACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_DMA0ACN_POS))
 TMR0_DMA0ACN Mask.
 
#define MXC_F_RPU_TMR0_DMA1ACN_POS   1
 TMR0_DMA1ACN Position.
 
#define MXC_F_RPU_TMR0_DMA1ACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_DMA1ACN_POS))
 TMR0_DMA1ACN Mask.
 
#define MXC_F_RPU_TMR0_USBACN_POS   2
 TMR0_USBACN Position.
 
#define MXC_F_RPU_TMR0_USBACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_USBACN_POS))
 TMR0_USBACN Mask.
 
#define MXC_F_RPU_TMR0_SYS0ACN_POS   3
 TMR0_SYS0ACN Position.
 
#define MXC_F_RPU_TMR0_SYS0ACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_SYS0ACN_POS))
 TMR0_SYS0ACN Mask.
 
#define MXC_F_RPU_TMR0_SYS1ACN_POS   4
 TMR0_SYS1ACN Position.
 
#define MXC_F_RPU_TMR0_SYS1ACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_SYS1ACN_POS))
 TMR0_SYS1ACN Mask.
 
#define MXC_F_RPU_TMR0_SDMADACN_POS   5
 TMR0_SDMADACN Position.
 
#define MXC_F_RPU_TMR0_SDMADACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_SDMADACN_POS))
 TMR0_SDMADACN Mask.
 
#define MXC_F_RPU_TMR0_SDMAIACN_POS   6
 TMR0_SDMAIACN Position.
 
#define MXC_F_RPU_TMR0_SDMAIACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_SDMAIACN_POS))
 TMR0_SDMAIACN Mask.
 
#define MXC_F_RPU_TMR0_CRYPTOACN_POS   7
 TMR0_CRYPTOACN Position.
 
#define MXC_F_RPU_TMR0_CRYPTOACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_CRYPTOACN_POS))
 TMR0_CRYPTOACN Mask.
 
#define MXC_F_RPU_TMR0_SDIOACN_POS   8
 TMR0_SDIOACN Position.
 
#define MXC_F_RPU_TMR0_SDIOACN   ((uint32_t)(0x1UL << MXC_F_RPU_TMR0_SDIOACN_POS))
 TMR0_SDIOACN Mask.
 

Detailed Description