diff --git a/bootloader/build_multi_image.sh b/bootloader/build_multi_image.sh index c4b799a4c5de071b81e489185597b2a0e16a1b5f..f8ee285fd38c0010a097772b898910604c5a3d46 100755 --- a/bootloader/build_multi_image.sh +++ b/bootloader/build_multi_image.sh @@ -6,12 +6,12 @@ BIN1="$2" BIN2="$3" BINOUT="$4" -if [ "$(stat -c "%s" "${BIN1}")" -gt 458752 ]; then +if [ "$(stat -c "%s" "${BIN1}")" -gt 589824 ]; then echo "$0: ${BIN1} is too big to fit!" >&2 exit 1 fi -objcopy -I binary -O binary --pad-to=458752 --gap-fill=255 "${BIN1}" "$BINOUT" +objcopy -I binary -O binary --pad-to=589824 --gap-fill=255 "${BIN1}" "$BINOUT" cat "$BIN2" >>"$BINOUT" "$PYTHON" "$(dirname "$0")/crc_patch.py" "$BINOUT" diff --git a/epicardium/modules/lifecycle.c b/epicardium/modules/lifecycle.c index 76c5648cc20120eca6de28fad2ed4329404943da..f4d8206235483e9ebdb9e810419abadc1066841b 100644 --- a/epicardium/modules/lifecycle.c +++ b/epicardium/modules/lifecycle.c @@ -15,7 +15,7 @@ #include <stdbool.h> #include <stdbool.h> -#define PYCARDIUM_IVT (void *)0x10080000 +#define PYCARDIUM_IVT (void *)0x100a0000 #define BLOCK_WAIT pdMS_TO_TICKS(1000) /* * Loading an empty filename into Pycardium will drop straight into the diff --git a/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core0.ld b/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core0.ld index 2c2e94e1953abaaaab839d5a343f10db78349a51..04bacddfac11b0e82de2fd3f3709897a3159545e 100644 --- a/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core0.ld +++ b/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core0.ld @@ -40,7 +40,7 @@ STACK_SIZE = 0x1000; /* If used, they should be adjusted for the external Flash/RAM size */ MEMORY { SPIX (rx) : ORIGIN = 0x08000000, LENGTH = 128M - FLASH (rx) : ORIGIN = 0x10010000, LENGTH = 448k + FLASH (rx) : ORIGIN = 0x10010000, LENGTH = 576k SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256k SPID (r) : ORIGIN = 0x80000000, LENGTH = 512M } diff --git a/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld b/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld index 2dedc3ddf262fb234db2f4ec23704d307e57bd77..19f2d6196be5f71a286417b6c5cba743a88a5c79 100644 --- a/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld +++ b/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld @@ -40,7 +40,7 @@ STACK_SIZE = 0x2000; /* If used, they should be adjusted for the external Flash/RAM size */ MEMORY { SPIX (rx) : ORIGIN = 0x08000000, LENGTH = 128M - FLASH (rx) : ORIGIN = 0x10080000, LENGTH = 512k + FLASH (rx) : ORIGIN = 0x100a0000, LENGTH = 384k SRAM (rwx) : ORIGIN = 0x20040000, LENGTH = 256k SPID (r) : ORIGIN = 0x80000000, LENGTH = 512M }