diff --git a/stm/main.c b/stm/main.c
index 90fdab3d22375206eaa63f0bc3f83fee4513c02c..9fc9633ff2dcd9a290e2c7d52fe372b263a3e988 100644
--- a/stm/main.c
+++ b/stm/main.c
@@ -655,7 +655,7 @@ soft_reset:
         rt_store_attr(m, MP_QSTR_mma_mode, (mp_obj_t)&pyb_mma_write_mode_obj);
 #endif
         rt_store_attr(m, MP_QSTR_hid, rt_make_function_n(1, pyb_hid_send_report));
-#if MICROPY_HW_HAS_RTC
+#if MICROPY_HW_ENABLE_RTC
         rt_store_attr(m, MP_QSTR_time, rt_make_function_n(0, pyb_rtc_read));
 #endif
 #if MICROPY_HW_ENABLE_RNG
diff --git a/stm/rtc.c b/stm/rtc.c
index 2dbb2c0aa1b1dc9633001458f7c63ec585e5b64e..e5e11c6222a3637e3d6ffbb561db787e7c69c297 100644
--- a/stm/rtc.c
+++ b/stm/rtc.c
@@ -8,8 +8,20 @@
 #include "rtc.h"
 
 void rtc_init(void) {
-    uint32_t rtc_clksrc;
-    uint32_t timeout = 1000000;
+    /* Enable the PWR clock */
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+
+    /* Allow access to RTC */
+    PWR_BackupAccessCmd(ENABLE);
+
+    if (RTC_ReadBackupRegister(RTC_BKP_DR0) == 0x32F2) {
+        // RTC still alive, so don't re-init it
+        // wait for RTC APB register synchronisation
+        RTC_WaitForSynchro();
+        return;
+    }
+
+    uint32_t timeout = 10000000;
 
     /* Enable the PWR clock */
     RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
@@ -26,7 +38,10 @@ void rtc_init(void) {
 
     /* If LSE timed out, use LSI instead */
     if (timeout == 0) {
-        /* Enable the LSI OSC */
+        // Disable the LSE OSC
+        RCC_LSEConfig(RCC_LSE_OFF);
+
+        // Enable the LSI OSC
         RCC_LSICmd(ENABLE);
 
         /* Wait till LSI is ready */
@@ -34,15 +49,12 @@ void rtc_init(void) {
         }
 
         /* Use LSI as the RTC Clock Source */
-        rtc_clksrc = RCC_RTCCLKSource_LSI;
+        RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI);
     } else {
         /* Use LSE as the RTC Clock Source */
-        rtc_clksrc = RCC_RTCCLKSource_LSE;
+        RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
     }
 
-    /* Select the RTC Clock Source */
-    RCC_RTCCLKConfig(rtc_clksrc);
-
     /* Note: LSI is around (32KHz), these dividers should work either way */
     /* ck_spre(1Hz) = RTCCLK(LSE) /(uwAsynchPrediv + 1)*(uwSynchPrediv + 1)*/
     uint32_t uwSynchPrediv = 0xFF;
@@ -78,7 +90,7 @@ void rtc_init(void) {
     RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure);
 
     // Indicator for the RTC configuration
-    //RTC_WriteBackupRegister(RTC_BKP_DR0, 0x32F2);
+    RTC_WriteBackupRegister(RTC_BKP_DR0, 0x32F2);
 }
 
 /******************************************************************************/