From 328708eb2504eae2ca8132c948bc3b1fc1c95243 Mon Sep 17 00:00:00 2001
From: Damien George <damien.p.george@gmail.com>
Date: Mon, 13 Jan 2014 00:20:06 +0000
Subject: [PATCH] stm: Re-instate C debugging USART port (disabled by default).
See pyb_usart_global_debug variable.
Also did some work on USB OTG, but nothing working yet.
---
stm/Makefile | 8 +++++
stm/lib/usb_bsp.c | 89 ++++++++++++++++++++++++++++++++++++++++++++++
stm/lib/usb_conf.h | 59 ++++++++++++++++++++++++++++--
stm/lib/usb_core.c | 2 +-
stm/main.c | 17 ++++++---
stm/printf.c | 8 ++---
stm/stm32fxxx_it.c | 4 ++-
stm/usart.c | 30 +++++++---------
stm/usart.h | 17 +++++++++
stm/usb.c | 29 ++++++++++++++-
stm/usb.h | 3 ++
11 files changed, 232 insertions(+), 34 deletions(-)
diff --git a/stm/Makefile b/stm/Makefile
index 2fecd03ba..2facff81c 100644
--- a/stm/Makefile
+++ b/stm/Makefile
@@ -105,6 +105,14 @@ SRC_STM = \
# usb_hcd.c \
# usb_hcd_int.c \
# usb_otg.c \
+# usbh_core.c \
+# usbh_hcs.c \
+# usbh_stdreq.c \
+# usbh_ioreq.c \
+# usbh_usr.c \
+# usbh_hid_core.c \
+# usbh_hid_mouse.c \
+# usbh_hid_keybd.c \
SRC_CC3K = \
cc3000_common.c \
diff --git a/stm/lib/usb_bsp.c b/stm/lib/usb_bsp.c
index c4839bdf9..e88e31db0 100644
--- a/stm/lib/usb_bsp.c
+++ b/stm/lib/usb_bsp.c
@@ -117,6 +117,17 @@ void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev) {
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOA, &GPIO_InitStructure);
+ /*
+ // Configure ID pin (only in host mode)
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_OTG_FS);
+ */
+
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE);
}
@@ -137,6 +148,84 @@ void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev) {
NVIC_Init(&NVIC_InitStructure);
}
+/**
+* @brief BSP_Drive_VBUS
+* Drives the Vbus signal through IO
+* @param state : VBUS states
+* @retval None
+*/
+
+void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev, uint8_t state) {
+ //printf("DriveVBUS %p %u\n", pdev, state);
+ /*
+ On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ or, if 5 V are available on the application board, a basic power switch, must
+ be added externally to drive the 5 V VBUS line. The external charge pump can
+ be driven by any GPIO output. When the application decides to power on VBUS
+ using the chosen GPIO, it must also set the port power bit in the host port
+ control and status register (PPWR bit in OTG_FS_HPRT).
+
+ Bit 12 PPWR: Port power
+ The application uses this field to control power to this port, and the core
+ clears this bit on an overcurrent condition.
+ */
+#if 0 // not implemented
+#ifndef USE_USB_OTG_HS
+ if (0 == state) {
+ /* DISABLE is needed on output of the Power Switch */
+ GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
+ } else {
+ /*ENABLE the Power Switch by driving the Enable LOW */
+ GPIO_ResetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
+ }
+#endif
+#endif
+}
+
+/**
+ * @brief USB_OTG_BSP_ConfigVBUS
+ * Configures the IO for the Vbus and OverCurrent
+ * @param None
+ * @retval None
+ */
+
+void USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev) {
+ //printf("ConfigVBUS %p\n", pdev);
+#if 0 // not implemented
+#ifdef USE_USB_OTG_FS
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+#ifdef USE_STM3210C_EVAL
+ RCC_APB2PeriphClockCmd(HOST_POWERSW_PORT_RCC, ENABLE);
+
+
+ /* Configure Power Switch Vbus Pin */
+ GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_Init(HOST_POWERSW_PORT, &GPIO_InitStructure);
+#else
+ #ifdef USE_USB_OTG_FS
+ RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOH , ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+ GPIO_Init(HOST_POWERSW_PORT,&GPIO_InitStructure);
+ #endif
+#endif
+
+ /* By Default, DISABLE is needed on output of the Power Switch */
+ GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
+
+ USB_OTG_BSP_mDelay(200); /* Delay is need for stabilising the Vbus Low
+ in Reset Condition, when Vbus=1 and Reset-button is pressed by user */
+#endif
+#endif
+}
+
/**
* @brief USB_OTG_BSP_uDelay
* This function provides delay time in micro sec
diff --git a/stm/lib/usb_conf.h b/stm/lib/usb_conf.h
index 5e736f91e..a51a23a84 100644
--- a/stm/lib/usb_conf.h
+++ b/stm/lib/usb_conf.h
@@ -181,10 +181,65 @@
/****************** USB OTG MISC CONFIGURATION ********************************/
#define VBUS_SENSING_ENABLED
+/* BEGIN host specific stuff */
+
+/*******************************************************************************
+* FIFO Size Configuration in Host mode
+*
+* (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
+* 2x (Largest Packet Size / 4) + 1, If a
+* high-bandwidth channel or multiple isochronous
+* channels are enabled
+*
+* (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
+* for all supported nonperiodic OUT channels. Typically, a space
+* corresponding to two Largest Packet Size is recommended.
+*
+* (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
+* the largest maximum packet size for all supported periodic OUT channels.
+* If there is at least one High Bandwidth Isochronous OUT endpoint,
+* then the space must be at least two times the maximum packet size for
+* that channel.
+*******************************************************************************/
+
+/****************** USB OTG HS CONFIGURATION (for host) ***********************/
+#ifdef USB_OTG_HS_CORE
+ #define RX_FIFO_HS_SIZE 512
+ #define TXH_NP_HS_FIFOSIZ 256
+ #define TXH_P_HS_FIFOSIZ 256
+
+// #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
+// #define USB_OTG_HS_SOF_OUTPUT_ENABLED
+
+// #define USB_OTG_INTERNAL_VBUS_ENABLED
+#define USB_OTG_EXTERNAL_VBUS_ENABLED
+
+ #ifdef USE_ULPI_PHY
+ #define USB_OTG_ULPI_PHY_ENABLED
+ #endif
+ #ifdef USE_EMBEDDED_PHY
+ #define USB_OTG_EMBEDDED_PHY_ENABLED
+ #endif
+ #define USB_OTG_HS_INTERNAL_DMA_ENABLED
+// #define USB_OTG_HS_DEDICATED_EP1_ENABLED
+#endif
+
+/****************** USB OTG FS CONFIGURATION (for host) ***********************/
+#ifdef USB_OTG_FS_CORE
+ //#define RX_FIFO_FS_SIZE 128 // already defined for device (and it's the same)
+ #define TXH_NP_FS_FIFOSIZ 96
+ #define TXH_P_FS_FIFOSIZ 96
+
+// #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
+// #define USB_OTG_FS_SOF_OUTPUT_ENABLED
+#endif
+
+/* END host specific stuff */
+
/****************** USB OTG MODE CONFIGURATION ********************************/
-//#define USE_HOST_MODE
+//#define USE_HOST_MODE // set in Makefile
#define USE_DEVICE_MODE
-//#define USE_OTG_MODE
+//#define USE_OTG_MODE // set in Makefile
#ifndef USB_OTG_FS_CORE
#ifndef USB_OTG_HS_CORE
diff --git a/stm/lib/usb_core.c b/stm/lib/usb_core.c
index 4b28c085f..b0cce8804 100644
--- a/stm/lib/usb_core.c
+++ b/stm/lib/usb_core.c
@@ -617,7 +617,7 @@ USB_OTG_STS USB_OTG_CoreInitHost(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_HCFG_TypeDef hcfg;
#ifdef USE_OTG_MODE
- USB_OTG_OTGCTL_TypeDef gotgctl;
+ USB_OTG_GOTGCTL_TypeDef gotgctl;
#endif
uint32_t i = 0;
diff --git a/stm/main.c b/stm/main.c
index 44db47f13..cdc4432c0 100644
--- a/stm/main.c
+++ b/stm/main.c
@@ -307,7 +307,9 @@ char *strdup(const char *str) {
static const char *readline_hist[READLINE_HIST_SIZE] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL};
void stdout_tx_str(const char *str) {
- //usart_tx_str(str); // disabled because usart is a Python object and we now need specify which USART port
+ if (pyb_usart_global_debug != PYB_USART_NONE) {
+ usart_tx_str(pyb_usart_global_debug, str);
+ }
usb_vcp_send_str(str);
}
@@ -322,10 +324,10 @@ int readline(vstr_t *line, const char *prompt) {
if (usb_vcp_rx_any() != 0) {
c = usb_vcp_rx_get();
break;
- } /*else if (usart_rx_any()) { // disabled because usart is a Python object and we now need specify which USART port
- c = usart_rx_char();
+ } else if (pyb_usart_global_debug != PYB_USART_NONE && usart_rx_any(pyb_usart_global_debug)) {
+ c = usart_rx_char(pyb_usart_global_debug);
break;
- }*/
+ }
sys_tick_delay_ms(1);
if (storage_needs_flush()) {
storage_flush();
@@ -775,7 +777,9 @@ int main(void) {
switch_init();
storage_init();
- //usart_init(); disabled while wi-fi is enabled; also disabled because now usart is a proper Python object
+ // uncomment these 2 lines if you want REPL on USART_6 (or another usart) as well as on USB VCP
+ //pyb_usart_global_debug = PYB_USART_6;
+ //usart_init(pyb_usart_global_debug, 115200);
int first_soft_reset = true;
@@ -937,6 +941,9 @@ soft_reset:
// USB
usb_init();
+ // USB host; not working!
+ //pyb_usbh_init();
+
// MMA
if (first_soft_reset) {
// init and reset address to zero
diff --git a/stm/printf.c b/stm/printf.c
index fa9426925..c644cd94f 100644
--- a/stm/printf.c
+++ b/stm/printf.c
@@ -220,14 +220,10 @@ void stdout_print_strn(void *data, const char *str, unsigned int len) {
// send stdout to USART, USB CDC VCP, and LCD if nothing else
bool any = false;
- // TODO should have a setting for which USART port to send to
-#if 0 // if 0'd out so that we're not calling functions with the wrong arguments
- if (usart_is_enabled()) {
- usart_tx_strn_cooked(str, len);
+ if (pyb_usart_global_debug != PYB_USART_NONE) {
+ usart_tx_strn_cooked(pyb_usart_global_debug, str, len);
any = true;
}
-#endif
-
if (usb_vcp_is_enabled()) {
usb_vcp_send_strn_cooked(str, len);
any = true;
diff --git a/stm/stm32fxxx_it.c b/stm/stm32fxxx_it.c
index e254ccc89..c1a9a0702 100644
--- a/stm/stm32fxxx_it.c
+++ b/stm/stm32fxxx_it.c
@@ -31,6 +31,7 @@
#include "stm32fxxx_it.h"
#include "stm32f4xx_exti.h"
#include "usb_core.h"
+//#include "usb_hcd_int.h" // for usb host mode only
//#include "usbd_core.h"
//#include "usbd_cdc_core.h"
@@ -197,7 +198,8 @@ void OTG_HS_IRQHandler(void)
void OTG_FS_IRQHandler(void)
#endif
{
- USBD_OTG_ISR_Handler (&USB_OTG_dev);
+ USBD_OTG_ISR_Handler (&USB_OTG_dev); // device mode
+ //USBH_OTG_ISR_Handler (&USB_OTG_dev); // host mode FIXME
}
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
diff --git a/stm/usart.c b/stm/usart.c
index bc5bfc736..5f47ec788 100644
--- a/stm/usart.c
+++ b/stm/usart.c
@@ -8,20 +8,14 @@
#include "obj.h"
#include "usart.h"
-static bool is_enabled;
-
-typedef enum {
- PYB_USART_1 = 1,
- PYB_USART_2 = 2,
- PYB_USART_3 = 3,
- PYB_USART_6 = 4,
- PYB_USART_MAX = 4,
-} pyb_usart_t;
+pyb_usart_t pyb_usart_global_debug = PYB_USART_NONE;
static USART_TypeDef *usart_get_base(pyb_usart_t usart_id) {
USART_TypeDef *USARTx=NULL;
switch (usart_id) {
+ case PYB_USART_NONE:
+ break;
case PYB_USART_1:
USARTx = USART1;
break;
@@ -52,6 +46,9 @@ void usart_init(pyb_usart_t usart_id, uint32_t baudrate) {
void (*RCC_APBxPeriphClockCmd)(uint32_t, FunctionalState)=NULL;
switch (usart_id) {
+ case PYB_USART_NONE:
+ return;
+
case PYB_USART_1:
USARTx = USART1;
@@ -128,16 +125,13 @@ void usart_init(pyb_usart_t usart_id, uint32_t baudrate) {
USART_Cmd(USARTx, ENABLE);
}
-bool usart_is_enabled(void) {
- return is_enabled;
-}
-
-bool usart_rx_any(void) {
- return USART_GetFlagStatus(USART6, USART_FLAG_RXNE) == SET;
+bool usart_rx_any(pyb_usart_t usart_id) {
+ USART_TypeDef *USARTx = usart_get_base(usart_id);
+ return USART_GetFlagStatus(USARTx, USART_FLAG_RXNE) == SET;
}
int usart_rx_char(pyb_usart_t usart_id) {
- USART_TypeDef *USARTx= usart_get_base(usart_id);
+ USART_TypeDef *USARTx = usart_get_base(usart_id);
return USART_ReceiveData(USARTx);
}
@@ -176,8 +170,8 @@ typedef struct _pyb_usart_obj_t {
} pyb_usart_obj_t;
static mp_obj_t usart_obj_status(mp_obj_t self_in) {
- // TODO make it check the correct USART port!
- if (usart_rx_any()) {
+ pyb_usart_obj_t *self = self_in;
+ if (usart_rx_any(self->usart_id)) {
return mp_const_true;
} else {
return mp_const_false;
diff --git a/stm/usart.h b/stm/usart.h
index 15ed419fe..541cb757c 100644
--- a/stm/usart.h
+++ b/stm/usart.h
@@ -1 +1,18 @@
+typedef enum {
+ PYB_USART_NONE = 0,
+ PYB_USART_1 = 1,
+ PYB_USART_2 = 2,
+ PYB_USART_3 = 3,
+ PYB_USART_6 = 4,
+ PYB_USART_MAX = 4,
+} pyb_usart_t;
+
+extern pyb_usart_t pyb_usart_global_debug;
+
+void usart_init(pyb_usart_t usart_id, uint32_t baudrate);
+bool usart_rx_any(pyb_usart_t usart_id);
+int usart_rx_char(pyb_usart_t usart_id);
+void usart_tx_str(pyb_usart_t usart_id, const char *str);
+void usart_tx_strn_cooked(pyb_usart_t usart_id, const char *str, int len);
+
mp_obj_t pyb_Usart(mp_obj_t usart_id, mp_obj_t baudrate);
diff --git a/stm/usb.c b/stm/usb.c
index b0fbfa194..ed2b0359b 100644
--- a/stm/usb.c
+++ b/stm/usb.c
@@ -80,7 +80,7 @@ void usb_vcp_send_strn(const char *str, int len) {
}
}
-#include "lib/usbd_conf.h"
+#include "usbd_conf.h"
/* These are external variables imported from CDC core to be used for IN
transfer management. */
@@ -105,3 +105,30 @@ void usb_vcp_send_strn_cooked(const char *str, int len) {
void usb_hid_send_report(uint8_t *buf) {
USBD_HID_SendReport(&USB_OTG_dev, buf, 4);
}
+
+/******************************************************************************/
+// code for experimental USB OTG support
+
+#ifdef USE_HOST_MODE
+
+#include "lib-otg/usbh_core.h"
+#include "lib-otg/usbh_usr.h"
+#include "lib-otg/usbh_hid_core.h"
+
+__ALIGN_BEGIN USBH_HOST USB_Host __ALIGN_END ;
+
+static int host_is_enabled = 0;
+void pyb_usbh_init(void) {
+ if (!host_is_enabled) {
+ // only init USBH once in the device's power-lifetime
+ /* Init Host Library */
+ USBH_Init(&USB_OTG_dev, USB_OTG_FS_CORE_ID, &USB_Host, &HID_cb, &USR_Callbacks);
+ }
+ host_is_enabled = 1;
+}
+
+void pyb_usbh_process(void) {
+ USBH_Process(&USB_OTG_dev, &USB_Host);
+}
+
+#endif // USE_HOST_MODE
diff --git a/stm/usb.h b/stm/usb.h
index c4b3b151f..db1f0a9d3 100644
--- a/stm/usb.h
+++ b/stm/usb.h
@@ -6,3 +6,6 @@ void usb_vcp_send_str(const char* str);
void usb_vcp_send_strn(const char* str, int len);
void usb_vcp_send_strn_cooked(const char *str, int len);
void usb_hid_send_report(uint8_t *buf); // 4 bytes for mouse: ?, x, y, ?
+
+void pyb_usbh_init(void);
+void pyb_usbh_process(void);
--
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