diff --git a/docs/library/pyb.SPI.rst b/docs/library/pyb.SPI.rst
index 54ecc65b6dd3eb0e3f57895202a675281abe3f0a..fd110be190cf7f4c9b9985b8b11b389283aeade5 100644
--- a/docs/library/pyb.SPI.rst
+++ b/docs/library/pyb.SPI.rst
@@ -68,6 +68,7 @@ Methods
          - ``polarity`` can be 0 or 1, and is the level the idle clock line sits at.
          - ``phase`` can be 0 or 1 to sample data on the first or second clock edge
            respectively.
+         - ``bits`` can be 8 or 16, and is the number of bits in each transferred word.
          - ``firstbit`` can be ``SPI.MSB`` or ``SPI.LSB``.
          - ``crc`` can be None for no CRC, or a polynomial specifier.