From d3bb3e38df3fcb2b980d37e06fde7eac9e689f6a Mon Sep 17 00:00:00 2001 From: Damien George <damien.p.george@gmail.com> Date: Mon, 6 Feb 2017 13:48:01 +1100 Subject: [PATCH] tests/pyb: Adjust tests so they can run on PYB and PYBLITE. A few tests still fail on PYBLITE, and that's due to differences in the available peripheral block numbers on the different MCUs (eg I2C(2) exists on one, but it's I2C(3) on the other). --- tests/pyb/adc.py | 9 ++++++--- tests/pyb/can.py | 8 +++++++- tests/pyb/dac.py | 5 +++++ tests/pyb/extint.py | 2 +- tests/pyb/extint.py.exp | 6 +++--- tests/pyb/pin.py | 8 ++++---- tests/pyb/pin.py.exp | 12 ++++++------ tests/pyb/pyb1.py | 4 ---- tests/pyb/pyb1.py.exp | 1 - tests/pyb/pyb_f405.py | 11 +++++++++++ tests/pyb/pyb_f405.py.exp | 2 ++ tests/pyb/pyb_f411.py | 10 ++++++++++ tests/pyb/pyb_f411.py.exp | 1 + tests/pyb/rtc.py | 2 +- 14 files changed, 57 insertions(+), 24 deletions(-) create mode 100644 tests/pyb/pyb_f405.py create mode 100644 tests/pyb/pyb_f405.py.exp create mode 100644 tests/pyb/pyb_f411.py create mode 100644 tests/pyb/pyb_f411.py.exp diff --git a/tests/pyb/adc.py b/tests/pyb/adc.py index 6508d7e24..362ca326d 100644 --- a/tests/pyb/adc.py +++ b/tests/pyb/adc.py @@ -9,9 +9,12 @@ print(adc) val = adc.read() assert val < 500 +# timer for read_timed +tim = pyb.Timer(5, freq=500) + # read into bytearray buf = bytearray(50) -adc.read_timed(buf, 500) +adc.read_timed(buf, tim) print(len(buf)) for i in buf: assert i < 500 @@ -19,12 +22,12 @@ for i in buf: # read into arrays with different element sizes import array ar = array.array('h', 25 * [0]) -adc.read_timed(ar, 500) +adc.read_timed(ar, tim) print(len(ar)) for i in buf: assert i < 500 ar = array.array('i', 30 * [0]) -adc.read_timed(ar, 500) +adc.read_timed(ar, tim) print(len(ar)) for i in buf: assert i < 500 diff --git a/tests/pyb/can.py b/tests/pyb/can.py index 594d1d509..617eb7ccc 100644 --- a/tests/pyb/can.py +++ b/tests/pyb/can.py @@ -1,4 +1,10 @@ -from pyb import CAN +try: + from pyb import CAN +except ImportError: + print('SKIP') + import sys + sys.exit() + import pyb # test we can correctly create by id or name diff --git a/tests/pyb/dac.py b/tests/pyb/dac.py index 884ec5829..942f30354 100644 --- a/tests/pyb/dac.py +++ b/tests/pyb/dac.py @@ -1,5 +1,10 @@ import pyb +if not hasattr(pyb, 'DAC'): + print('SKIP') + import sys + sys.exit() + dac = pyb.DAC(1) print(dac) dac.noise(100) diff --git a/tests/pyb/extint.py b/tests/pyb/extint.py index a8ba484b1..ae98ccd5a 100644 --- a/tests/pyb/extint.py +++ b/tests/pyb/extint.py @@ -1,7 +1,7 @@ import pyb # test basic functionality -ext = pyb.ExtInt('X1', pyb.ExtInt.IRQ_RISING, pyb.Pin.PULL_DOWN, lambda l:print('line:', l)) +ext = pyb.ExtInt('Y1', pyb.ExtInt.IRQ_RISING, pyb.Pin.PULL_DOWN, lambda l:print('line:', l)) ext.disable() ext.enable() print(ext.line()) diff --git a/tests/pyb/extint.py.exp b/tests/pyb/extint.py.exp index daed01c7f..1f9da9844 100644 --- a/tests/pyb/extint.py.exp +++ b/tests/pyb/extint.py.exp @@ -1,3 +1,3 @@ -0 -line: 0 -line: 0 +6 +line: 6 +line: 6 diff --git a/tests/pyb/pin.py b/tests/pyb/pin.py index b3eb87b60..9b3788343 100644 --- a/tests/pyb/pin.py +++ b/tests/pyb/pin.py @@ -1,14 +1,14 @@ from pyb import Pin -p = Pin('X1', Pin.IN) +p = Pin('Y1', Pin.IN) print(p) print(p.name()) print(p.pin()) print(p.port()) -p = Pin('X1', Pin.IN, Pin.PULL_UP) -p = Pin('X1', Pin.IN, pull=Pin.PULL_UP) -p = Pin('X1', mode=Pin.IN, pull=Pin.PULL_UP) +p = Pin('Y1', Pin.IN, Pin.PULL_UP) +p = Pin('Y1', Pin.IN, pull=Pin.PULL_UP) +p = Pin('Y1', mode=Pin.IN, pull=Pin.PULL_UP) print(p) print(p.value()) diff --git a/tests/pyb/pin.py.exp b/tests/pyb/pin.py.exp index 599374600..f2f7038fd 100644 --- a/tests/pyb/pin.py.exp +++ b/tests/pyb/pin.py.exp @@ -1,10 +1,10 @@ -Pin(Pin.cpu.A0, mode=Pin.IN) -A0 -0 -0 -Pin(Pin.cpu.A0, mode=Pin.IN, pull=Pin.PULL_UP) +Pin(Pin.cpu.C6, mode=Pin.IN) +C6 +6 +2 +Pin(Pin.cpu.C6, mode=Pin.IN, pull=Pin.PULL_UP) 1 -Pin(Pin.cpu.A0, mode=Pin.IN, pull=Pin.PULL_DOWN) +Pin(Pin.cpu.C6, mode=Pin.IN, pull=Pin.PULL_DOWN) 0 0 1 diff --git a/tests/pyb/pyb1.py b/tests/pyb/pyb1.py index 00adc8553..184acbdc4 100644 --- a/tests/pyb/pyb1.py +++ b/tests/pyb/pyb1.py @@ -27,14 +27,10 @@ print((pyb.millis() - start) // 5) # should print 3 pyb.disable_irq() pyb.enable_irq() -print(pyb.freq()) - print(pyb.have_cdc()) pyb.hid((0, 0, 0, 0)) # won't do anything -pyb.rng() - pyb.sync() print(len(pyb.unique_id())) diff --git a/tests/pyb/pyb1.py.exp b/tests/pyb/pyb1.py.exp index 84034d683..5816ea967 100644 --- a/tests/pyb/pyb1.py.exp +++ b/tests/pyb/pyb1.py.exp @@ -1,5 +1,4 @@ 3 3 -(168000000, 168000000, 42000000, 84000000) True 12 diff --git a/tests/pyb/pyb_f405.py b/tests/pyb/pyb_f405.py new file mode 100644 index 000000000..3c81fe109 --- /dev/null +++ b/tests/pyb/pyb_f405.py @@ -0,0 +1,11 @@ +# test pyb module on F405 MCUs + +import os, pyb + +if not 'STM32F405' in os.uname().machine: + print('SKIP') + import sys + sys.exit() + +print(pyb.freq()) +print(type(pyb.rng())) diff --git a/tests/pyb/pyb_f405.py.exp b/tests/pyb/pyb_f405.py.exp new file mode 100644 index 000000000..a90aa0268 --- /dev/null +++ b/tests/pyb/pyb_f405.py.exp @@ -0,0 +1,2 @@ +(168000000, 168000000, 42000000, 84000000) +<class 'int'> diff --git a/tests/pyb/pyb_f411.py b/tests/pyb/pyb_f411.py new file mode 100644 index 000000000..328653965 --- /dev/null +++ b/tests/pyb/pyb_f411.py @@ -0,0 +1,10 @@ +# test pyb module on F411 MCUs + +import os, pyb + +if not 'STM32F411' in os.uname().machine: + print('SKIP') + import sys + sys.exit() + +print(pyb.freq()) diff --git a/tests/pyb/pyb_f411.py.exp b/tests/pyb/pyb_f411.py.exp new file mode 100644 index 000000000..79e0a1062 --- /dev/null +++ b/tests/pyb/pyb_f411.py.exp @@ -0,0 +1 @@ +(96000000, 96000000, 24000000, 48000000) diff --git a/tests/pyb/rtc.py b/tests/pyb/rtc.py index 300c95634..844526b4b 100644 --- a/tests/pyb/rtc.py +++ b/tests/pyb/rtc.py @@ -7,7 +7,7 @@ print(rtc) # make sure that 1 second passes correctly rtc.datetime((2014, 1, 1, 1, 0, 0, 0, 0)) -pyb.delay(1001) +pyb.delay(1002) print(rtc.datetime()[:7]) def set_and_print(datetime): -- GitLab