From 01a5d87d5f5788542c5d26da1c19fa4e634adc10 Mon Sep 17 00:00:00 2001
From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Wed, 5 Mar 2008 19:29:41 +0000
Subject: [PATCH] - This speeds up dcc arm7_9 bulk write a little bit and
exercises the jtag_add_dr_out() codepath - added a check to
jtag_add_pathmove() for legal path transitions - tweaked jtag.h docs a little
bit - made some jtag bypass tests _DEBUG_JTAG_IO_
git-svn-id: svn://svn.berlios.de/openocd/trunk@448 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
src/jtag/jtag.c | 19 +++++++++++++++++-
src/jtag/jtag.h | 6 ++++++
src/target/arm7_9_common.c | 40 +++++++++++++++++++++++++++++++++++---
src/target/embeddedice.c | 3 ++-
src/target/embeddedice.h | 6 ++----
5 files changed, 65 insertions(+), 9 deletions(-)
diff --git a/src/jtag/jtag.c b/src/jtag/jtag.c
index 73acb6a09..fe9d4e1de 100644
--- a/src/jtag/jtag.c
+++ b/src/jtag/jtag.c
@@ -625,13 +625,14 @@ int MINIDRIVER(interface_jtag_add_dr_scan)(int num_fields, scan_field_t *fields,
}
if (!found)
{
+#ifdef _DEBUG_JTAG_IO_
/* if a device isn't listed, the BYPASS register should be selected */
if (!jtag_get_device(i)->bypass)
{
ERROR("BUG: no scan data for a device not in BYPASS");
exit(-1);
}
-
+#endif
/* program the scan field to 1 bit length, and ignore it's value */
(*last_cmd)->cmd.scan->fields[field_count].num_bits = 1;
(*last_cmd)->cmd.scan->fields[field_count].out_value = NULL;
@@ -644,11 +645,13 @@ int MINIDRIVER(interface_jtag_add_dr_scan)(int num_fields, scan_field_t *fields,
}
else
{
+#ifdef _DEBUG_JTAG_IO_
/* if a device is listed, the BYPASS register must not be selected */
if (jtag_get_device(i)->bypass)
{
WARNING("scan data for a device in BYPASS");
}
+#endif
}
}
return ERROR_OK;
@@ -860,6 +863,20 @@ int jtag_add_pathmove(int num_states, enum tap_state *path)
if (cmd_queue_end_state == TAP_TLR)
jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
+
+ enum tap_state cur_state=cmd_queue_cur_state;
+ int i;
+ for (i=0; i<num_states; i++)
+ {
+ if ((tap_transitions[cur_state].low != path[i])&&
+ (tap_transitions[cur_state].high != path[i]))
+ {
+ ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_strings[cur_state], tap_state_strings[path[i]]);
+ exit(-1);
+ }
+ cur_state = path[i];
+ }
+
cmd_queue_cur_state = path[num_states - 1];
return interface_jtag_add_pathmove(num_states, path);
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index ada3b49dc..fe240eb66 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -270,6 +270,9 @@ extern int interface_jtag_add_plain_dr_scan(int num_fields, scan_field_t *fields
*
* - Run-Test/Idle must not be entered unless requested, because R-T/I may have
* side effects.
+ *
+ * NB! a jtag_add_statemove() to the current state is not
+ * a no-operation.
*/
extern int jtag_add_statemove(enum tap_state endstate);
extern int interface_jtag_add_statemove(enum tap_state endstate);
@@ -278,6 +281,9 @@ extern int interface_jtag_add_statemove(enum tap_state endstate);
* XScale and Xilinx support
*
* Note! TAP_TLR must not be used in the path!
+ *
+ * Note that the first on the list must be reachable
+ * via a single transition from the current state.
*/
extern int jtag_add_pathmove(int num_states, enum tap_state *path);
extern int interface_jtag_add_pathmove(int num_states, enum tap_state *path);
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index dd713b9b9..c3dcc2947 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2165,10 +2165,44 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
arm7_9_resume(target, 0, arm7_9->dcc_working_area->address, 1, 1);
- for (i = 0; i < count; i++)
+ int little=target->endianness==TARGET_LITTLE_ENDIAN;
+ if (count>2)
{
- embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], target_buffer_get_u32(target, buffer));
- buffer += 4;
+ /* Handle first & last using standard embeddedice_write_reg and the middle ones w/the
+ core function repeated.
+ */
+ embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
+ buffer+=4;
+
+ embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info;
+ u8 reg_addr = ice_reg->addr & 0x1f;
+ int chain_pos = ice_reg->jtag_info->chain_pos;
+ /* we want the compiler to duplicate the code, which it does not
+ * do automatically.
+ */
+ if (little)
+ {
+ for (i = 1; i < count - 1; i++)
+ {
+ embeddedice_write_reg_inner(chain_pos, reg_addr, fast_target_buffer_get_u32(buffer, little));
+ buffer += 4;
+ }
+ } else
+ {
+ for (i = 1; i < count - 1; i++)
+ {
+ embeddedice_write_reg_inner(chain_pos, reg_addr, fast_target_buffer_get_u32(buffer, little));
+ buffer += 4;
+ }
+ }
+ embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
+ } else
+ {
+ for (i = 0; i < count; i++)
+ {
+ embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
+ buffer += 4;
+ }
}
target->type->halt(target);
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 30258270d..3b9af7557 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -382,7 +382,8 @@ int embeddedice_write_reg(reg_t *reg, u32 value)
arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL);
- embeddedice_write_reg_inner(reg, value);
+ u8 reg_addr = ice_reg->addr & 0x1f;
+ embeddedice_write_reg_inner(ice_reg->jtag_info->chain_pos, reg_addr, value);
return ERROR_OK;
}
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index dde37f65f..20cf2b4e7 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -104,10 +104,8 @@ extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
* embeddedice_write_reg
*/
-static __inline__ void embeddedice_write_reg_inner(reg_t *reg, u32 value)
+static __inline__ void embeddedice_write_reg_inner(int chain_pos, int reg_addr, u32 value)
{
- embeddedice_reg_t *ice_reg = reg->arch_info;
- u8 reg_addr = ice_reg->addr & 0x1f;
#if 1
u32 values[3];
int num_bits[3];
@@ -119,7 +117,7 @@ static __inline__ void embeddedice_write_reg_inner(reg_t *reg, u32 value)
values[2]=1;
num_bits[2]=1;
- jtag_add_dr_out(ice_reg->jtag_info->chain_pos,
+ jtag_add_dr_out(chain_pos,
3,
num_bits,
values,
--
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