diff --git a/tcl/board/digi_connectcore_wi-9c.cfg b/tcl/board/digi_connectcore_wi-9c.cfg
index 93317327586ff9872d969db8939cdf57f5f1ca36..f8b8912287f741b2a15d63c93ec0dc6a218b2468 100644
--- a/tcl/board/digi_connectcore_wi-9c.cfg
+++ b/tcl/board/digi_connectcore_wi-9c.cfg
@@ -26,7 +26,7 @@ jtag_rclk 1000
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
-   set _CPUTAPID 0xFFFFFFFF
+   set _CPUTAPID 0x07926031
 }
 
 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
@@ -41,6 +41,7 @@ jtag_ntrst_delay 0
 ######################
 
 target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+
 $_TARGETNAME configure -event reset-init {
 	mww 0x90600104 0x33313333
 	mww 0xA0700000 0x00000001  # Enable the memory controller.
@@ -99,12 +100,12 @@ $_TARGETNAME configure -event reset-init {
 	mww 0xA0700160 0x00084280   # Enable buffer access
 
 	#Set byte lane state (static mem 1)"
-	mww 0xA0700220, 0x00000082
+	mww 0xA0700220 0x00000082
 	#Flash Start
-	mww 0xA09001F8, 0x50000000
+	mww 0xA09001F8 0x50000000
 	#Flash Mask Reg
-	mww 0xA09001FC, 0xFF000001
-	mww 0xA0700028, 0x00000001
+	mww 0xA09001FC 0xFF000001
+	mww 0xA0700028 0x00000001
 
 	#  RAMAddr = 0x00020000
 	#  RAMSize = 0x00004000
@@ -122,6 +123,3 @@ $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00000000 -work-area-s
 #M29DW323DB - not working
 #flash bank cfi <base> <size> <chip width> <bus width> <target#>
 flash bank cfi 0x50000000 0x0400000 2 2 0
-
-
-