diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 8e8665bc44c4ec4b8cbf4e71981133379c949955..3a567abae43d699cb3e6d62927a65405524607f0 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -1372,8 +1372,12 @@ int cortex_m3_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
 	
 	/* write ack back to software dcc register
 	 * signify we have read data */
-	dcrdr = 0;
-	ahbap_write_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR);
+	if (dcrdr & (1 << 0))
+	{
+		dcrdr = 0;
+		ahbap_write_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR);
+	}
+	
 	return ERROR_OK;
 }
 
@@ -1413,10 +1417,11 @@ int cortex_m3_handle_target_request(void *priv)
 		cortex_m3_dcc_read(swjdp, &data, &ctrl);
 		
 		/* check if we have data */
-		if (ctrl & (1<<0))
+		if (ctrl & (1 << 0))
 		{
 			u32 request;
 			
+			/* we assume target is quick enough */
 			request = data;
 			cortex_m3_dcc_read(swjdp, &data, &ctrl);
 			request |= (data << 8);