diff --git a/doc/openocd.texi b/doc/openocd.texi
index 4a40551e091be41682467139961099a8a1091156..78d53c582a0a55f89325f47371371687f563128c 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -2509,22 +2509,19 @@ Use the standard str9 driver for programming. @xref{STR9 specific commands}.
 
 @subsection mFlash Configuration
 @cindex mFlash Configuration
-@b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
-<@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target}>
+@b{mflash bank} <@var{soc}> <@var{base}> <@var{RST pin}> <@var{target}>
 @cindex mflash bank
 @*Configures a mflash for <@var{soc}> host bank at
-<@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
-order. Pin number format is dependent on host GPIO calling convention.
-If WP or DPD pin was not used, write -1. Currently, mflash bank
-support s3c2440 and pxa270.
+<@var{base}>. Pin number format is dependent on host GPIO calling convention.
+Currently, mflash bank support s3c2440 and pxa270.
 
-(ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
+(ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1.
 @example
-mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
+mflash bank s3c2440 0x10000000 1b 0
 @end example
-(ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
+(ex. of pxa270) mflash <@var{RST pin}> is GPIO 43.
 @example
-mflash bank pxa270 0x08000000 2 2 43 -1 51 0  
+mflash bank pxa270 0x08000000 43 0  
 @end example
 
 @section Microcontroller specific Flash Commands
diff --git a/src/flash/mflash.c b/src/flash/mflash.c
index 9e13151e3693f78d72654c14beb76253cb700626..f668db0d7c27cf258e14eaafd19133c9cb0693a8 100644
--- a/src/flash/mflash.c
+++ b/src/flash/mflash.c
@@ -203,16 +203,6 @@ static int mg_init_gpio (void)
 	gpio_drv->set_gpio_to_output(mflash_bank->rst_pin);
 	gpio_drv->set_gpio_output_val(mflash_bank->rst_pin, 1);
 
-	if (mflash_bank->wp_pin.num != -1) {
-		gpio_drv->set_gpio_to_output(mflash_bank->wp_pin);
-		gpio_drv->set_gpio_output_val(mflash_bank->wp_pin, 1);
-	}
-
-	if (mflash_bank->dpd_pin.num != -1) {
-		gpio_drv->set_gpio_to_output(mflash_bank->dpd_pin);
-		gpio_drv->set_gpio_output_val(mflash_bank->dpd_pin, 1);
-	}
-
 	return ERROR_OK;
 }
 
@@ -790,30 +780,22 @@ static int mg_bank_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args
 	char *str;
 	int i;
 
-	if (argc < 8)
+	if (argc < 4)
 	{
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	if ((target = get_target(args[7])) == NULL)
+	if ((target = get_target(args[3])) == NULL)
 	{
-		LOG_ERROR("target '%s' not defined", args[7]);
+		LOG_ERROR("target '%s' not defined", args[3]);
 		return ERROR_FAIL;
 	}
 
 	mflash_bank = calloc(sizeof(mflash_bank_t), 1);
 	mflash_bank->base = strtoul(args[1], NULL, 0);
-	mflash_bank->chip_width = strtoul(args[2], NULL, 0);
-	mflash_bank->bus_width = strtoul(args[3], NULL, 0);
-	mflash_bank->rst_pin.num = strtoul(args[4], &str, 0);
+	mflash_bank->rst_pin.num = strtoul(args[2], &str, 0);
 	if (*str)
 		mflash_bank->rst_pin.port[0] = (u16)tolower(str[0]);
-	mflash_bank->wp_pin.num = strtol(args[5], &str, 0);
-	if (*str)
-		mflash_bank->wp_pin.port[0] = (u16)tolower(str[0]);
-	mflash_bank->dpd_pin.num = strtol(args[6], &str, 0);
-	if (*str)
-		mflash_bank->dpd_pin.port[0] = (u16)tolower(str[0]);
 
 	mflash_bank->target = target;
 
@@ -835,6 +817,6 @@ int mflash_register_commands(struct command_context_s *cmd_ctx)
 {
 	mflash_cmd = register_command(cmd_ctx, NULL, "mflash", NULL, COMMAND_ANY, NULL);
 	register_command(cmd_ctx, mflash_cmd, "bank", mg_bank_cmd, COMMAND_CONFIG,
-			"mflash bank <soc> <base> <chip_width> <bus_width> <RST pin> <WP pin> <DPD pin> <target #>");
+			"mflash bank <soc> <base> <RST pin> <target #>");
 	return ERROR_OK;
 }
diff --git a/src/flash/mflash.h b/src/flash/mflash.h
index e78f24864ff481cf62954ff90e957e45ef9f0038..d44291651a10770fc53599eb04a52edfae207fea 100644
--- a/src/flash/mflash.h
+++ b/src/flash/mflash.h
@@ -125,12 +125,8 @@ typedef struct mg_drv_info_s {
 typedef struct mflash_bank_s
 {
 	u32 base;
-	u32 chip_width;
-	u32 bus_width;
 
 	mflash_gpio_num_t rst_pin;
-	mflash_gpio_num_t wp_pin;
-	mflash_gpio_num_t dpd_pin;
 
 	mflash_gpio_drv_t *gpio_drv;
 	target_t *target;