diff --git a/testing/examples/STR710Test/inc/typedefs.h b/testing/examples/STR710Test/inc/typedefs.h
new file mode 100644
index 0000000000000000000000000000000000000000..a7201fdc0b8f523cbd6a803b14b8c2288519afb3
--- /dev/null
+++ b/testing/examples/STR710Test/inc/typedefs.h
@@ -0,0 +1,50 @@
+/****************************************************************************
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* 2. Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* 3. Neither the name of the author nor the names of its contributors may
+* be used to endorse or promote products derived from this software
+* without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+* SUCH DAMAGE.
+*
+****************************************************************************
+* History:
+*
+* 30.03.06 mifi First Version for Insight tutorial
+****************************************************************************/
+#ifndef __TYPEDEFS_H__
+#define __TYPEDEFS_H__
+
+/*
+ * Some types to use Windows like source
+ */
+typedef char CHAR; /* 8-bit signed data */
+typedef unsigned char BYTE; /* 8-bit unsigned data */
+typedef unsigned short WORD; /* 16-bit unsigned data */
+typedef long LONG; /* 32-bit signed data */
+typedef unsigned long ULONG; /* 32-bit unsigned data */
+typedef unsigned long DWORD; /* 32-bit unsigned data */
+
+
+#endif /* !__TYPEDEFS_H__ */
+/*** EOF ***/
diff --git a/testing/examples/STR710Test/makefile b/testing/examples/STR710Test/makefile
new file mode 100644
index 0000000000000000000000000000000000000000..b2f00ead84f118b70d91598102b1faf6b17a1b34
--- /dev/null
+++ b/testing/examples/STR710Test/makefile
@@ -0,0 +1,146 @@
+#
+# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
+#
+##############################################################################################
+#
+# On command line:
+#
+# make all = Create project
+#
+# make clean = Clean project files.
+#
+# To rebuild project do "make clean" and "make all".
+#
+
+##############################################################################################
+# Start of default section
+#
+
+TRGT = arm-elf-
+CC = $(TRGT)gcc
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+BIN = $(CP) -O ihex
+
+MCU = arm7tdmi
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################################
+
+##############################################################################################
+# Start of user section
+#
+
+# Define project name here
+PROJECT = test
+
+# Define linker script file here
+LDSCRIPT_RAM = ./prj/hitex_str7_ram.ld
+LDSCRIPT_ROM = ./prj/hitex_str7_rom.ld
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List C source files here
+SRC = ./src/main.c
+
+# List ASM source files here
+ASRC = ./src/crt.s
+
+# List all user directories here
+UINCDIR = ./inc
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+# Define optimisation level here
+OPT = -O0
+
+#
+# End of user defines
+##############################################################################################
+
+
+INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
+LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
+DEFS = $(DDEFS) $(UDEFS)
+ADEFS = $(DADEFS) $(UADEFS)
+OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
+LIBS = $(DLIBS) $(ULIBS)
+MCFLAGS = -mcpu=$(MCU)
+
+ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
+CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
+LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)
+LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)
+
+# Generate dependency information
+CPFLAGS += -MD -MP -MF .dep/$(@F).d
+
+#
+# makefile rules
+#
+
+all: RAM ROM
+
+RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex
+
+ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex
+
+%o : %c
+ $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
+
+%o : %s
+ $(AS) -c $(ASFLAGS) $< -o $@
+
+%ram.elf: $(OBJS)
+ $(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@
+
+%rom.elf: $(OBJS)
+ $(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@
+
+%hex: %elf
+ $(BIN) $< $@
+
+clean:
+ -rm -f $(OBJS)
+ -rm -f $(PROJECT)_ram.elf
+ -rm -f $(PROJECT)_ram.map
+ -rm -f $(PROJECT)_ram.hex
+ -rm -f $(PROJECT)_rom.elf
+ -rm -f $(PROJECT)_rom.map
+ -rm -f $(PROJECT)_rom.hex
+ -rm -f $(SRC:.c=.c.bak)
+ -rm -f $(SRC:.c=.lst)
+ -rm -f $(ASRC:.s=.s.bak)
+ -rm -f $(ASRC:.s=.lst)
+ -rm -fR .dep
+
+#
+# Include the dependency files, should be the last of the makefile
+#
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# *** EOF ***
\ No newline at end of file
diff --git a/testing/examples/STR710Test/prj/eclipse_ram.gdb b/testing/examples/STR710Test/prj/eclipse_ram.gdb
new file mode 100644
index 0000000000000000000000000000000000000000..2ce0e9ae6b6343b7bb052493b80f63de18e6f658
--- /dev/null
+++ b/testing/examples/STR710Test/prj/eclipse_ram.gdb
@@ -0,0 +1,11 @@
+target remote localhost:3333
+monitor reset
+monitor sleep 500
+monitor poll
+monitor soft_reset_halt
+monitor arm7_9 sw_bkpts enable
+monitor mww 0xA0000050 0x01c2
+monitor mdw 0xA0000050
+load
+break main
+continue
\ No newline at end of file
diff --git a/testing/examples/STR710Test/prj/eclipse_rom.gdb b/testing/examples/STR710Test/prj/eclipse_rom.gdb
new file mode 100644
index 0000000000000000000000000000000000000000..e4a606c97850e70da8a98e63af9f50f37a0ff396
--- /dev/null
+++ b/testing/examples/STR710Test/prj/eclipse_rom.gdb
@@ -0,0 +1,11 @@
+target remote localhost:3333
+monitor reset
+monitor sleep 500
+monitor poll
+monitor soft_reset_halt
+monitor arm7_9 force_hw_bkpts enable
+monitor mww 0xA0000050 0x01c2
+monitor mdw 0xA0000050
+load
+break main
+continue
\ No newline at end of file
diff --git a/testing/examples/STR710Test/prj/hitex_str7_ram.ld b/testing/examples/STR710Test/prj/hitex_str7_ram.ld
new file mode 100644
index 0000000000000000000000000000000000000000..33d1abfe4b383437125273d8aa5974331bf48483
--- /dev/null
+++ b/testing/examples/STR710Test/prj/hitex_str7_ram.ld
@@ -0,0 +1,255 @@
+/***********************************************************************************
+* Copyright 2005 Anglia Design
+* This demo code and associated components are provided as is and has no warranty,
+* implied or otherwise. You are free to use/modify any of the provided
+* code at your own risk in your applications with the expressed limitation
+* of liability (see below)
+*
+* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
+* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
+* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
+* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+*
+* Author : Spencer Oliver
+* Web : www.anglia-designs.com
+*
+***********************************************************************************/
+
+/* Stack Sizes */
+
+ _STACKSIZE = 1024;
+ _STACKSIZE_IRQ = 256;
+ _STACKSIZE_FIQ = 0;
+ _STACKSIZE_SVC = 1024;
+ _STACKSIZE_ABT = 0;
+ _STACKSIZE_UND = 0;
+ _HEAPSIZE = 1024;
+
+/* Memory Definitions */
+
+MEMORY
+{
+ DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000
+}
+
+/* Section Definitions */
+
+SECTIONS
+{
+ /* first section is .text which is used for code */
+
+ .text :
+ {
+ CREATE_OBJECT_SYMBOLS
+ KEEP(*(.vectrom))
+ KEEP(*(.init))
+ *(.text .text.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+ KEEP(*(.fini))
+ *(.gcc_except_table)
+ } >DATA =0
+ . = ALIGN(4);
+
+ /* .ctors .dtors are used for c++ constructors/destructors */
+
+ .ctors :
+ {
+ PROVIDE(__ctors_start__ = .);
+ KEEP(*(SORT(.ctors.*)))
+ KEEP(*(.ctors))
+ PROVIDE(__ctors_end__ = .);
+ } >DATA
+
+ .dtors :
+ {
+ PROVIDE(__dtors_start__ = .);
+ KEEP(*(SORT(.dtors.*)))
+ KEEP(*(.dtors))
+ PROVIDE(__dtors_end__ = .);
+ } >DATA
+
+ /* .rodata section which is used for read-only data (constants) */
+
+ .rodata :
+ {
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.r.*)
+ } >DATA
+ . = ALIGN(4);
+
+ .init_array :
+ {
+ *(.init)
+ *(.fini)
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(.fini_array))
+ KEEP (*(SORT(.fini_array.*)))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >DATA
+
+ . = ALIGN(4);
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } >DATA
+ __exidx_end = .;
+
+ _vectext = .;
+ PROVIDE (vectext = .);
+
+ .vect : AT (_vectext)
+ {
+ _vecstart = .;
+ KEEP(*(.vectram))
+ _vecend = .;
+ } >DATA
+
+ _etext = _vectext + SIZEOF(.vect);
+ PROVIDE (etext = .);
+
+ /* .data section which is used for initialized data */
+
+ .data : AT (_etext)
+ {
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ SORT(CONSTRUCTORS)
+ } >DATA
+ . = ALIGN(4);
+
+ __data_start = .;
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* .bss section which is used for uninitialized data */
+
+ .bss :
+ {
+ __bss_start = .;
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+ *(COMMON)
+ . = ALIGN(4);
+ } >DATA
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+ __bss_end__ = .;
+
+ _end = .;
+ PROVIDE(end = .);
+
+ /* .heap section which is used for memory allocation */
+
+ .heap (NOLOAD) :
+ {
+ __heap_start__ = .;
+ *(.heap)
+ . = MAX(__heap_start__ + _HEAPSIZE , .);
+ } >DATA
+ __heap_end__ = __heap_start__ + SIZEOF(.heap);
+
+ /* .stack section - user mode stack */
+
+ .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_start__ = .;
+ *(.stack)
+ . = MAX(__stack_start__ + _STACKSIZE , .);
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+
+ /* .stack_irq section */
+
+ .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_irq_start__ = .;
+ *(.stack_irq)
+ . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);
+ } >DATA
+ __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);
+
+ /* .stack_fiq section */
+
+ .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_fiq_start__ = .;
+ *(.stack_fiq)
+ . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);
+ } >DATA
+ __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);
+
+ /* .stack_svc section */
+
+ .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_svc_start__ = .;
+ *(.stack_svc)
+ . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);
+ } >DATA
+ __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);
+
+ /* .stack_abt section */
+
+ .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_abt_start__ = .;
+ *(.stack_abt)
+ . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);
+ } >DATA
+ __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);
+
+ /* .stack_und section */
+
+ .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_und_start__ = .;
+ *(.stack_und)
+ . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);
+ } >DATA
+ __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/testing/examples/STR710Test/prj/hitex_str7_rom.ld b/testing/examples/STR710Test/prj/hitex_str7_rom.ld
new file mode 100644
index 0000000000000000000000000000000000000000..8fc4aa5585c484987323de0edd37b9836fda3736
--- /dev/null
+++ b/testing/examples/STR710Test/prj/hitex_str7_rom.ld
@@ -0,0 +1,259 @@
+/***********************************************************************************
+* Copyright 2005 Anglia Design
+* This demo code and associated components are provided as is and has no warranty,
+* implied or otherwise. You are free to use/modify any of the provided
+* code at your own risk in your applications with the expressed limitation
+* of liability (see below)
+*
+* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
+* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
+* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
+* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+*
+* Author : Spencer Oliver
+* Web : www.anglia-designs.com
+*
+***********************************************************************************/
+
+/* Stack Sizes */
+
+ _STACKSIZE = 1024;
+ _STACKSIZE_IRQ = 256;
+ _STACKSIZE_FIQ = 0;
+ _STACKSIZE_SVC = 1024;
+ _STACKSIZE_ABT = 0;
+ _STACKSIZE_UND = 0;
+ _HEAPSIZE = 1024;
+
+/* Memory Definitions */
+
+MEMORY
+{
+ CODE (rx) : ORIGIN = 0x40000000, LENGTH = 0x00040000
+ DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000
+}
+
+/* Section Definitions */
+
+SECTIONS
+{
+ /* first section is .text which is used for code */
+
+ .text :
+ {
+ CREATE_OBJECT_SYMBOLS
+ KEEP(*(.vectrom))
+ KEEP(*(.init))
+ *(.text .text.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+ KEEP(*(.fini))
+ *(.gcc_except_table)
+ } >CODE =0
+ . = ALIGN(4);
+
+ /* .ctors .dtors are used for c++ constructors/destructors */
+
+ .ctors :
+ {
+ PROVIDE(__ctors_start__ = .);
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+ PROVIDE(__ctors_end__ = .);
+ } >CODE
+
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+ KEEP(*(.dtors))
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+ } >CODE
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+ {
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.r.*)
+ } >CODE
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+
+ .init_array :
+ {
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+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >CODE
+
+ . = ALIGN(4);
+
+ /* .ARM.exidx is sorted, so has to go in its own output section. */
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+ .ARM.exidx :
+ {
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+ } >CODE
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+ _vectext = .;
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+
+ _etext = _vectext + SIZEOF(.vect);
+ PROVIDE (etext = .);
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+ /* .data section which is used for initialized data */
+
+ .data : AT (_etext)
+ {
+ __data_start = .;
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ SORT(CONSTRUCTORS)
+ . = ALIGN(4);
+ *(.fastrun .fastrun.*)
+ } >DATA
+ . = ALIGN(4);
+
+ _edata = .;
+ PROVIDE (edata = .);
+
+ /* .bss section which is used for uninitialized data */
+
+ .bss :
+ {
+ __bss_start = .;
+ __bss_start__ = .;
+ *(.bss .bss.*)
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+ *(COMMON)
+ . = ALIGN(4);
+ } >DATA
+ . = ALIGN(4);
+ __bss_end__ = .;
+
+ _end = .;
+ PROVIDE(end = .);
+
+ /* .heap section which is used for memory allocation */
+
+ .heap (NOLOAD) :
+ {
+ __heap_start__ = .;
+ *(.heap)
+ . = MAX(__heap_start__ + _HEAPSIZE , .);
+ } >DATA
+ __heap_end__ = __heap_start__ + SIZEOF(.heap);
+
+ /* .stack section - user mode stack */
+
+ .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_start__ = .;
+ *(.stack)
+ . = MAX(__stack_start__ + _STACKSIZE , .);
+ } >DATA
+ __stack_end__ = __stack_start__ + SIZEOF(.stack);
+
+ /* .stack_irq section */
+
+ .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_irq_start__ = .;
+ *(.stack_irq)
+ . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);
+ } >DATA
+ __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);
+
+ /* .stack_fiq section */
+
+ .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_fiq_start__ = .;
+ *(.stack_fiq)
+ . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);
+ } >DATA
+ __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);
+
+ /* .stack_svc section */
+
+ .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_svc_start__ = .;
+ *(.stack_svc)
+ . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);
+ } >DATA
+ __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);
+
+ /* .stack_abt section */
+
+ .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_abt_start__ = .;
+ *(.stack_abt)
+ . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);
+ } >DATA
+ __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);
+
+ /* .stack_und section */
+
+ .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :
+ {
+ __stack_und_start__ = .;
+ *(.stack_und)
+ . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);
+ } >DATA
+ __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
+
diff --git a/testing/examples/STR710Test/prj/str710_jtagkey.cfg b/testing/examples/STR710Test/prj/str710_jtagkey.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..b5b8bfb659dbe1878216110638df655bc1191dbf
--- /dev/null
+++ b/testing/examples/STR710Test/prj/str710_jtagkey.cfg
@@ -0,0 +1,40 @@
+#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+# tell gdb our flash memory map
+# and enable flash programming
+gdb_memory_map enable
+gdb_flash_program enable
+
+#interface
+interface ft2232
+ft2232_device_desc "Amontec JTAGkey A"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
+jtag_speed 0
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst srst_pulls_trst
+
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+
+#target configuration
+daemon_startup reset
+
+#target <type> <startup mode>
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
+target arm7tdmi little run_and_halt 0 arm7tdmi
+run_and_halt_time 0 30
+
+target_script 0 gdb_program_config .\prj\str710_program.script
+
+working_area 0 0x2000C000 0x4000 nobackup
+
+#flash bank str7x <base> <size> 0 0 <target#> <variant>
+flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
+
+# For more information about the configuration files, take a look at:
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
diff --git a/testing/examples/STR710Test/prj/str710_program.script b/testing/examples/STR710Test/prj/str710_program.script
new file mode 100644
index 0000000000000000000000000000000000000000..9b1b2f282c609cdf45240ddbb0d6780ff56f96e6
--- /dev/null
+++ b/testing/examples/STR710Test/prj/str710_program.script
@@ -0,0 +1,8 @@
+flash protect 0 0 7 off
+
+
+
+
+
+
+
diff --git a/testing/examples/STR710Test/src/crt.s b/testing/examples/STR710Test/src/crt.s
new file mode 100644
index 0000000000000000000000000000000000000000..2b3b7f485e8fdf4bcc499751a0cdada424203212
--- /dev/null
+++ b/testing/examples/STR710Test/src/crt.s
@@ -0,0 +1,300 @@
+/****************************************************************************
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* 2. Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* 3. Neither the name of the author nor the names of its contributors may
+* be used to endorse or promote products derived from this software
+* without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+* SUCH DAMAGE.
+*
+****************************************************************************
+*
+* History:
+*
+* 04.03.06 mifi First Version
+* This version based on an example from Ethernut and
+* "ARM Cross Development with Eclipse" from James P. Lynch
+*
+* 26.01.08 mifi Change the code of the init section. Here I have used
+* some of the source from the Anglia startup.s
+* Author: Spencer Oliver (www.anglia-designs.com)
+****************************************************************************/
+
+/*
+ * Some defines for the program status registers
+ */
+ ARM_MODE_USER = 0x10 /* Normal User Mode */
+ ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
+ ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
+ ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
+ ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
+ ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
+ ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
+ ARM_MODE_MASK = 0x1F
+
+ I_BIT = 0x80 /* disable IRQ when I bit is set */
+ F_BIT = 0x40 /* disable IRQ when I bit is set */
+
+/*
+ * Register Base Address
+ */
+ PRCCU_BASE = 0xA0000000
+ RCCU_CFR = 0x08
+ RCCU_PLL1CR = 0x18
+ PCU_MDIVR = 0x40
+ PCU_PDIVR = 0x44
+ PCU_BOOTCR = 0x50
+
+
+ .section .vectors,"ax"
+ .code 32
+
+/****************************************************************************/
+/* Vector table and reset entry */
+/****************************************************************************/
+_vectors:
+ ldr pc, ResetAddr /* Reset */
+ ldr pc, UndefAddr /* Undefined instruction */
+ ldr pc, SWIAddr /* Software interrupt */
+ ldr pc, PAbortAddr /* Prefetch abort */
+ ldr pc, DAbortAddr /* Data abort */
+ ldr pc, ReservedAddr /* Reserved */
+ ldr pc, IRQAddr /* IRQ interrupt */
+ ldr pc, FIQAddr /* FIQ interrupt */
+
+
+ResetAddr: .word ResetHandler
+UndefAddr: .word UndefHandler
+SWIAddr: .word SWIHandler
+PAbortAddr: .word PAbortHandler
+DAbortAddr: .word DAbortHandler
+ReservedAddr: .word 0
+IRQAddr: .word IRQHandler
+FIQAddr: .word FIQHandler
+
+ .ltorg
+
+
+ .section .init, "ax"
+ .code 32
+
+ .global ResetHandler
+ .global ExitFunction
+ .extern main
+/****************************************************************************/
+/* Reset handler */
+/****************************************************************************/
+ResetHandler:
+/*
+ * Wait for the oscillator is stable
+ */
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+
+/*
+ * Setup STR71X, for more information about the register
+ * take a look in the STR71x Microcontroller Reference Manual.
+ *
+ * Reference is made to: Rev. 6 March 2005
+ *
+ * 1. Map internal RAM to address 0
+ * In this case, we are running always in the RAM
+ * this make no sence. But if we are in flash, we
+ * can copy the interrupt vectors into the ram and
+ * switch to RAM mode.
+ *
+ * 2. Setup the PLL, the eval board HITEX STR7 is equipped
+ * with an external 16MHz oscillator. We want:
+ *
+ * RCLK: 32MHz = (CLK2 * 16) / 4
+ * MCLK: 32Mhz
+ * PCLK1: 32MHz
+ * PCLK2: 32MHz
+ *
+ */
+
+ /*
+ * 1. Map RAM to the boot memory 0x00000000
+ */
+ ldr r0, =PRCCU_BASE
+ ldr r1, =0x01C2
+ str r1, [r0, #PCU_BOOTCR]
+
+
+ /*
+ * 2. Setup PLL start
+ */
+
+ /* Set the prescaling factor for APB and APB1 group */
+ ldr r0, =PRCCU_BASE
+ ldr r1, =0x0000 /* no prescaling PCLKx = RCLK */
+ str r1, [r0, #PCU_PDIVR]
+
+ /* Set the prescaling factor for the Main System Clock MCLK */
+ ldr r0, =PRCCU_BASE
+ ldr r1, =0x0000 /* no prescaling MCLK = RCLK
+ str r1, [r0, #PCU_MDIVR]
+
+ /* Configure the PLL1 ( * 16 , / 4 ) */
+ ldr r0, =PRCCU_BASE
+ ldr r1, =0x0073
+ str r1, [r0, #RCCU_PLL1CR]
+
+ /* Check if the PLL is locked */
+pll_lock_loop:
+ ldr r1, [r0, #RCCU_CFR]
+ tst r1, #0x0002
+ beq pll_lock_loop
+
+ /* Select PLL1_Output as RCLK clock */
+ ldr r0, =PRCCU_BASE
+ ldr r1, =0x8009
+ str r1, [r0, #RCCU_CFR]
+
+ /*
+ * Setup PLL end
+ */
+
+
+ /*
+ * Setup a stack for each mode
+ */
+ msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
+ ldr sp, =__stack_und_end__
+
+ msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
+ ldr sp, =__stack_abt_end__
+
+ msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
+ ldr sp, =__stack_fiq_end__
+
+ msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
+ ldr sp, =__stack_irq_end__
+
+ msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
+ ldr sp, =__stack_svc_end__
+
+
+ /*
+ * Now init all the sections
+ */
+
+
+ /*
+ * Relocate .data section (Copy from ROM to RAM)
+ */
+ ldr r1, =_etext
+ ldr r2, =__data_start
+ ldr r3, =_edata
+LoopRel:
+ cmp r2, r3
+ ldrlo r0, [r1], #4
+ strlo r0, [r2], #4
+ blo LoopRel
+
+
+ /*
+ * Clear .bss section (Zero init)
+ */
+ mov r0, #0
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+LoopZI:
+ cmp r1, r2
+ strlo r0, [r1], #4
+ blo LoopZI
+
+
+ /*
+ * Call C++ constructors
+ */
+ ldr r0, =__ctors_start__
+ ldr r1, =__ctors_end__
+ctor_loop:
+ cmp r0, r1
+ beq ctor_end
+ ldr r2, [r0], #4
+ stmfd sp!, {r0-r1}
+ mov lr, pc
+ mov pc, r2
+ ldmfd sp!, {r0-r1}
+ b ctor_loop
+ctor_end:
+
+
+ /*
+ * Jump to main
+ */
+ mrs r0, cpsr
+ bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
+ msr cpsr, r0
+
+ mov r0, #0 /* No arguments */
+ mov r1, #0 /* No arguments */
+ ldr r2, =main
+ mov lr, pc
+ bx r2 /* And jump... */
+
+ExitFunction:
+ nop
+ nop
+ nop
+ b ExitFunction
+
+
+/****************************************************************************/
+/* Default interrupt handler */
+/****************************************************************************/
+
+UndefHandler:
+ b UndefHandler
+
+SWIHandler:
+ b SWIHandler
+
+PAbortHandler:
+ b PAbortHandler
+
+DAbortHandler:
+ b DAbortHandler
+
+IRQHandler:
+ b IRQHandler
+
+FIQHandler:
+ b FIQHandler
+
+ .weak ExitFunction
+ .weak UndefHandler, PAbortHandler, DAbortHandler
+ .weak IRQHandler, FIQHandler
+
+ .ltorg
+/*** EOF ***/
+
+
\ No newline at end of file
diff --git a/testing/examples/STR710Test/src/main.c b/testing/examples/STR710Test/src/main.c
new file mode 100644
index 0000000000000000000000000000000000000000..776ffc75b8d45a60cda3ecbfd0462747b3925ac3
--- /dev/null
+++ b/testing/examples/STR710Test/src/main.c
@@ -0,0 +1,91 @@
+/****************************************************************************
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* 2. Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* 3. Neither the name of the author nor the names of its contributors may
+* be used to endorse or promote products derived from this software
+* without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+* SUCH DAMAGE.
+*
+****************************************************************************
+* History:
+*
+* 30.03.06 mifi First Version for Insight tutorial
+* 26.01.08 mifi Added variable "d" to test const variable.
+****************************************************************************/
+#define __MAIN_C__
+
+/*
+ * I use the include only, to show
+ * how to setup a include dir in the makefile
+ */
+#include "typedefs.h"
+
+/*=========================================================================*/
+/* DEFINE: All Structures and Common Constants */
+/*=========================================================================*/
+
+/*=========================================================================*/
+/* DEFINE: Prototypes */
+/*=========================================================================*/
+
+/*=========================================================================*/
+/* DEFINE: Definition of all local Data */
+/*=========================================================================*/
+static const DWORD d = 7;
+
+/*=========================================================================*/
+/* DEFINE: Definition of all local Procedures */
+/*=========================================================================*/
+
+/*=========================================================================*/
+/* DEFINE: All code exported */
+/*=========================================================================*/
+/***************************************************************************/
+/* main */
+/***************************************************************************/
+int main (void)
+{
+ DWORD a = 1;
+ DWORD b = 2;
+ DWORD c = 0;
+
+ a = a + d;
+
+ while (1)
+ {
+ a++;
+ b++;
+ c = a + b;
+ }
+
+ /*
+ * This return here make no sense.
+ * But to prevent the compiler warning:
+ * "return type of 'main' is not 'int'
+ * we use an int as return :-)
+ */
+ return(0);
+}
+
+/*** EOF ***/