diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 94f68f69899677b63a040418a4c7ec54da826877..6bdb1df67b4c4b899e5df0989bf39a04ecf088f3 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -691,14 +691,6 @@ int cortex_m3_assert_reset(target_t *target)
 		ahbap_write_system_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET );
 	}
 	
-	if (target->state == TARGET_HALTED || target->state == TARGET_UNKNOWN)
-	{
-		/* assert SRST and TRST */
-		/* system would get ouf sync if we didn't reset test-logic, too */
-		jtag_add_reset(1, 1);
-		jtag_add_sleep(5000);
-	}
-
 	if (jtag_reset_config & RESET_SRST_PULLS_TRST)
 	{
 		jtag_add_reset(1, 1);
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 6d7854ea35490f7d306e5781a212968fadbf742d..096e4baf08fb47fa2757b7e0b5d3a6e503bddd72 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -1595,15 +1595,6 @@ int xscale_assert_reset(target_t *target)
 
 	LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
 
-	/* TRST every time. We want to be able to support daemon_startup attach */
-	jtag_add_reset(1, 0);
-	jtag_add_sleep(5000);
-	jtag_add_reset(0, 0);
-	jtag_add_sleep(5000);
-	jtag_execute_queue();
-
-	
-	
 	/* select DCSR instruction (set endstate to R-T-I to ensure we don't
 	 * end up in T-L-R, which would reset JTAG
 	 */