diff --git a/src/target/mips32.h b/src/target/mips32.h
index a7a98b5c839821ea199a23f7146f4b206034d047..9018d85ce07c863c886fb20769bee23386fc833b 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -66,7 +66,9 @@ typedef struct mips32_core_reg_s
#define MIPS32_OP_LBU 0x24
#define MIPS32_OP_LHU 0x25
#define MIPS32_OP_MFHI 0x10
+#define MIPS32_OP_MTHI 0x11
#define MIPS32_OP_MFLO 0x12
+#define MIPS32_OP_MTLO 0x13
#define MIPS32_OP_SB 0x28
#define MIPS32_OP_SH 0x29
#define MIPS32_OP_SW 0x2B
@@ -90,8 +92,10 @@ typedef struct mips32_core_reg_s
#define MIPS32_LHU(reg, off, base) MIPS32_I_INST(MIPS32_OP_LHU, base, reg, off)
#define MIPS32_LUI(reg, val) MIPS32_I_INST(MIPS32_OP_LUI, 0, reg, val)
#define MIPS32_LW(reg, off, base) MIPS32_I_INST(MIPS32_OP_LW, base, reg, off)
-#define MIPS32_LO(reg) MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MFHI)
-#define MIPS32_HI(reg) MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MFLO)
+#define MIPS32_MFLO(reg) MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MFLO)
+#define MIPS32_MFHI(reg) MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MFHI)
+#define MIPS32_MTLO(reg) MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MTLO)
+#define MIPS32_MTHI(reg) MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MTHI)
#define MIPS32_ORI(src, tar, val) MIPS32_I_INST(MIPS32_OP_ORI, src, tar, val)
#define MIPS32_SB(reg, off, base) MIPS32_I_INST(MIPS32_OP_SB, base, reg, off)
#define MIPS32_SH(reg, off, base) MIPS32_I_INST(MIPS32_OP_SH, base, reg, off)
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 871b3f2119ec2039cc7eaba88c513592108cd41f..d641956d113d1b6d4ff792f39a5f2f287dcad7d4 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -258,17 +258,17 @@ int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *
MIPS32_B(NEG16(9)), /* b loop */
MIPS32_NOP,
/* end: */
- MIPS32_LW(11,0,15), /* sw $11,($15) */
- MIPS32_LW(10,0,15), /* sw $10,($15) */
- MIPS32_LW(9,0,15), /* sw $9,($15) */
- MIPS32_LW(8,0,15), /* sw $8,($15) */
+ MIPS32_LW(11,0,15), /* lw $11,($15) */
+ MIPS32_LW(10,0,15), /* lw $10,($15) */
+ MIPS32_LW(9,0,15), /* lw $9,($15) */
+ MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
MIPS32_B(NEG16(31)), /* b start */
MIPS32_NOP,
};
- int retval=ERROR_OK;
+ int retval = ERROR_OK;
int blocksize;
int bytesread;
u32 param_in[2];
@@ -331,10 +331,10 @@ int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *
MIPS32_B(NEG16(9)), /* b loop */
MIPS32_NOP,
- MIPS32_LW(11,0,15), /* sw $11,($15) */
- MIPS32_LW(10,0,15), /* sw $10,($15) */
- MIPS32_LW(9,0,15), /* sw $9,($15) */
- MIPS32_LW(8,0,15), /* sw $8,($15) */
+ MIPS32_LW(11,0,15), /* lw $11,($15) */
+ MIPS32_LW(10,0,15), /* lw $10,($15) */
+ MIPS32_LW(9,0,15), /* lw $9,($15) */
+ MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
MIPS32_B(NEG16(31)), /* b start */
@@ -410,10 +410,10 @@ int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *bu
MIPS32_B(NEG16(9)), /* b loop */
MIPS32_NOP,
/* end: */
- MIPS32_LW(11,0,15), /* sw $11,($15) */
- MIPS32_LW(10,0,15), /* sw $10,($15) */
- MIPS32_LW(9,0,15), /* sw $9,($15) */
- MIPS32_LW(8,0,15), /* sw $8,($15) */
+ MIPS32_LW(11,0,15), /* lw $11,($15) */
+ MIPS32_LW(10,0,15), /* lw $10,($15) */
+ MIPS32_LW(9,0,15), /* lw $9,($15) */
+ MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
MIPS32_B(NEG16(31)), /* b start */
@@ -503,10 +503,10 @@ int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32
MIPS32_B(NEG16(9)), /* b loop */
MIPS32_NOP,
/* end: */
- MIPS32_LW(11,0,15), /* sw $11,($15) */
- MIPS32_LW(10,0,15), /* sw $10,($15) */
- MIPS32_LW(9,0,15), /* sw $9,($15) */
- MIPS32_LW(8,0,15), /* sw $8,($15) */
+ MIPS32_LW(11,0,15), /* lw $11,($15) */
+ MIPS32_LW(10,0,15), /* lw $10,($15) */
+ MIPS32_LW(9,0,15), /* lw $9,($15) */
+ MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
MIPS32_B(NEG16(30)), /* b start */
@@ -559,10 +559,10 @@ int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16
MIPS32_B(NEG16(9)), /* b loop */
MIPS32_NOP,
/* end: */
- MIPS32_LW(11,0,15), /* sw $11,($15) */
- MIPS32_LW(10,0,15), /* sw $10,($15) */
- MIPS32_LW(9,0,15), /* sw $9,($15) */
- MIPS32_LW(8,0,15), /* sw $8,($15) */
+ MIPS32_LW(11,0,15), /* lw $11,($15) */
+ MIPS32_LW(10,0,15), /* lw $10,($15) */
+ MIPS32_LW(9,0,15), /* lw $9,($15) */
+ MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
MIPS32_B(NEG16(30)), /* b start */
@@ -619,10 +619,10 @@ int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *b
MIPS32_B(NEG16(9)), /* b loop */
MIPS32_NOP,
/* end: */
- MIPS32_LW(11,0,15), /* sw $11,($15) */
- MIPS32_LW(10,0,15), /* sw $10,($15) */
- MIPS32_LW(9,0,15), /* sw $9,($15) */
- MIPS32_LW(8,0,15), /* sw $8,($15) */
+ MIPS32_LW(11,0,15), /* lw $11,($15) */
+ MIPS32_LW(10,0,15), /* lw $10,($15) */
+ MIPS32_LW(9,0,15), /* lw $9,($15) */
+ MIPS32_LW(8,0,15), /* lw $8,($15) */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
MIPS32_B(NEG16(30)), /* b start */
@@ -649,21 +649,18 @@ int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, u8 *b
int mips32_pracc_write_regs(mips_ejtag_t *ejtag_info, u32 *regs)
{
- /* TODO restore all core registers */
-
u32 code[] = {
/* start: */
- MIPS32_MTC0(2,31,0), /* move $2 to COP0 DeSave */
MIPS32_LUI(2,UPPER16(MIPS32_PRACC_PARAM_IN)), /* $2 = MIPS32_PRACC_PARAM_IN */
MIPS32_ORI(2,2,LOWER16(MIPS32_PRACC_PARAM_IN)),
- /*MIPS32_LW(0,0*4,2),*/ /* lw $0,0*4($2) */
MIPS32_LW(1,1*4,2), /* lw $1,1*4($2) */
- MIPS32_MFC0(2,31,0), /* move COP0 DeSave to $2 */
-
- MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
+ MIPS32_LW(15,15*4,2), /* lw $15,15*4($2) */
+ MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
+ MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
+ MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
+ MIPS32_SW(1,0,15), /* sw $1,($15) */
MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_IN)), /* $1 = MIPS32_PRACC_PARAM_IN */
MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_IN)),
- MIPS32_LW(2,2*4,1), /* lw $2,2*4($1) */
MIPS32_LW(3,3*4,1), /* lw $3,3*4($1) */
MIPS32_LW(4,4*4,1), /* lw $4,4*4($1) */
MIPS32_LW(5,5*4,1), /* lw $5,5*4($1) */
@@ -676,7 +673,6 @@ int mips32_pracc_write_regs(mips_ejtag_t *ejtag_info, u32 *regs)
MIPS32_LW(12,12*4,1), /* lw $12,12*4($1) */
MIPS32_LW(13,13*4,1), /* lw $13,13*4($1) */
MIPS32_LW(14,14*4,1), /* lw $14,14*4($1) */
- MIPS32_LW(15,15*4,1), /* lw $15,15*4($1) */
MIPS32_LW(16,16*4,1), /* lw $16,16*4($1) */
MIPS32_LW(17,17*4,1), /* lw $17,17*4($1) */
MIPS32_LW(18,18*4,1), /* lw $18,18*4($1) */
@@ -694,16 +690,31 @@ int mips32_pracc_write_regs(mips_ejtag_t *ejtag_info, u32 *regs)
MIPS32_LW(30,30*4,1), /* lw $30,30*4($1) */
MIPS32_LW(31,31*4,1), /* lw $31,31*4($1) */
- MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
+ MIPS32_LW(2,32*4,1), /* lw $2,32*4($1) */
+ MIPS32_MTC0(2,12,0), /* move $2 to status */
+ MIPS32_LW(2,33*4,1), /* lw $2,33*4($1) */
+ MIPS32_MTLO(2), /* move $2 to lo */
+ MIPS32_LW(2,34*4,1), /* lw $2,34*4($1) */
+ MIPS32_MTHI(2), /* move $2 to hi */
+ MIPS32_LW(2,35*4,1), /* lw $2,35*4($1) */
+ MIPS32_MTC0(2,8,0), /* move $2 to badvaddr */
+ MIPS32_LW(2,36*4,1), /* lw $2,36*4($1) */
+ MIPS32_MTC0(2,13,0), /* move $2 to cause*/
+ MIPS32_LW(2,37*4,1), /* lw $2,37*4($1) */
+ MIPS32_MTC0(2,24,0), /* move $2 to pc */
+
+ MIPS32_LW(2,2*4,1), /* lw $2,2*4($1) */
+ MIPS32_LW(1,0,15), /* lw $1,($15) */
+ MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
- MIPS32_B(NEG16(41)), /* b start */
+ MIPS32_B(NEG16(55)), /* b start */
MIPS32_NOP,
};
int retval;
retval = mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
- 32, regs, 0, NULL, 1);
+ 38, regs, 0, NULL, 1);
return retval;
}
@@ -758,9 +769,9 @@ int mips32_pracc_read_regs(mips_ejtag_t *ejtag_info, u32 *regs)
MIPS32_MFC0(2,12,0), /* move status to $2 */
MIPS32_SW(2,32*4,1), /* sw $2,32*4($1) */
- MIPS32_LO(2), /* move lo to $2 */
+ MIPS32_MFLO(2), /* move lo to $2 */
MIPS32_SW(2,33*4,1), /* sw $2,33*4($1) */
- MIPS32_HI(2), /* move hi to $2 */
+ MIPS32_MFHI(2), /* move hi to $2 */
MIPS32_SW(2,34*4,1), /* sw $2,34*4($1) */
MIPS32_MFC0(2,8,0), /* move badvaddr to $2 */
MIPS32_SW(2,35*4,1), /* sw $2,35*4($1) */
@@ -769,8 +780,8 @@ int mips32_pracc_read_regs(mips_ejtag_t *ejtag_info, u32 *regs)
MIPS32_MFC0(2,24,0), /* move pc to $2 */
MIPS32_SW(2,37*4,1), /* sw $2,37*4($1) */
- MIPS32_LW(2,0,15), /* sw $2,($15) */
- MIPS32_LW(1,0,15), /* sw $1,($15) */
+ MIPS32_LW(2,0,15), /* lw $2,($15) */
+ MIPS32_LW(1,0,15), /* lw $1,($15) */
MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
MIPS32_NOP,
MIPS32_B(NEG16(60)), /* b start */
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 09470b0804a66c0d5aae776e12f9301bed56b6eb..c169c6f0682bb2f191fa6281e1e906313eb867e4 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -164,8 +164,8 @@ int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
- MIPS32_SW(1,0,15), /* sw $2,($15) */
- MIPS32_SW(2,0,15), /* sw $3,($15) */
+ MIPS32_SW(1,0,15), /* sw $1,($15) */
+ MIPS32_SW(2,0,15), /* sw $2,($15) */
MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
MIPS32_ORI(2,2,0xFEFF),
@@ -235,7 +235,7 @@ int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg)
MIPS32_SW(2,0,15), /* sw $2,($15) */
MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */
MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)),
- MIPS32_MFC0(2,23,0), /* move COP0 Debug to $1 */
+ MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
MIPS32_SW(2,0,1),
MIPS32_LW(2,0,15),
MIPS32_LW(1,0,15),
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 2a96833dae931db100c005165c0ea90ddabd53f2..6109869484a7b4865d611f2655537903b8e109e7 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -139,6 +139,21 @@ int mips_m4k_poll(target_t *target)
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+ /* clear this bit before handling polling
+ * as after reset registers will read zero */
+ if (ejtag_ctrl & EJTAG_CTRL_ROCC)
+ {
+ /* we have detected a reset, clear flag
+ * otherwise ejtag will not work */
+ jtag_add_end_state(TAP_RTI);
+ ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
+
+ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+ mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+ LOG_DEBUG("Reset Detected");
+ }
+
+ /* check for processor halted */
if (ejtag_ctrl & EJTAG_CTRL_BRKST)
{
if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET))
@@ -168,18 +183,6 @@ int mips_m4k_poll(target_t *target)
target->state = TARGET_RUNNING;
}
- if (ejtag_ctrl & EJTAG_CTRL_ROCC)
- {
- /* we have detected a reset, clear flag
- * otherwise ejtag will not work */
- jtag_add_end_state(TAP_RTI);
- ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
-
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- LOG_DEBUG("Reset Detected");
- }
-
// LOG_DEBUG("ctrl=0x%08X", ejtag_ctrl);
return ERROR_OK;
@@ -289,7 +292,6 @@ int mips_m4k_assert_reset(target_t *target)
return retval;
}
-
return ERROR_OK;
}