diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c
index 8c73601cda824135cd045f2aebc1a75c3aff1199..db90d30472330ffaa65ec4dcc838bb683ab91fda 100644
--- a/src/flash/at91sam7.c
+++ b/src/flash/at91sam7.c
@@ -258,7 +258,7 @@ u32 at91sam7_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, i
 	while ((!((status = at91sam7_get_flash_status(bank,flashplane)) & waitbits)) && (timeout-- > 0))
 	{
 		LOG_DEBUG("status[%i]: 0x%x", flashplane, status);
-		usleep(1000);
+		alive_sleep(1);
 	}
 	
 	LOG_DEBUG("status[%i]: 0x%x", flashplane, status);
diff --git a/src/flash/cfi.c b/src/flash/cfi.c
index 68f9a0adf41f056ed7febe08af8c316a12c5e222..1ad6d266f01d4e197fd8be9723432d1576bf788c 100644
--- a/src/flash/cfi.c
+++ b/src/flash/cfi.c
@@ -273,7 +273,7 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout)
 	while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0))
 	{
 		LOG_DEBUG("status: 0x%x", status);
-		usleep(1000);
+		alive_sleep(1);
 	}
 
 	/* mask out bit 0 (reserved) */
@@ -333,7 +333,7 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout)
 		}
 
 		oldstatus = status;
-		usleep(1000);
+		alive_sleep(1);
 	} while (timeout-- > 0);
 
 	LOG_ERROR("timeout, status: 0x%x", status);
diff --git a/src/flash/lpc288x.c b/src/flash/lpc288x.c
index 3e22dd56cbb930c664aefa25432019d3f5eb0343..8c438f8e4ced22c8c7637138e7a2c7e8cfcf2eec 100644
--- a/src/flash/lpc288x.c
+++ b/src/flash/lpc288x.c
@@ -138,7 +138,7 @@ u32 lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
 	target_t *target = bank->target;
 	do
 	{
-		usleep(1000);
+		alive_sleep(1);
 		timeout--;
 		target_read_u32(target, F_STAT, &status);
 	}while (((status & FS_DONE) == 0) && timeout);
diff --git a/src/flash/lpc3180_nand_controller.c b/src/flash/lpc3180_nand_controller.c
index 8b6a5acefb8b3d64e49ef94018c9585f5054e5e5..8c7b6cbcc7755a4bfde0e75f9c307dd23a12a9d3 100644
--- a/src/flash/lpc3180_nand_controller.c
+++ b/src/flash/lpc3180_nand_controller.c
@@ -824,7 +824,7 @@ int lpc3180_controller_ready(struct nand_device_s *device, int timeout)
 			return 1;
 		}
 
-		usleep(1000);
+		alive_sleep(1);
 	} while (timeout-- > 0);
 	
 	return 0;
@@ -864,7 +864,7 @@ int lpc3180_nand_ready(struct nand_device_s *device, int timeout)
 				return 1;
 		}
 		
-		usleep(1000);
+		alive_sleep(1);
 	} while (timeout-- > 0);
 	
 	return 0;	
diff --git a/src/flash/nand.c b/src/flash/nand.c
index 3e63335fcf4da594a66efa2d2aa115d7b16aa15c..a2d46cfdae3a358042d75c12b2501411c8631fd4 100644
--- a/src/flash/nand.c
+++ b/src/flash/nand.c
@@ -355,7 +355,7 @@ int nand_read_status(struct nand_device_s *device, u8 *status)
 	/* Send read status command */
 	device->controller->command(device, NAND_CMD_STATUS);
 	
-	usleep(1000);
+	alive_sleep(1);
 	
 	/* read status */
 	if (device->device->options & NAND_BUSWIDTH_16)
diff --git a/src/flash/s3c2410_nand.c b/src/flash/s3c2410_nand.c
index 65a66102c8bca60f6892c4b8bff45604f79eb1f8..fabcfbd54ba1a096103285cebb079c0edd78e3e0 100644
--- a/src/flash/s3c2410_nand.c
+++ b/src/flash/s3c2410_nand.c
@@ -138,7 +138,7 @@ int s3c2410_nand_ready(struct nand_device_s *device, int timeout)
 		if (status & S3C2410_NFSTAT_BUSY)
 			return 1;
 
-		usleep(1000);		
+		alive_sleep(1);		
 	} while (timeout-- > 0);
 
 	return 0;
diff --git a/src/flash/s3c2440_nand.c b/src/flash/s3c2440_nand.c
index 41081bff79386b99b7179933025fbe77d2fb8a94..7e9365af633ede0b3cca9007223aecada8dd3a91 100644
--- a/src/flash/s3c2440_nand.c
+++ b/src/flash/s3c2440_nand.c
@@ -114,7 +114,7 @@ int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
 		if (status & S3C2440_NFSTAT_READY)
 			return 1;
 
-		usleep(1000);
+		alive_sleep(1);
 	} while (timeout-- > 0);
 
 
diff --git a/src/flash/stellaris.c b/src/flash/stellaris.c
index fa9445195200d3a57be37c5a6949babacede512f..e39978606c71b20bc85d8f0ba1cdc0cdb750a1b3 100644
--- a/src/flash/stellaris.c
+++ b/src/flash/stellaris.c
@@ -410,7 +410,7 @@ u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout)
 	while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0))
 	{
 		LOG_DEBUG("status: 0x%x", status);
-		usleep(1000);
+		alive_sleep(1);
 	}
 	
 	/* Flash errors are reflected in the FLASH_CRIS register */
diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c
index 4a0dc4346eea741cf30bac4c633fbc784b158182..0f62da91194de04a46a690ccd5736e5fc625bd4c 100644
--- a/src/flash/stm32x.c
+++ b/src/flash/stm32x.c
@@ -126,7 +126,7 @@ u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
 	while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0))
 	{
 		LOG_DEBUG("status: 0x%x", status);
-		usleep(1000);
+		alive_sleep(1);
 	}
 	
 	return status;
diff --git a/src/flash/str7x.c b/src/flash/str7x.c
index 797fe2bc52b38a7c898831aa54d12ec5c6df9ef9..09d3b81770af90c87b22c5c2ab40a55aec39ca13 100644
--- a/src/flash/str7x.c
+++ b/src/flash/str7x.c
@@ -283,7 +283,7 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
 	target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
 	
 	while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
-		usleep(1000);
+		alive_sleep(1);
 	}
 	
 	retval = str7x_result(bank);
@@ -339,7 +339,7 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
 	target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
 	
 	while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
-		usleep(1000);
+		alive_sleep(1);
 	}
 	
 	retval = str7x_result(bank);
@@ -568,7 +568,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 		
 		while (((retval = str7x_status(bank)) & str7x_info->busy_bits))
 		{
-			usleep(1000);
+			alive_sleep(1);
 		}
 		
 		retval = str7x_result(bank);
@@ -615,7 +615,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 		
 		while (((retval = str7x_status(bank)) & str7x_info->busy_bits))
 		{
-			usleep(1000);
+			alive_sleep(1);
 		}
 		
 		retval = str7x_result(bank);
diff --git a/src/flash/str9x.c b/src/flash/str9x.c
index c80e56ab53a3bb7e6f604be80f7169a3be388afa..e781c144d08021936572f84701a75edea43ad33d 100644
--- a/src/flash/str9x.c
+++ b/src/flash/str9x.c
@@ -313,7 +313,7 @@ int str9x_erase(struct flash_bank_s *bank, int first, int last)
 			}
 			if( status & 0x80 )
 				break;
-			usleep(1000);
+			alive_sleep(1);
 		}
 		
 		/* clear status, also clear read array */
@@ -576,7 +576,7 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 			target_read_u8(target, bank_adr, &status);
 			if( status & 0x80 )
 				break;
-			usleep(1000);
+			alive_sleep(1);
 		}
 		
 		/* clear status reg and read array */
@@ -618,7 +618,7 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 			target_read_u8(target, bank_adr, &status);
 			if( status & 0x80 )
 				break;
-			usleep(1000);
+			alive_sleep(1);
 		}
 		
 		/* clear status reg and read array */
diff --git a/src/flash/str9xpec.c b/src/flash/str9xpec.c
index f508e0bf8d96006a69385b573b9296b895176913..cefa2d9895fcf4588e7227ca2f2d543f01ded77a 100644
--- a/src/flash/str9xpec.c
+++ b/src/flash/str9xpec.c
@@ -530,7 +530,7 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
 	
 	/* wait for erase completion */
 	while (!((status = str9xpec_isc_status(chain_pos)) & ISC_STATUS_BUSY)) {
-		usleep(1000);
+		alive_sleep(1);
 	}
 	
 	free(buffer);
diff --git a/src/flash/tms470.c b/src/flash/tms470.c
index f9d8cd79da0f7b5776d7a3553fc02e6e2cf47081..c7107b86e7d4cc4036e28f47a4e09a74e75d7042 100644
--- a/src/flash/tms470.c
+++ b/src/flash/tms470.c
@@ -372,7 +372,7 @@ int tms470_try_flash_keys(target_t * target, const u32 * key_set)
 		do
 		{
 			target_read_u32(target, 0xFFE8A814, &fmbptr);
-			usleep(1000);
+			alive_sleep(1);
 		}
 		while (!(fmbptr & 0x0200));
 
@@ -718,7 +718,7 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector)
 		target_read_u32(target, 0xFFE8BC0C, &fmmstat);
 		if (fmmstat & 0x0100)
 		{
-			usleep(1000);
+			alive_sleep(1);
 		}
 	}
 	while (fmmstat & 0x0100);
@@ -932,7 +932,7 @@ int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count)
 				target_read_u32(target, 0xFFE8BC0C, &fmmstat);
 				if (fmmstat & 0x0100)
 				{
-					usleep(1000);
+					alive_sleep(1);
 				}
 			}
 			while (fmmstat & 0x0100);