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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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Registers, Bit Masks and Bit Positions for the DMA Peripheral Module. More...
Modules | |
| Register Offsets | |
| DMA Peripheral Register Offsets from the DMA Base Peripheral Address. | |
| DMA_CN | |
| DMA Control Register. | |
| DMA_INTR | |
| DMA Interrupt Register. | |
| DMA_CFG | |
| DMA Channel Configuration Register. | |
| DMA_ST | |
| DMA Channel Status Register. | |
| DMA_SRC | |
| Source Device Address. | |
| DMA_DST | |
| Destination Device Address. | |
| DMA_CNT | |
| DMA Counter. | |
| DMA_SRC_RLD | |
| Source Address Reload Value. | |
| DMA_DST_RLD | |
| Destination Address Reload Value. | |
| DMA_CNT_RLD | |
| DMA Channel Count Reload Register. | |
Data Structures | |
| struct | mxc_dma_ch_regs_t |
| Structure type to access the DMA Registers. More... | |
DMA Controller Fully programmable, chaining capable DMA channels.