diff --git a/stm/Makefile b/stm/Makefile
index 5ad469d7149b238f472a38b6599f0a4e0e27a0ea..cf4ba86903309f686ab1b670fb6750485898763e 100644
--- a/stm/Makefile
+++ b/stm/Makefile
@@ -64,6 +64,8 @@ SRC_STM = \
stm32f4xx_gpio.c \
stm32f4xx_tim.c \
stm32f4xx_sdio.c \
+ stm32f4xx_pwr.c \
+ stm32f4xx_rtc.c \
stm_misc.c \
usb_core.c \
usb_dcd.c \
diff --git a/stm/lib/stm32f4xx_pwr.c b/stm/lib/stm32f4xx_pwr.c
new file mode 100644
index 0000000000000000000000000000000000000000..322ecfb8e6c0384932ff5bad5760801d16a2e990
--- /dev/null
+++ b/stm/lib/stm32f4xx_pwr.c
@@ -0,0 +1,679 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_pwr.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 11-January-2013
+ * @brief This file provides firmware functions to manage the following
+ * functionalities of the Power Controller (PWR) peripheral:
+ * + Backup Domain Access
+ * + PVD configuration
+ * + WakeUp pin configuration
+ * + Main and Backup Regulators configuration
+ * + FLASH Power Down configuration
+ * + Low Power modes configuration
+ * + Flags management
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_conf.h"
+#include "stm32f4xx_pwr.h"
+#include "stm32f4xx_rcc.h"
+
+/** @addtogroup STM32F4xx_StdPeriph_Driver
+ * @{
+ */
+
+/** @defgroup PWR
+ * @brief PWR driver modules
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* --------- PWR registers bit address in the alias region ---------- */
+#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
+
+/* --- CR Register ---*/
+
+/* Alias word address of DBP bit */
+#define CR_OFFSET (PWR_OFFSET + 0x00)
+#define DBP_BitNumber 0x08
+#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
+
+/* Alias word address of PVDE bit */
+#define PVDE_BitNumber 0x04
+#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
+
+/* Alias word address of FPDS bit */
+#define FPDS_BitNumber 0x09
+#define CR_FPDS_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (FPDS_BitNumber * 4))
+
+/* Alias word address of PMODE bit */
+#define PMODE_BitNumber 0x0E
+#define CR_PMODE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PMODE_BitNumber * 4))
+
+
+/* --- CSR Register ---*/
+
+/* Alias word address of EWUP bit */
+#define CSR_OFFSET (PWR_OFFSET + 0x04)
+#define EWUP_BitNumber 0x08
+#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
+
+/* Alias word address of BRE bit */
+#define BRE_BitNumber 0x09
+#define CSR_BRE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (BRE_BitNumber * 4))
+
+/* ------------------ PWR registers bit mask ------------------------ */
+
+/* CR register bit mask */
+#define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
+#define CR_PLS_MASK ((uint32_t)0xFFFFFF1F)
+#define CR_VOS_MASK ((uint32_t)0xFFFF3FFF)
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup PWR_Private_Functions
+ * @{
+ */
+
+/** @defgroup PWR_Group1 Backup Domain Access function
+ * @brief Backup Domain Access function
+ *
+@verbatim
+ ===============================================================================
+ ##### Backup Domain Access function #####
+ ===============================================================================
+ [..]
+ After reset, the backup domain (RTC registers, RTC backup data
+ registers and backup SRAM) is protected against possible unwanted
+ write accesses.
+ To enable access to the RTC Domain and RTC registers, proceed as follows:
+ (+) Enable the Power Controller (PWR) APB1 interface clock using the
+ RCC_APB1PeriphClockCmd() function.
+ (+) Enable access to RTC domain using the PWR_BackupAccessCmd() function.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Deinitializes the PWR peripheral registers to their default reset values.
+ * @param None
+ * @retval None
+ */
+void PWR_DeInit(void)
+{
+ RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
+ RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
+}
+
+/**
+ * @brief Enables or disables access to the backup domain (RTC registers, RTC
+ * backup data registers and backup SRAM).
+ * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
+ * Backup Domain Access should be kept enabled.
+ * @param NewState: new state of the access to the backup domain.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void PWR_BackupAccessCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup PWR_Group2 PVD configuration functions
+ * @brief PVD configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### PVD configuration functions #####
+ ===============================================================================
+ [..]
+ (+) The PVD is used to monitor the VDD power supply by comparing it to a
+ threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
+ (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
+ than the PVD threshold. This event is internally connected to the EXTI
+ line16 and can generate an interrupt if enabled through the EXTI registers.
+ (+) The PVD is stopped in Standby mode.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
+ * @param PWR_PVDLevel: specifies the PVD detection level
+ * This parameter can be one of the following values:
+ * @arg PWR_PVDLevel_0
+ * @arg PWR_PVDLevel_1
+ * @arg PWR_PVDLevel_2
+ * @arg PWR_PVDLevel_3
+ * @arg PWR_PVDLevel_4
+ * @arg PWR_PVDLevel_5
+ * @arg PWR_PVDLevel_6
+ * @arg PWR_PVDLevel_7
+ * @note Refer to the electrical characteristics of your device datasheet for
+ * more details about the voltage threshold corresponding to each
+ * detection level.
+ * @retval None
+ */
+void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
+
+ tmpreg = PWR->CR;
+
+ /* Clear PLS[7:5] bits */
+ tmpreg &= CR_PLS_MASK;
+
+ /* Set PLS[7:5] bits according to PWR_PVDLevel value */
+ tmpreg |= PWR_PVDLevel;
+
+ /* Store the new value */
+ PWR->CR = tmpreg;
+}
+
+/**
+ * @brief Enables or disables the Power Voltage Detector(PVD).
+ * @param NewState: new state of the PVD.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void PWR_PVDCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup PWR_Group3 WakeUp pin configuration functions
+ * @brief WakeUp pin configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### WakeUp pin configuration functions #####
+ ===============================================================================
+ [..]
+ (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is
+ forced in input pull down configuration and is active on rising edges.
+ (+) There is only one WakeUp pin: WakeUp Pin 1 on PA.00.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enables or disables the WakeUp Pin functionality.
+ * @param NewState: new state of the WakeUp Pin functionality.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void PWR_WakeUpPinCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup PWR_Group4 Main and Backup Regulators configuration functions
+ * @brief Main and Backup Regulators configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Main and Backup Regulators configuration functions #####
+ ===============================================================================
+ [..]
+ (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
+ the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
+ retained even in Standby or VBAT mode when the low power backup regulator
+ is enabled. It can be considered as an internal EEPROM when VBAT is
+ always present. You can use the PWR_BackupRegulatorCmd() function to
+ enable the low power backup regulator and use the PWR_GetFlagStatus
+ (PWR_FLAG_BRR) to check if it is ready or not.
+
+ (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
+ the backup SRAM is powered from VDD which replaces the VBAT power supply to
+ save battery life.
+
+ (+) The backup SRAM is not mass erased by an tamper event. It is read
+ protected to prevent confidential data, such as cryptographic private
+ key, from being accessed. The backup SRAM can be erased only through
+ the Flash interface when a protection level change from level 1 to
+ level 0 is requested.
+ -@- Refer to the description of Read protection (RDP) in the Flash
+ programming manual.
+
+ (+) The main internal regulator can be configured to have a tradeoff between
+ performance and power consumption when the device does not operate at
+ the maximum frequency. This is done through PWR_MainRegulatorModeConfig()
+ function which configure VOS bit in PWR_CR register:
+ (++) When this bit is set (Regulator voltage output Scale 1 mode selected)
+ the System frequency can go up to 168 MHz.
+ (++) When this bit is reset (Regulator voltage output Scale 2 mode selected)
+ the System frequency can go up to 144 MHz.
+
+ Refer to the datasheets for more details.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enables or disables the Backup Regulator.
+ * @param NewState: new state of the Backup Regulator.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void PWR_BackupRegulatorCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)NewState;
+}
+
+/**
+ * @brief Configures the main internal regulator output voltage.
+ * @param PWR_Regulator_Voltage: specifies the regulator output voltage to achieve
+ * a tradeoff between performance and power consumption when the device does
+ * not operate at the maximum frequency (refer to the datasheets for more details).
+ * This parameter can be one of the following values:
+ * @arg PWR_Regulator_Voltage_Scale1: Regulator voltage output Scale 1 mode,
+ * System frequency up to 168 MHz.
+ * @arg PWR_Regulator_Voltage_Scale2: Regulator voltage output Scale 2 mode,
+ * System frequency up to 144 MHz.
+ * @arg PWR_Regulator_Voltage_Scale3: Regulator voltage output Scale 3 mode,
+ * System frequency up to 120 MHz
+ * @retval None
+ */
+void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_PWR_REGULATOR_VOLTAGE(PWR_Regulator_Voltage));
+
+ tmpreg = PWR->CR;
+
+ /* Clear VOS[15:14] bits */
+ tmpreg &= CR_VOS_MASK;
+
+ /* Set VOS[15:14] bits according to PWR_Regulator_Voltage value */
+ tmpreg |= PWR_Regulator_Voltage;
+
+ /* Store the new value */
+ PWR->CR = tmpreg;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup PWR_Group5 FLASH Power Down configuration functions
+ * @brief FLASH Power Down configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### FLASH Power Down configuration functions #####
+ ===============================================================================
+ [..]
+ (+) By setting the FPDS bit in the PWR_CR register by using the
+ PWR_FlashPowerDownCmd() function, the Flash memory also enters power
+ down mode when the device enters Stop mode. When the Flash memory
+ is in power down mode, an additional startup delay is incurred when
+ waking up from Stop mode.
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enables or disables the Flash Power Down in STOP mode.
+ * @param NewState: new state of the Flash power mode.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void PWR_FlashPowerDownCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)NewState;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup PWR_Group6 Low Power modes configuration functions
+ * @brief Low Power modes configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Low Power modes configuration functions #####
+ ===============================================================================
+ [..]
+ The devices feature 3 low-power modes:
+ (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
+ (+) Stop mode: all clocks are stopped, regulator running, regulator
+ in low power mode
+ (+) Standby mode: 1.2V domain powered off.
+
+ *** Sleep mode ***
+ ==================
+ [..]
+ (+) Entry:
+ (++) The Sleep mode is entered by using the __WFI() or __WFE() functions.
+ (+) Exit:
+ (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
+ controller (NVIC) can wake up the device from Sleep mode.
+
+ *** Stop mode ***
+ =================
+ [..]
+ In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
+ and the HSE RC oscillators are disabled. Internal SRAM and register contents
+ are preserved.
+ The voltage regulator can be configured either in normal or low-power mode.
+ To minimize the consumption In Stop mode, FLASH can be powered off before
+ entering the Stop mode. It can be switched on again by software after exiting
+ the Stop mode using the PWR_FlashPowerDownCmd() function.
+
+ (+) Entry:
+ (++) The Stop mode is entered using the PWR_EnterSTOPMode(PWR_Regulator_LowPower,)
+ function with regulator in LowPower or with Regulator ON.
+ (+) Exit:
+ (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
+
+ *** Standby mode ***
+ ====================
+ [..]
+ The Standby mode allows to achieve the lowest power consumption. It is based
+ on the Cortex-M4 deepsleep mode, with the voltage regulator disabled.
+ The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
+ the HSE oscillator are also switched off. SRAM and register contents are lost
+ except for the RTC registers, RTC backup registers, backup SRAM and Standby
+ circuitry.
+
+ The voltage regulator is OFF.
+
+ (+) Entry:
+ (++) The Standby mode is entered using the PWR_EnterSTANDBYMode() function.
+ (+) Exit:
+ (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
+ tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
+
+ *** Auto-wakeup (AWU) from low-power mode ***
+ =============================================
+ [..]
+ The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
+ Wakeup event, a tamper event, a time-stamp event, or a comparator event,
+ without depending on an external interrupt (Auto-wakeup mode).
+
+ (#) RTC auto-wakeup (AWU) from the Stop mode
+
+ (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
+ (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
+ or Event modes) using the EXTI_Init() function.
+ (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
+ (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
+ and RTC_AlarmCmd() functions.
+ (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
+ is necessary to:
+ (+++) Configure the EXTI Line 21 to be sensitive to rising edges (Interrupt
+ or Event modes) using the EXTI_Init() function.
+ (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
+ function
+ (+++) Configure the RTC to detect the tamper or time stamp event using the
+ RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
+ functions.
+ (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
+ (+++) Configure the EXTI Line 22 to be sensitive to rising edges (Interrupt
+ or Event modes) using the EXTI_Init() function.
+ (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
+ (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
+ RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
+
+ (#) RTC auto-wakeup (AWU) from the Standby mode
+
+ (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
+ (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
+ (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
+ and RTC_AlarmCmd() functions.
+ (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
+ is necessary to:
+ (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
+ function
+ (+++) Configure the RTC to detect the tamper or time stamp event using the
+ RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
+ functions.
+ (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
+ (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
+ (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
+ RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enters STOP mode.
+ *
+ * @note In Stop mode, all I/O pins keep the same state as in Run mode.
+ * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
+ * the HSI RC oscillator is selected as system clock.
+ * @note When the voltage regulator operates in low power mode, an additional
+ * startup delay is incurred when waking up from Stop mode.
+ * By keeping the internal regulator ON during Stop mode, the consumption
+ * is higher although the startup time is reduced.
+ *
+ * @param PWR_Regulator: specifies the regulator state in STOP mode.
+ * This parameter can be one of the following values:
+ * @arg PWR_Regulator_ON: STOP mode with regulator ON
+ * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
+ * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
+ * This parameter can be one of the following values:
+ * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
+ * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
+ * @retval None
+ */
+void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_PWR_REGULATOR(PWR_Regulator));
+ assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
+
+ /* Select the regulator state in STOP mode ---------------------------------*/
+ tmpreg = PWR->CR;
+ /* Clear PDDS and LPDSR bits */
+ tmpreg &= CR_DS_MASK;
+
+ /* Set LPDSR bit according to PWR_Regulator value */
+ tmpreg |= PWR_Regulator;
+
+ /* Store the new value */
+ PWR->CR = tmpreg;
+
+ /* Set SLEEPDEEP bit of Cortex System Control Register */
+ SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
+
+ /* Select STOP mode entry --------------------------------------------------*/
+ if(PWR_STOPEntry == PWR_STOPEntry_WFI)
+ {
+ /* Request Wait For Interrupt */
+ __WFI();
+ }
+ else
+ {
+ /* Request Wait For Event */
+ __WFE();
+ }
+ /* Reset SLEEPDEEP bit of Cortex System Control Register */
+ SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
+}
+
+/**
+ * @brief Enters STANDBY mode.
+ * @note In Standby mode, all I/O pins are high impedance except for:
+ * - Reset pad (still available)
+ * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
+ * Alarm out, or RTC clock calibration out.
+ * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
+ * - WKUP pin 1 (PA0) if enabled.
+ * @param None
+ * @retval None
+ */
+void PWR_EnterSTANDBYMode(void)
+{
+ /* Clear Wakeup flag */
+ PWR->CR |= PWR_CR_CWUF;
+
+ /* Select STANDBY mode */
+ PWR->CR |= PWR_CR_PDDS;
+
+ /* Set SLEEPDEEP bit of Cortex System Control Register */
+ SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
+
+/* This option is used to ensure that store operations are completed */
+#if defined ( __CC_ARM )
+ __force_stores();
+#endif
+ /* Request Wait For Interrupt */
+ __WFI();
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup PWR_Group7 Flags management functions
+ * @brief Flags management functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Flags management functions #####
+ ===============================================================================
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Checks whether the specified PWR flag is set or not.
+ * @param PWR_FLAG: specifies the flag to check.
+ * This parameter can be one of the following values:
+ * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
+ * was received from the WKUP pin or from the RTC alarm (Alarm A
+ * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
+ * An additional wakeup event is detected if the WKUP pin is enabled
+ * (by setting the EWUP bit) when the WKUP pin level is already high.
+ * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
+ * resumed from StandBy mode.
+ * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
+ * by the PWR_PVDCmd() function. The PVD is stopped by Standby mode
+ * For this reason, this bit is equal to 0 after Standby or reset
+ * until the PVDE bit is set.
+ * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
+ * when the device wakes up from Standby mode or by a system reset
+ * or power reset.
+ * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
+ * scaling output selection is ready.
+ * @retval The new state of PWR_FLAG (SET or RESET).
+ */
+FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
+{
+ FlagStatus bitstatus = RESET;
+
+ /* Check the parameters */
+ assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
+
+ if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
+ {
+ bitstatus = SET;
+ }
+ else
+ {
+ bitstatus = RESET;
+ }
+ /* Return the flag status */
+ return bitstatus;
+}
+
+/**
+ * @brief Clears the PWR's pending flags.
+ * @param PWR_FLAG: specifies the flag to clear.
+ * This parameter can be one of the following values:
+ * @arg PWR_FLAG_WU: Wake Up flag
+ * @arg PWR_FLAG_SB: StandBy flag
+ * @retval None
+ */
+void PWR_ClearFlag(uint32_t PWR_FLAG)
+{
+ /* Check the parameters */
+ assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
+
+ PWR->CR |= PWR_FLAG << 2;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/stm/lib/stm32f4xx_pwr.h b/stm/lib/stm32f4xx_pwr.h
new file mode 100644
index 0000000000000000000000000000000000000000..0212501f8e873848fd2fa44877aac01fdec8ef30
--- /dev/null
+++ b/stm/lib/stm32f4xx_pwr.h
@@ -0,0 +1,188 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_pwr.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 11-January-2013
+ * @brief This file contains all the functions prototypes for the PWR firmware
+ * library.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_PWR_H
+#define __STM32F4xx_PWR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx.h"
+
+/** @addtogroup STM32F4xx_StdPeriph_Driver
+ * @{
+ */
+
+/** @addtogroup PWR
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup PWR_Exported_Constants
+ * @{
+ */
+
+/** @defgroup PWR_PVD_detection_level
+ * @{
+ */
+
+#define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
+#define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
+#define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
+#define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
+#define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
+#define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
+#define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
+#define PWR_PVDLevel_7 PWR_CR_PLS_LEV7
+
+#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
+ ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
+ ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
+ ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
+/**
+ * @}
+ */
+
+
+/** @defgroup PWR_Regulator_state_in_STOP_mode
+ * @{
+ */
+
+#define PWR_Regulator_ON ((uint32_t)0x00000000)
+#define PWR_Regulator_LowPower PWR_CR_LPDS
+#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
+ ((REGULATOR) == PWR_Regulator_LowPower))
+/**
+ * @}
+ */
+
+/** @defgroup PWR_STOP_mode_entry
+ * @{
+ */
+
+#define PWR_STOPEntry_WFI ((uint8_t)0x01)
+#define PWR_STOPEntry_WFE ((uint8_t)0x02)
+#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
+
+/** @defgroup PWR_Regulator_Voltage_Scale
+ * @{
+ */
+
+#define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000)
+#define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000)
+#define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000)
+#define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \
+ ((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \
+ ((VOLTAGE) == PWR_Regulator_Voltage_Scale3))
+
+/**
+ * @}
+ */
+
+/** @defgroup PWR_Flag
+ * @{
+ */
+
+#define PWR_FLAG_WU PWR_CSR_WUF
+#define PWR_FLAG_SB PWR_CSR_SBF
+#define PWR_FLAG_PVDO PWR_CSR_PVDO
+#define PWR_FLAG_BRR PWR_CSR_BRR
+#define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
+
+/** @defgroup PWR_Flag_Legacy
+ * @{
+ */
+#define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY
+/**
+ * @}
+ */
+
+#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
+ ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \
+ ((FLAG) == PWR_FLAG_VOSRDY))
+
+#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/* Function used to set the PWR configuration to the default reset state ******/
+void PWR_DeInit(void);
+
+/* Backup Domain Access function **********************************************/
+void PWR_BackupAccessCmd(FunctionalState NewState);
+
+/* PVD configuration functions ************************************************/
+void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
+void PWR_PVDCmd(FunctionalState NewState);
+
+/* WakeUp pins configuration functions ****************************************/
+void PWR_WakeUpPinCmd(FunctionalState NewState);
+
+/* Main and Backup Regulators configuration functions *************************/
+void PWR_BackupRegulatorCmd(FunctionalState NewState);
+void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage);
+
+/* FLASH Power Down configuration functions ***********************************/
+void PWR_FlashPowerDownCmd(FunctionalState NewState);
+
+/* Low Power modes configuration functions ************************************/
+void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
+void PWR_EnterSTANDBYMode(void);
+
+/* Flags management functions *************************************************/
+FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
+void PWR_ClearFlag(uint32_t PWR_FLAG);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_PWR_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/stm/lib/stm32f4xx_rtc.c b/stm/lib/stm32f4xx_rtc.c
new file mode 100644
index 0000000000000000000000000000000000000000..339ec9e4d8af4e18622eee70566f8ad462607755
--- /dev/null
+++ b/stm/lib/stm32f4xx_rtc.c
@@ -0,0 +1,2762 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_rtc.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 11-January-2013
+ * @brief This file provides firmware functions to manage the following
+ * functionalities of the Real-Time Clock (RTC) peripheral:
+ * + Initialization
+ * + Calendar (Time and Date) configuration
+ * + Alarms (Alarm A and Alarm B) configuration
+ * + WakeUp Timer configuration
+ * + Daylight Saving configuration
+ * + Output pin Configuration
+ * + Coarse digital Calibration configuration
+ * + Smooth digital Calibration configuration
+ * + TimeStamp configuration
+ * + Tampers configuration
+ * + Backup Data Registers configuration
+ * + Shift control synchronisation
+ * + RTC Tamper and TimeStamp Pins Selection and Output Type Config configuration
+ * + Interrupts and flags management
+ *
+@verbatim
+
+ ===================================================================
+ ##### Backup Domain Operating Condition #####
+ ===================================================================
+ [..] The real-time clock (RTC), the RTC backup registers, and the backup
+ SRAM (BKP SRAM) can be powered from the VBAT voltage when the main
+ VDD supply is powered off.
+ To retain the content of the RTC backup registers, backup SRAM, and supply
+ the RTC when VDD is turned off, VBAT pin can be connected to an optional
+ standby voltage supplied by a battery or by another source.
+
+ [..] To allow the RTC to operate even when the main digital supply (VDD) is turned
+ off, the VBAT pin powers the following blocks:
+ (#) The RTC
+ (#) The LSE oscillator
+ (#) The backup SRAM when the low power backup regulator is enabled
+ (#) PC13 to PC15 I/Os, plus PI8 I/O (when available)
+
+ [..] When the backup domain is supplied by VDD (analog switch connected to VDD),
+ the following functions are available:
+ (#) PC14 and PC15 can be used as either GPIO or LSE pins
+ (#) PC13 can be used as a GPIO or as the RTC_AF1 pin
+ (#) PI8 can be used as a GPIO or as the RTC_AF2 pin
+
+ [..] When the backup domain is supplied by VBAT (analog switch connected to VBAT
+ because VDD is not present), the following functions are available:
+ (#) PC14 and PC15 can be used as LSE pins only
+ (#) PC13 can be used as the RTC_AF1 pin
+ (#) PI8 can be used as the RTC_AF2 pin
+
+
+ ##### Backup Domain Reset #####
+ ===================================================================
+ [..] The backup domain reset sets all RTC registers and the RCC_BDCR register
+ to their reset values. The BKPSRAM is not affected by this reset. The only
+ way of resetting the BKPSRAM is through the Flash interface by requesting
+ a protection level change from 1 to 0.
+ [..] A backup domain reset is generated when one of the following events occurs:
+ (#) Software reset, triggered by setting the BDRST bit in the
+ RCC Backup domain control register (RCC_BDCR). You can use the
+ RCC_BackupResetCmd().
+ (#) VDD or VBAT power on, if both supplies have previously been powered off.
+
+
+ ##### Backup Domain Access #####
+ ===================================================================
+ [..] After reset, the backup domain (RTC registers, RTC backup data
+ registers and backup SRAM) is protected against possible unwanted write
+ accesses.
+ [..] To enable access to the RTC Domain and RTC registers, proceed as follows:
+ (+) Enable the Power Controller (PWR) APB1 interface clock using the
+ RCC_APB1PeriphClockCmd() function.
+ (+) Enable access to RTC domain using the PWR_BackupAccessCmd() function.
+ (+) Select the RTC clock source using the RCC_RTCCLKConfig() function.
+ (+) Enable RTC Clock using the RCC_RTCCLKCmd() function.
+
+
+ ##### How to use RTC Driver #####
+ ===================================================================
+ [..]
+ (+) Enable the RTC domain access (see description in the section above)
+ (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
+ format using the RTC_Init() function.
+
+ *** Time and Date configuration ***
+ ===================================
+ [..]
+ (+) To configure the RTC Calendar (Time and Date) use the RTC_SetTime()
+ and RTC_SetDate() functions.
+ (+) To read the RTC Calendar, use the RTC_GetTime() and RTC_GetDate() functions.
+ (+) Use the RTC_DayLightSavingConfig() function to add or sub one
+ hour to the RTC Calendar.
+
+ *** Alarm configuration ***
+ ===========================
+ [..]
+ (+) To configure the RTC Alarm use the RTC_SetAlarm() function.
+ (+) Enable the selected RTC Alarm using the RTC_AlarmCmd() function
+ (+) To read the RTC Alarm, use the RTC_GetAlarm() function.
+ (+) To read the RTC alarm SubSecond, use the RTC_GetAlarmSubSecond() function.
+
+ *** RTC Wakeup configuration ***
+ ================================
+ [..]
+ (+) Configure the RTC Wakeup Clock source use the RTC_WakeUpClockConfig()
+ function.
+ (+) Configure the RTC WakeUp Counter using the RTC_SetWakeUpCounter() function
+ (+) Enable the RTC WakeUp using the RTC_WakeUpCmd() function
+ (+) To read the RTC WakeUp Counter register, use the RTC_GetWakeUpCounter()
+ function.
+
+ *** Outputs configuration ***
+ =============================
+ [..] The RTC has 2 different outputs:
+ (+) AFO_ALARM: this output is used to manage the RTC Alarm A, Alarm B
+ and WaKeUp signals. To output the selected RTC signal on RTC_AF1 pin, use the
+ RTC_OutputConfig() function.
+ (+) AFO_CALIB: this output is 512Hz signal or 1Hz. To output the RTC Clock on
+ RTC_AF1 pin, use the RTC_CalibOutputCmd() function.
+
+ *** Smooth digital Calibration configuration ***
+ ================================================
+ [..]
+ (+) Configure the RTC Original Digital Calibration Value and the corresponding
+ calibration cycle period (32s,16s and 8s) using the RTC_SmoothCalibConfig()
+ function.
+
+ *** Coarse digital Calibration configuration ***
+ ================================================
+ [..]
+ (+) Configure the RTC Coarse Calibration Value and the corresponding
+ sign using the RTC_CoarseCalibConfig() function.
+ (+) Enable the RTC Coarse Calibration using the RTC_CoarseCalibCmd() function
+
+ *** TimeStamp configuration ***
+ ===============================
+ [..]
+ (+) Configure the RTC_AF1 trigger and enables the RTC TimeStamp using the RTC
+ _TimeStampCmd() function.
+ (+) To read the RTC TimeStamp Time and Date register, use the RTC_GetTimeStamp()
+ function.
+ (+) To read the RTC TimeStamp SubSecond register, use the
+ RTC_GetTimeStampSubSecond() function.
+ (+) The TAMPER1 alternate function can be mapped either to RTC_AF1(PC13)
+ or RTC_AF2 (PI8) depending on the value of TAMP1INSEL bit in
+ RTC_TAFCR register. You can use the RTC_TamperPinSelection() function to
+ select the corresponding pin.
+
+ *** Tamper configuration ***
+ ============================
+ [..]
+ (+) Enable the RTC Tamper using the RTC_TamperCmd() function.
+ (+) Configure the Tamper filter count using RTC_TamperFilterConfig()
+ function.
+ (+) Configure the RTC Tamper trigger Edge or Level according to the Tamper
+ filter (if equal to 0 Edge else Level) value using the RTC_TamperConfig()
+ function.
+ (+) Configure the Tamper sampling frequency using RTC_TamperSamplingFreqConfig()
+ function.
+ (+) Configure the Tamper precharge or discharge duration using
+ RTC_TamperPinsPrechargeDuration() function.
+ (+) Enable the Tamper Pull-UP using RTC_TamperPullUpDisableCmd() function.
+ (+) Enable the Time stamp on Tamper detection event using
+ TC_TSOnTamperDetecCmd() function.
+ (+) The TIMESTAMP alternate function can be mapped to either RTC_AF1
+ or RTC_AF2 depending on the value of the TSINSEL bit in the RTC_TAFCR
+ register. You can use the RTC_TimeStampPinSelection() function to select
+ the corresponding pin.
+
+ *** Backup Data Registers configuration ***
+ ===========================================
+ [..]
+ (+) To write to the RTC Backup Data registers, use the RTC_WriteBackupRegister()
+ function.
+ (+) To read the RTC Backup Data registers, use the RTC_ReadBackupRegister()
+ function.
+
+
+ ##### RTC and low power modes #####
+ ===================================================================
+ [..] The MCU can be woken up from a low power mode by an RTC alternate
+ function.
+ [..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B),
+ RTC wakeup, RTC tamper event detection and RTC time stamp event detection.
+ These RTC alternate functions can wake up the system from the Stop and
+ Standby lowpower modes.
+ [..] The system can also wake up from low power modes without depending
+ on an external interrupt (Auto-wakeup mode), by using the RTC alarm
+ or the RTC wakeup events.
+ [..] The RTC provides a programmable time base for waking up from the
+ Stop or Standby mode at regular intervals.
+ Wakeup from STOP and Standby modes is possible only when the RTC clock source
+ is LSE or LSI.
+
+
+ ##### Selection of RTC_AF1 alternate functions #####
+ ===================================================================
+ [..] The RTC_AF1 pin (PC13) can be used for the following purposes:
+ (+) AFO_ALARM output
+ (+) AFO_CALIB output
+ (+) AFI_TAMPER
+ (+) AFI_TIMESTAMP
+
+ [..]
+ +-------------------------------------------------------------------------------------------------------------+
+ | Pin |AFO_ALARM |AFO_CALIB |AFI_TAMPER |AFI_TIMESTAMP | TAMP1INSEL | TSINSEL |ALARMOUTTYPE |
+ | configuration | ENABLED | ENABLED | ENABLED | ENABLED |TAMPER1 pin |TIMESTAMP pin | AFO_ALARM |
+ | and function | | | | | selection | selection |Configuration |
+ |-----------------|----------|----------|-----------|--------------|------------|--------------|--------------|
+ | Alarm out | | | | | Don't | Don't | |
+ | output OD | 1 |Don't care|Don't care | Don't care | care | care | 0 |
+ |-----------------|----------|----------|-----------|--------------|------------|--------------|--------------|
+ | Alarm out | | | | | Don't | Don't | |
+ | output PP | 1 |Don't care|Don't care | Don't care | care | care | 1 |
+ |-----------------|----------|----------|-----------|--------------|------------|--------------|--------------|
+ | Calibration out | | | | | Don't | Don't | |
+ | output PP | 0 | 1 |Don't care | Don't care | care | care | Don't care |
+ |-----------------|----------|----------|-----------|--------------|------------|--------------|--------------|
+ | TAMPER input | | | | | | Don't | |
+ | floating | 0 | 0 | 1 | 0 | 0 | care | Don't care |
+ |-----------------|----------|----------|-----------|--------------|------------|--------------|--------------|
+ | TIMESTAMP and | | | | | | | |
+ | TAMPER input | 0 | 0 | 1 | 1 | 0 | 0 | Don't care |
+ | floating | | | | | | | |
+ |-----------------|----------|----------|-----------|--------------|------------|--------------|--------------|
+ | TIMESTAMP input | | | | | Don't | | |
+ | floating | 0 | 0 | 0 | 1 | care | 0 | Don't care |
+ |-----------------|----------|----------|-----------|--------------|------------|--------------|--------------|
+ | Standard GPIO | 0 | 0 | 0 | 0 | Don't care | Don't care | Don't care |
+ +-------------------------------------------------------------------------------------------------------------+
+
+
+ ##### Selection of RTC_AF2 alternate functions #####
+ ===================================================================
+ [..] The RTC_AF2 pin (PI8) can be used for the following purposes:
+ (+) AFI_TAMPER
+ (+) AFI_TIMESTAMP
+ [..]
+ +---------------------------------------------------------------------------------------+
+ | Pin |AFI_TAMPER |AFI_TIMESTAMP | TAMP1INSEL | TSINSEL |ALARMOUTTYPE |
+ | configuration | ENABLED | ENABLED |TAMPER1 pin |TIMESTAMP pin | AFO_ALARM |
+ | and function | | | selection | selection |Configuration |
+ |-----------------|-----------|--------------|------------|--------------|--------------|
+ | TAMPER input | | | | Don't | |
+ | floating | 1 | 0 | 1 | care | Don't care |
+ |-----------------|-----------|--------------|------------|--------------|--------------|
+ | TIMESTAMP and | | | | | |
+ | TAMPER input | 1 | 1 | 1 | 1 | Don't care |
+ | floating | | | | | |
+ |-----------------|-----------|--------------|------------|--------------|--------------|
+ | TIMESTAMP input | | | Don't | | |
+ | floating | 0 | 1 | care | 1 | Don't care |
+ |-----------------|-----------|--------------|------------|--------------|--------------|
+ | Standard GPIO | 0 | 0 | Don't care | Don't care | Don't care |
+ +---------------------------------------------------------------------------------------+
+
+
+@endverbatim
+
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_conf.h"
+#include "stm32f4xx_rtc.h"
+
+/** @addtogroup STM32F4xx_StdPeriph_Driver
+ * @{
+ */
+
+/** @defgroup RTC
+ * @brief RTC driver modules
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* Masks Definition */
+#define RTC_TR_RESERVED_MASK ((uint32_t)0x007F7F7F)
+#define RTC_DR_RESERVED_MASK ((uint32_t)0x00FFFF3F)
+#define RTC_INIT_MASK ((uint32_t)0xFFFFFFFF)
+#define RTC_RSF_MASK ((uint32_t)0xFFFFFF5F)
+#define RTC_FLAGS_MASK ((uint32_t)(RTC_FLAG_TSOVF | RTC_FLAG_TSF | RTC_FLAG_WUTF | \
+ RTC_FLAG_ALRBF | RTC_FLAG_ALRAF | RTC_FLAG_INITF | \
+ RTC_FLAG_RSF | RTC_FLAG_INITS | RTC_FLAG_WUTWF | \
+ RTC_FLAG_ALRBWF | RTC_FLAG_ALRAWF | RTC_FLAG_TAMP1F | \
+ RTC_FLAG_RECALPF | RTC_FLAG_SHPF))
+
+#define INITMODE_TIMEOUT ((uint32_t) 0x00010000)
+#define SYNCHRO_TIMEOUT ((uint32_t) 0x00020000)
+#define RECALPF_TIMEOUT ((uint32_t) 0x00020000)
+#define SHPF_TIMEOUT ((uint32_t) 0x00001000)
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static uint8_t RTC_ByteToBcd2(uint8_t Value);
+static uint8_t RTC_Bcd2ToByte(uint8_t Value);
+
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup RTC_Private_Functions
+ * @{
+ */
+
+/** @defgroup RTC_Group1 Initialization and Configuration functions
+ * @brief Initialization and Configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Initialization and Configuration functions #####
+ ===============================================================================
+
+ [..] This section provide functions allowing to initialize and configure the RTC
+ Prescaler (Synchronous and Asynchronous), RTC Hour format, disable RTC registers
+ Write protection, enter and exit the RTC initialization mode, RTC registers
+ synchronization check and reference clock detection enable.
+
+ (#) The RTC Prescaler is programmed to generate the RTC 1Hz time base. It is
+ split into 2 programmable prescalers to minimize power consumption.
+ (++) A 7-bit asynchronous prescaler and A 13-bit synchronous prescaler.
+ (++) When both prescalers are used, it is recommended to configure the
+ asynchronous prescaler to a high value to minimize consumption.
+
+ (#) All RTC registers are Write protected. Writing to the RTC registers
+ is enabled by writing a key into the Write Protection register, RTC_WPR.
+
+ (#) To Configure the RTC Calendar, user application should enter initialization
+ mode. In this mode, the calendar counter is stopped and its value can be
+ updated. When the initialization sequence is complete, the calendar restarts
+ counting after 4 RTCCLK cycles.
+
+ (#) To read the calendar through the shadow registers after Calendar initialization,
+ calendar update or after wakeup from low power modes the software must first
+ clear the RSF flag. The software must then wait until it is set again before
+ reading the calendar, which means that the calendar registers have been
+ correctly copied into the RTC_TR and RTC_DR shadow registers.
+ The RTC_WaitForSynchro() function implements the above software sequence
+ (RSF clear and RSF check).
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Deinitializes the RTC registers to their default reset values.
+ * @note This function doesn't reset the RTC Clock source and RTC Backup Data
+ * registers.
+ * @param None
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC registers are deinitialized
+ * - ERROR: RTC registers are not deinitialized
+ */
+ErrorStatus RTC_DeInit(void)
+{
+ __IO uint32_t wutcounter = 0x00;
+ uint32_t wutwfstatus = 0x00;
+ ErrorStatus status = ERROR;
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Set Initialization mode */
+ if (RTC_EnterInitMode() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ /* Reset TR, DR and CR registers */
+ RTC->TR = (uint32_t)0x00000000;
+ RTC->DR = (uint32_t)0x00002101;
+ /* Reset All CR bits except CR[2:0] */
+ RTC->CR &= (uint32_t)0x00000007;
+
+ /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
+ do
+ {
+ wutwfstatus = RTC->ISR & RTC_ISR_WUTWF;
+ wutcounter++;
+ } while((wutcounter != INITMODE_TIMEOUT) && (wutwfstatus == 0x00));
+
+ if ((RTC->ISR & RTC_ISR_WUTWF) == RESET)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ /* Reset all RTC CR register bits */
+ RTC->CR &= (uint32_t)0x00000000;
+ RTC->WUTR = (uint32_t)0x0000FFFF;
+ RTC->PRER = (uint32_t)0x007F00FF;
+ RTC->CALIBR = (uint32_t)0x00000000;
+ RTC->ALRMAR = (uint32_t)0x00000000;
+ RTC->ALRMBR = (uint32_t)0x00000000;
+ RTC->SHIFTR = (uint32_t)0x00000000;
+ RTC->CALR = (uint32_t)0x00000000;
+ RTC->ALRMASSR = (uint32_t)0x00000000;
+ RTC->ALRMBSSR = (uint32_t)0x00000000;
+
+ /* Reset ISR register and exit initialization mode */
+ RTC->ISR = (uint32_t)0x00000000;
+
+ /* Reset Tamper and alternate functions configuration register */
+ RTC->TAFCR = 0x00000000;
+
+ if(RTC_WaitForSynchro() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Initializes the RTC registers according to the specified parameters
+ * in RTC_InitStruct.
+ * @param RTC_InitStruct: pointer to a RTC_InitTypeDef structure that contains
+ * the configuration information for the RTC peripheral.
+ * @note The RTC Prescaler register is write protected and can be written in
+ * initialization mode only.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC registers are initialized
+ * - ERROR: RTC registers are not initialized
+ */
+ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct)
+{
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_HOUR_FORMAT(RTC_InitStruct->RTC_HourFormat));
+ assert_param(IS_RTC_ASYNCH_PREDIV(RTC_InitStruct->RTC_AsynchPrediv));
+ assert_param(IS_RTC_SYNCH_PREDIV(RTC_InitStruct->RTC_SynchPrediv));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Set Initialization mode */
+ if (RTC_EnterInitMode() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ /* Clear RTC CR FMT Bit */
+ RTC->CR &= ((uint32_t)~(RTC_CR_FMT));
+ /* Set RTC_CR register */
+ RTC->CR |= ((uint32_t)(RTC_InitStruct->RTC_HourFormat));
+
+ /* Configure the RTC PRER */
+ RTC->PRER = (uint32_t)(RTC_InitStruct->RTC_SynchPrediv);
+ RTC->PRER |= (uint32_t)(RTC_InitStruct->RTC_AsynchPrediv << 16);
+
+ /* Exit Initialization mode */
+ RTC_ExitInitMode();
+
+ status = SUCCESS;
+ }
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Fills each RTC_InitStruct member with its default value.
+ * @param RTC_InitStruct: pointer to a RTC_InitTypeDef structure which will be
+ * initialized.
+ * @retval None
+ */
+void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct)
+{
+ /* Initialize the RTC_HourFormat member */
+ RTC_InitStruct->RTC_HourFormat = RTC_HourFormat_24;
+
+ /* Initialize the RTC_AsynchPrediv member */
+ RTC_InitStruct->RTC_AsynchPrediv = (uint32_t)0x7F;
+
+ /* Initialize the RTC_SynchPrediv member */
+ RTC_InitStruct->RTC_SynchPrediv = (uint32_t)0xFF;
+}
+
+/**
+ * @brief Enables or disables the RTC registers write protection.
+ * @note All the RTC registers are write protected except for RTC_ISR[13:8],
+ * RTC_TAFCR and RTC_BKPxR.
+ * @note Writing a wrong key reactivates the write protection.
+ * @note The protection mechanism is not affected by system reset.
+ * @param NewState: new state of the write protection.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void RTC_WriteProtectionCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ if (NewState != DISABLE)
+ {
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+ }
+ else
+ {
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+ }
+}
+
+/**
+ * @brief Enters the RTC Initialization mode.
+ * @note The RTC Initialization mode is write protected, use the
+ * RTC_WriteProtectionCmd(DISABLE) before calling this function.
+ * @param None
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC is in Init mode
+ * - ERROR: RTC is not in Init mode
+ */
+ErrorStatus RTC_EnterInitMode(void)
+{
+ __IO uint32_t initcounter = 0x00;
+ ErrorStatus status = ERROR;
+ uint32_t initstatus = 0x00;
+
+ /* Check if the Initialization mode is set */
+ if ((RTC->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
+ {
+ /* Set the Initialization mode */
+ RTC->ISR = (uint32_t)RTC_INIT_MASK;
+
+ /* Wait till RTC is in INIT state and if Time out is reached exit */
+ do
+ {
+ initstatus = RTC->ISR & RTC_ISR_INITF;
+ initcounter++;
+ } while((initcounter != INITMODE_TIMEOUT) && (initstatus == 0x00));
+
+ if ((RTC->ISR & RTC_ISR_INITF) != RESET)
+ {
+ status = SUCCESS;
+ }
+ else
+ {
+ status = ERROR;
+ }
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+
+ return (status);
+}
+
+/**
+ * @brief Exits the RTC Initialization mode.
+ * @note When the initialization sequence is complete, the calendar restarts
+ * counting after 4 RTCCLK cycles.
+ * @note The RTC Initialization mode is write protected, use the
+ * RTC_WriteProtectionCmd(DISABLE) before calling this function.
+ * @param None
+ * @retval None
+ */
+void RTC_ExitInitMode(void)
+{
+ /* Exit Initialization mode */
+ RTC->ISR &= (uint32_t)~RTC_ISR_INIT;
+}
+
+/**
+ * @brief Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are
+ * synchronized with RTC APB clock.
+ * @note The RTC Resynchronization mode is write protected, use the
+ * RTC_WriteProtectionCmd(DISABLE) before calling this function.
+ * @note To read the calendar through the shadow registers after Calendar
+ * initialization, calendar update or after wakeup from low power modes
+ * the software must first clear the RSF flag.
+ * The software must then wait until it is set again before reading
+ * the calendar, which means that the calendar registers have been
+ * correctly copied into the RTC_TR and RTC_DR shadow registers.
+ * @param None
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC registers are synchronised
+ * - ERROR: RTC registers are not synchronised
+ */
+ErrorStatus RTC_WaitForSynchro(void)
+{
+ __IO uint32_t synchrocounter = 0;
+ ErrorStatus status = ERROR;
+ uint32_t synchrostatus = 0x00;
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Clear RSF flag */
+ RTC->ISR &= (uint32_t)RTC_RSF_MASK;
+
+ /* Wait the registers to be synchronised */
+ do
+ {
+ synchrostatus = RTC->ISR & RTC_ISR_RSF;
+ synchrocounter++;
+ } while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
+
+ if ((RTC->ISR & RTC_ISR_RSF) != RESET)
+ {
+ status = SUCCESS;
+ }
+ else
+ {
+ status = ERROR;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return (status);
+}
+
+/**
+ * @brief Enables or disables the RTC reference clock detection.
+ * @param NewState: new state of the RTC reference clock.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC reference clock detection is enabled
+ * - ERROR: RTC reference clock detection is disabled
+ */
+ErrorStatus RTC_RefClockCmd(FunctionalState NewState)
+{
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Set Initialization mode */
+ if (RTC_EnterInitMode() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ if (NewState != DISABLE)
+ {
+ /* Enable the RTC reference clock detection */
+ RTC->CR |= RTC_CR_REFCKON;
+ }
+ else
+ {
+ /* Disable the RTC reference clock detection */
+ RTC->CR &= ~RTC_CR_REFCKON;
+ }
+ /* Exit Initialization mode */
+ RTC_ExitInitMode();
+
+ status = SUCCESS;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Enables or Disables the Bypass Shadow feature.
+ * @note When the Bypass Shadow is enabled the calendar value are taken
+ * directly from the Calendar counter.
+ * @param NewState: new state of the Bypass Shadow feature.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+*/
+void RTC_BypassShadowCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ if (NewState != DISABLE)
+ {
+ /* Set the BYPSHAD bit */
+ RTC->CR |= (uint8_t)RTC_CR_BYPSHAD;
+ }
+ else
+ {
+ /* Reset the BYPSHAD bit */
+ RTC->CR &= (uint8_t)~RTC_CR_BYPSHAD;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group2 Time and Date configuration functions
+ * @brief Time and Date configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Time and Date configuration functions #####
+ ===============================================================================
+
+ [..] This section provide functions allowing to program and read the RTC Calendar
+ (Time and Date).
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Set the RTC current time.
+ * @param RTC_Format: specifies the format of the entered parameters.
+ * This parameter can be one of the following values:
+ * @arg RTC_Format_BIN: Binary data format
+ * @arg RTC_Format_BCD: BCD data format
+ * @param RTC_TimeStruct: pointer to a RTC_TimeTypeDef structure that contains
+ * the time configuration information for the RTC.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC Time register is configured
+ * - ERROR: RTC Time register is not configured
+ */
+ErrorStatus RTC_SetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct)
+{
+ uint32_t tmpreg = 0;
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_FORMAT(RTC_Format));
+
+ if (RTC_Format == RTC_Format_BIN)
+ {
+ if ((RTC->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ {
+ assert_param(IS_RTC_HOUR12(RTC_TimeStruct->RTC_Hours));
+ assert_param(IS_RTC_H12(RTC_TimeStruct->RTC_H12));
+ }
+ else
+ {
+ RTC_TimeStruct->RTC_H12 = 0x00;
+ assert_param(IS_RTC_HOUR24(RTC_TimeStruct->RTC_Hours));
+ }
+ assert_param(IS_RTC_MINUTES(RTC_TimeStruct->RTC_Minutes));
+ assert_param(IS_RTC_SECONDS(RTC_TimeStruct->RTC_Seconds));
+ }
+ else
+ {
+ if ((RTC->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ {
+ tmpreg = RTC_Bcd2ToByte(RTC_TimeStruct->RTC_Hours);
+ assert_param(IS_RTC_HOUR12(tmpreg));
+ assert_param(IS_RTC_H12(RTC_TimeStruct->RTC_H12));
+ }
+ else
+ {
+ RTC_TimeStruct->RTC_H12 = 0x00;
+ assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(RTC_TimeStruct->RTC_Hours)));
+ }
+ assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(RTC_TimeStruct->RTC_Minutes)));
+ assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(RTC_TimeStruct->RTC_Seconds)));
+ }
+
+ /* Check the input parameters format */
+ if (RTC_Format != RTC_Format_BIN)
+ {
+ tmpreg = (((uint32_t)(RTC_TimeStruct->RTC_Hours) << 16) | \
+ ((uint32_t)(RTC_TimeStruct->RTC_Minutes) << 8) | \
+ ((uint32_t)RTC_TimeStruct->RTC_Seconds) | \
+ ((uint32_t)(RTC_TimeStruct->RTC_H12) << 16));
+ }
+ else
+ {
+ tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(RTC_TimeStruct->RTC_Hours) << 16) | \
+ ((uint32_t)RTC_ByteToBcd2(RTC_TimeStruct->RTC_Minutes) << 8) | \
+ ((uint32_t)RTC_ByteToBcd2(RTC_TimeStruct->RTC_Seconds)) | \
+ (((uint32_t)RTC_TimeStruct->RTC_H12) << 16));
+ }
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Set Initialization mode */
+ if (RTC_EnterInitMode() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ /* Set the RTC_TR register */
+ RTC->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
+
+ /* Exit Initialization mode */
+ RTC_ExitInitMode();
+
+ /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
+ if ((RTC->CR & RTC_CR_BYPSHAD) == RESET)
+ {
+ if(RTC_WaitForSynchro() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Fills each RTC_TimeStruct member with its default value
+ * (Time = 00h:00min:00sec).
+ * @param RTC_TimeStruct: pointer to a RTC_TimeTypeDef structure which will be
+ * initialized.
+ * @retval None
+ */
+void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct)
+{
+ /* Time = 00h:00min:00sec */
+ RTC_TimeStruct->RTC_H12 = RTC_H12_AM;
+ RTC_TimeStruct->RTC_Hours = 0;
+ RTC_TimeStruct->RTC_Minutes = 0;
+ RTC_TimeStruct->RTC_Seconds = 0;
+}
+
+/**
+ * @brief Get the RTC current Time.
+ * @param RTC_Format: specifies the format of the returned parameters.
+ * This parameter can be one of the following values:
+ * @arg RTC_Format_BIN: Binary data format
+ * @arg RTC_Format_BCD: BCD data format
+ * @param RTC_TimeStruct: pointer to a RTC_TimeTypeDef structure that will
+ * contain the returned current time configuration.
+ * @retval None
+ */
+void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_FORMAT(RTC_Format));
+
+ /* Get the RTC_TR register */
+ tmpreg = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK);
+
+ /* Fill the structure fields with the read parameters */
+ RTC_TimeStruct->RTC_Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> 16);
+ RTC_TimeStruct->RTC_Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT | RTC_TR_MNU)) >>8);
+ RTC_TimeStruct->RTC_Seconds = (uint8_t)(tmpreg & (RTC_TR_ST | RTC_TR_SU));
+ RTC_TimeStruct->RTC_H12 = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16);
+
+ /* Check the input parameters format */
+ if (RTC_Format == RTC_Format_BIN)
+ {
+ /* Convert the structure parameters to Binary format */
+ RTC_TimeStruct->RTC_Hours = (uint8_t)RTC_Bcd2ToByte(RTC_TimeStruct->RTC_Hours);
+ RTC_TimeStruct->RTC_Minutes = (uint8_t)RTC_Bcd2ToByte(RTC_TimeStruct->RTC_Minutes);
+ RTC_TimeStruct->RTC_Seconds = (uint8_t)RTC_Bcd2ToByte(RTC_TimeStruct->RTC_Seconds);
+ }
+}
+
+/**
+ * @brief Gets the RTC current Calendar Sub seconds value.
+ * @note This function freeze the Time and Date registers after reading the
+ * SSR register.
+ * @param None
+ * @retval RTC current Calendar Sub seconds value.
+ */
+uint32_t RTC_GetSubSecond(void)
+{
+ uint32_t tmpreg = 0;
+
+ /* Get sub seconds values from the correspondent registers*/
+ tmpreg = (uint32_t)(RTC->SSR);
+
+ /* Read DR register to unfroze calendar registers */
+ (void) (RTC->DR);
+
+ return (tmpreg);
+}
+
+/**
+ * @brief Set the RTC current date.
+ * @param RTC_Format: specifies the format of the entered parameters.
+ * This parameter can be one of the following values:
+ * @arg RTC_Format_BIN: Binary data format
+ * @arg RTC_Format_BCD: BCD data format
+ * @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure that contains
+ * the date configuration information for the RTC.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC Date register is configured
+ * - ERROR: RTC Date register is not configured
+ */
+ErrorStatus RTC_SetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct)
+{
+ uint32_t tmpreg = 0;
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_FORMAT(RTC_Format));
+
+ if ((RTC_Format == RTC_Format_BIN) && ((RTC_DateStruct->RTC_Month & 0x10) == 0x10))
+ {
+ RTC_DateStruct->RTC_Month = (RTC_DateStruct->RTC_Month & (uint32_t)~(0x10)) + 0x0A;
+ }
+ if (RTC_Format == RTC_Format_BIN)
+ {
+ assert_param(IS_RTC_YEAR(RTC_DateStruct->RTC_Year));
+ assert_param(IS_RTC_MONTH(RTC_DateStruct->RTC_Month));
+ assert_param(IS_RTC_DATE(RTC_DateStruct->RTC_Date));
+ }
+ else
+ {
+ assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(RTC_DateStruct->RTC_Year)));
+ tmpreg = RTC_Bcd2ToByte(RTC_DateStruct->RTC_Month);
+ assert_param(IS_RTC_MONTH(tmpreg));
+ tmpreg = RTC_Bcd2ToByte(RTC_DateStruct->RTC_Date);
+ assert_param(IS_RTC_DATE(tmpreg));
+ }
+ assert_param(IS_RTC_WEEKDAY(RTC_DateStruct->RTC_WeekDay));
+
+ /* Check the input parameters format */
+ if (RTC_Format != RTC_Format_BIN)
+ {
+ tmpreg = ((((uint32_t)RTC_DateStruct->RTC_Year) << 16) | \
+ (((uint32_t)RTC_DateStruct->RTC_Month) << 8) | \
+ ((uint32_t)RTC_DateStruct->RTC_Date) | \
+ (((uint32_t)RTC_DateStruct->RTC_WeekDay) << 13));
+ }
+ else
+ {
+ tmpreg = (((uint32_t)RTC_ByteToBcd2(RTC_DateStruct->RTC_Year) << 16) | \
+ ((uint32_t)RTC_ByteToBcd2(RTC_DateStruct->RTC_Month) << 8) | \
+ ((uint32_t)RTC_ByteToBcd2(RTC_DateStruct->RTC_Date)) | \
+ ((uint32_t)RTC_DateStruct->RTC_WeekDay << 13));
+ }
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Set Initialization mode */
+ if (RTC_EnterInitMode() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ /* Set the RTC_DR register */
+ RTC->DR = (uint32_t)(tmpreg & RTC_DR_RESERVED_MASK);
+
+ /* Exit Initialization mode */
+ RTC_ExitInitMode();
+
+ /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
+ if ((RTC->CR & RTC_CR_BYPSHAD) == RESET)
+ {
+ if(RTC_WaitForSynchro() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Fills each RTC_DateStruct member with its default value
+ * (Monday, January 01 xx00).
+ * @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure which will be
+ * initialized.
+ * @retval None
+ */
+void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct)
+{
+ /* Monday, January 01 xx00 */
+ RTC_DateStruct->RTC_WeekDay = RTC_Weekday_Monday;
+ RTC_DateStruct->RTC_Date = 1;
+ RTC_DateStruct->RTC_Month = RTC_Month_January;
+ RTC_DateStruct->RTC_Year = 0;
+}
+
+/**
+ * @brief Get the RTC current date.
+ * @param RTC_Format: specifies the format of the returned parameters.
+ * This parameter can be one of the following values:
+ * @arg RTC_Format_BIN: Binary data format
+ * @arg RTC_Format_BCD: BCD data format
+ * @param RTC_DateStruct: pointer to a RTC_DateTypeDef structure that will
+ * contain the returned current date configuration.
+ * @retval None
+ */
+void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_FORMAT(RTC_Format));
+
+ /* Get the RTC_TR register */
+ tmpreg = (uint32_t)(RTC->DR & RTC_DR_RESERVED_MASK);
+
+ /* Fill the structure fields with the read parameters */
+ RTC_DateStruct->RTC_Year = (uint8_t)((tmpreg & (RTC_DR_YT | RTC_DR_YU)) >> 16);
+ RTC_DateStruct->RTC_Month = (uint8_t)((tmpreg & (RTC_DR_MT | RTC_DR_MU)) >> 8);
+ RTC_DateStruct->RTC_Date = (uint8_t)(tmpreg & (RTC_DR_DT | RTC_DR_DU));
+ RTC_DateStruct->RTC_WeekDay = (uint8_t)((tmpreg & (RTC_DR_WDU)) >> 13);
+
+ /* Check the input parameters format */
+ if (RTC_Format == RTC_Format_BIN)
+ {
+ /* Convert the structure parameters to Binary format */
+ RTC_DateStruct->RTC_Year = (uint8_t)RTC_Bcd2ToByte(RTC_DateStruct->RTC_Year);
+ RTC_DateStruct->RTC_Month = (uint8_t)RTC_Bcd2ToByte(RTC_DateStruct->RTC_Month);
+ RTC_DateStruct->RTC_Date = (uint8_t)RTC_Bcd2ToByte(RTC_DateStruct->RTC_Date);
+ }
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group3 Alarms configuration functions
+ * @brief Alarms (Alarm A and Alarm B) configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Alarms A and B configuration functions #####
+ ===============================================================================
+
+ [..] This section provide functions allowing to program and read the RTC Alarms.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Set the specified RTC Alarm.
+ * @note The Alarm register can only be written when the corresponding Alarm
+ * is disabled (Use the RTC_AlarmCmd(DISABLE)).
+ * @param RTC_Format: specifies the format of the returned parameters.
+ * This parameter can be one of the following values:
+ * @arg RTC_Format_BIN: Binary data format
+ * @arg RTC_Format_BCD: BCD data format
+ * @param RTC_Alarm: specifies the alarm to be configured.
+ * This parameter can be one of the following values:
+ * @arg RTC_Alarm_A: to select Alarm A
+ * @arg RTC_Alarm_B: to select Alarm B
+ * @param RTC_AlarmStruct: pointer to a RTC_AlarmTypeDef structure that
+ * contains the alarm configuration parameters.
+ * @retval None
+ */
+void RTC_SetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_FORMAT(RTC_Format));
+ assert_param(IS_RTC_ALARM(RTC_Alarm));
+ assert_param(IS_ALARM_MASK(RTC_AlarmStruct->RTC_AlarmMask));
+ assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(RTC_AlarmStruct->RTC_AlarmDateWeekDaySel));
+
+ if (RTC_Format == RTC_Format_BIN)
+ {
+ if ((RTC->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ {
+ assert_param(IS_RTC_HOUR12(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours));
+ assert_param(IS_RTC_H12(RTC_AlarmStruct->RTC_AlarmTime.RTC_H12));
+ }
+ else
+ {
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = 0x00;
+ assert_param(IS_RTC_HOUR24(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours));
+ }
+ assert_param(IS_RTC_MINUTES(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes));
+ assert_param(IS_RTC_SECONDS(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds));
+
+ if(RTC_AlarmStruct->RTC_AlarmDateWeekDaySel == RTC_AlarmDateWeekDaySel_Date)
+ {
+ assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(RTC_AlarmStruct->RTC_AlarmDateWeekDay));
+ }
+ else
+ {
+ assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(RTC_AlarmStruct->RTC_AlarmDateWeekDay));
+ }
+ }
+ else
+ {
+ if ((RTC->CR & RTC_CR_FMT) != (uint32_t)RESET)
+ {
+ tmpreg = RTC_Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours);
+ assert_param(IS_RTC_HOUR12(tmpreg));
+ assert_param(IS_RTC_H12(RTC_AlarmStruct->RTC_AlarmTime.RTC_H12));
+ }
+ else
+ {
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = 0x00;
+ assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours)));
+ }
+
+ assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes)));
+ assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds)));
+
+ if(RTC_AlarmStruct->RTC_AlarmDateWeekDaySel == RTC_AlarmDateWeekDaySel_Date)
+ {
+ tmpreg = RTC_Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmDateWeekDay);
+ assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
+ }
+ else
+ {
+ tmpreg = RTC_Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmDateWeekDay);
+ assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
+ }
+ }
+
+ /* Check the input parameters format */
+ if (RTC_Format != RTC_Format_BIN)
+ {
+ tmpreg = (((uint32_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) << 16) | \
+ ((uint32_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) << 8) | \
+ ((uint32_t)RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds) | \
+ ((uint32_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_H12) << 16) | \
+ ((uint32_t)(RTC_AlarmStruct->RTC_AlarmDateWeekDay) << 24) | \
+ ((uint32_t)RTC_AlarmStruct->RTC_AlarmDateWeekDaySel) | \
+ ((uint32_t)RTC_AlarmStruct->RTC_AlarmMask));
+ }
+ else
+ {
+ tmpreg = (((uint32_t)RTC_ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours) << 16) | \
+ ((uint32_t)RTC_ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes) << 8) | \
+ ((uint32_t)RTC_ByteToBcd2(RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds)) | \
+ ((uint32_t)(RTC_AlarmStruct->RTC_AlarmTime.RTC_H12) << 16) | \
+ ((uint32_t)RTC_ByteToBcd2(RTC_AlarmStruct->RTC_AlarmDateWeekDay) << 24) | \
+ ((uint32_t)RTC_AlarmStruct->RTC_AlarmDateWeekDaySel) | \
+ ((uint32_t)RTC_AlarmStruct->RTC_AlarmMask));
+ }
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Configure the Alarm register */
+ if (RTC_Alarm == RTC_Alarm_A)
+ {
+ RTC->ALRMAR = (uint32_t)tmpreg;
+ }
+ else
+ {
+ RTC->ALRMBR = (uint32_t)tmpreg;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Fills each RTC_AlarmStruct member with its default value
+ * (Time = 00h:00mn:00sec / Date = 1st day of the month/Mask =
+ * all fields are masked).
+ * @param RTC_AlarmStruct: pointer to a @ref RTC_AlarmTypeDef structure which
+ * will be initialized.
+ * @retval None
+ */
+void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct)
+{
+ /* Alarm Time Settings : Time = 00h:00mn:00sec */
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = RTC_H12_AM;
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = 0;
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = 0;
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = 0;
+
+ /* Alarm Date Settings : Date = 1st day of the month */
+ RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = RTC_AlarmDateWeekDaySel_Date;
+ RTC_AlarmStruct->RTC_AlarmDateWeekDay = 1;
+
+ /* Alarm Masks Settings : Mask = all fields are not masked */
+ RTC_AlarmStruct->RTC_AlarmMask = RTC_AlarmMask_None;
+}
+
+/**
+ * @brief Get the RTC Alarm value and masks.
+ * @param RTC_Format: specifies the format of the output parameters.
+ * This parameter can be one of the following values:
+ * @arg RTC_Format_BIN: Binary data format
+ * @arg RTC_Format_BCD: BCD data format
+ * @param RTC_Alarm: specifies the alarm to be read.
+ * This parameter can be one of the following values:
+ * @arg RTC_Alarm_A: to select Alarm A
+ * @arg RTC_Alarm_B: to select Alarm B
+ * @param RTC_AlarmStruct: pointer to a RTC_AlarmTypeDef structure that will
+ * contains the output alarm configuration values.
+ * @retval None
+ */
+void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_FORMAT(RTC_Format));
+ assert_param(IS_RTC_ALARM(RTC_Alarm));
+
+ /* Get the RTC_ALRMxR register */
+ if (RTC_Alarm == RTC_Alarm_A)
+ {
+ tmpreg = (uint32_t)(RTC->ALRMAR);
+ }
+ else
+ {
+ tmpreg = (uint32_t)(RTC->ALRMBR);
+ }
+
+ /* Fill the structure with the read parameters */
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT | \
+ RTC_ALRMAR_HU)) >> 16);
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT | \
+ RTC_ALRMAR_MNU)) >> 8);
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST | \
+ RTC_ALRMAR_SU));
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_H12 = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16);
+ RTC_AlarmStruct->RTC_AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT | RTC_ALRMAR_DU)) >> 24);
+ RTC_AlarmStruct->RTC_AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL);
+ RTC_AlarmStruct->RTC_AlarmMask = (uint32_t)(tmpreg & RTC_AlarmMask_All);
+
+ if (RTC_Format == RTC_Format_BIN)
+ {
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Hours = RTC_Bcd2ToByte(RTC_AlarmStruct-> \
+ RTC_AlarmTime.RTC_Hours);
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Minutes = RTC_Bcd2ToByte(RTC_AlarmStruct-> \
+ RTC_AlarmTime.RTC_Minutes);
+ RTC_AlarmStruct->RTC_AlarmTime.RTC_Seconds = RTC_Bcd2ToByte(RTC_AlarmStruct-> \
+ RTC_AlarmTime.RTC_Seconds);
+ RTC_AlarmStruct->RTC_AlarmDateWeekDay = RTC_Bcd2ToByte(RTC_AlarmStruct->RTC_AlarmDateWeekDay);
+ }
+}
+
+/**
+ * @brief Enables or disables the specified RTC Alarm.
+ * @param RTC_Alarm: specifies the alarm to be configured.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_Alarm_A: to select Alarm A
+ * @arg RTC_Alarm_B: to select Alarm B
+ * @param NewState: new state of the specified alarm.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC Alarm is enabled/disabled
+ * - ERROR: RTC Alarm is not enabled/disabled
+ */
+ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState)
+{
+ __IO uint32_t alarmcounter = 0x00;
+ uint32_t alarmstatus = 0x00;
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_CMD_ALARM(RTC_Alarm));
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Configure the Alarm state */
+ if (NewState != DISABLE)
+ {
+ RTC->CR |= (uint32_t)RTC_Alarm;
+
+ status = SUCCESS;
+ }
+ else
+ {
+ /* Disable the Alarm in RTC_CR register */
+ RTC->CR &= (uint32_t)~RTC_Alarm;
+
+ /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
+ do
+ {
+ alarmstatus = RTC->ISR & (RTC_Alarm >> 8);
+ alarmcounter++;
+ } while((alarmcounter != INITMODE_TIMEOUT) && (alarmstatus == 0x00));
+
+ if ((RTC->ISR & (RTC_Alarm >> 8)) == RESET)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Configure the RTC AlarmA/B Sub seconds value and mask.*
+ * @note This function is performed only when the Alarm is disabled.
+ * @param RTC_Alarm: specifies the alarm to be configured.
+ * This parameter can be one of the following values:
+ * @arg RTC_Alarm_A: to select Alarm A
+ * @arg RTC_Alarm_B: to select Alarm B
+ * @param RTC_AlarmSubSecondValue: specifies the Sub seconds value.
+ * This parameter can be a value from 0 to 0x00007FFF.
+ * @param RTC_AlarmSubSecondMask: specifies the Sub seconds Mask.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_AlarmSubSecondMask_All : All Alarm SS fields are masked.
+ * There is no comparison on sub seconds for Alarm.
+ * @arg RTC_AlarmSubSecondMask_SS14_1 : SS[14:1] are don't care in Alarm comparison.
+ * Only SS[0] is compared
+ * @arg RTC_AlarmSubSecondMask_SS14_2 : SS[14:2] are don't care in Alarm comparison.
+ * Only SS[1:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_3 : SS[14:3] are don't care in Alarm comparison.
+ * Only SS[2:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_4 : SS[14:4] are don't care in Alarm comparison.
+ * Only SS[3:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_5 : SS[14:5] are don't care in Alarm comparison.
+ * Only SS[4:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_6 : SS[14:6] are don't care in Alarm comparison.
+ * Only SS[5:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_7 : SS[14:7] are don't care in Alarm comparison.
+ * Only SS[6:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_8 : SS[14:8] are don't care in Alarm comparison.
+ * Only SS[7:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_9 : SS[14:9] are don't care in Alarm comparison.
+ * Only SS[8:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_10: SS[14:10] are don't care in Alarm comparison.
+ * Only SS[9:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_11: SS[14:11] are don't care in Alarm comparison.
+ * Only SS[10:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_12: SS[14:12] are don't care in Alarm comparison.
+ * Only SS[11:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14_13: SS[14:13] are don't care in Alarm comparison.
+ * Only SS[12:0] are compared
+ * @arg RTC_AlarmSubSecondMask_SS14 : SS[14] is don't care in Alarm comparison.
+ * Only SS[13:0] are compared
+ * @arg RTC_AlarmSubSecondMask_None : SS[14:0] are compared and must match
+ * to activate alarm
+ * @retval None
+ */
+void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondValue, uint32_t RTC_AlarmSubSecondMask)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_ALARM(RTC_Alarm));
+ assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(RTC_AlarmSubSecondValue));
+ assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(RTC_AlarmSubSecondMask));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Configure the Alarm A or Alarm B Sub Second registers */
+ tmpreg = (uint32_t) (uint32_t)(RTC_AlarmSubSecondValue) | (uint32_t)(RTC_AlarmSubSecondMask);
+
+ if (RTC_Alarm == RTC_Alarm_A)
+ {
+ /* Configure the Alarm A Sub Second register */
+ RTC->ALRMASSR = tmpreg;
+ }
+ else
+ {
+ /* Configure the Alarm B Sub Second register */
+ RTC->ALRMBSSR = tmpreg;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+}
+
+/**
+ * @brief Gets the RTC Alarm Sub seconds value.
+ * @param RTC_Alarm: specifies the alarm to be read.
+ * This parameter can be one of the following values:
+ * @arg RTC_Alarm_A: to select Alarm A
+ * @arg RTC_Alarm_B: to select Alarm B
+ * @param None
+ * @retval RTC Alarm Sub seconds value.
+ */
+uint32_t RTC_GetAlarmSubSecond(uint32_t RTC_Alarm)
+{
+ uint32_t tmpreg = 0;
+
+ /* Get the RTC_ALRMxR register */
+ if (RTC_Alarm == RTC_Alarm_A)
+ {
+ tmpreg = (uint32_t)((RTC->ALRMASSR) & RTC_ALRMASSR_SS);
+ }
+ else
+ {
+ tmpreg = (uint32_t)((RTC->ALRMBSSR) & RTC_ALRMBSSR_SS);
+ }
+
+ return (tmpreg);
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group4 WakeUp Timer configuration functions
+ * @brief WakeUp Timer configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### WakeUp Timer configuration functions #####
+ ===============================================================================
+
+ [..] This section provide functions allowing to program and read the RTC WakeUp.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Configures the RTC Wakeup clock source.
+ * @note The WakeUp Clock source can only be changed when the RTC WakeUp
+ * is disabled (Use the RTC_WakeUpCmd(DISABLE)).
+ * @param RTC_WakeUpClock: Wakeup Clock source.
+ * This parameter can be one of the following values:
+ * @arg RTC_WakeUpClock_RTCCLK_Div16: RTC Wakeup Counter Clock = RTCCLK/16
+ * @arg RTC_WakeUpClock_RTCCLK_Div8: RTC Wakeup Counter Clock = RTCCLK/8
+ * @arg RTC_WakeUpClock_RTCCLK_Div4: RTC Wakeup Counter Clock = RTCCLK/4
+ * @arg RTC_WakeUpClock_RTCCLK_Div2: RTC Wakeup Counter Clock = RTCCLK/2
+ * @arg RTC_WakeUpClock_CK_SPRE_16bits: RTC Wakeup Counter Clock = CK_SPRE
+ * @arg RTC_WakeUpClock_CK_SPRE_17bits: RTC Wakeup Counter Clock = CK_SPRE
+ * @retval None
+ */
+void RTC_WakeUpClockConfig(uint32_t RTC_WakeUpClock)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_WAKEUP_CLOCK(RTC_WakeUpClock));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Clear the Wakeup Timer clock source bits in CR register */
+ RTC->CR &= (uint32_t)~RTC_CR_WUCKSEL;
+
+ /* Configure the clock source */
+ RTC->CR |= (uint32_t)RTC_WakeUpClock;
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Configures the RTC Wakeup counter.
+ * @note The RTC WakeUp counter can only be written when the RTC WakeUp
+ * is disabled (Use the RTC_WakeUpCmd(DISABLE)).
+ * @param RTC_WakeUpCounter: specifies the WakeUp counter.
+ * This parameter can be a value from 0x0000 to 0xFFFF.
+ * @retval None
+ */
+void RTC_SetWakeUpCounter(uint32_t RTC_WakeUpCounter)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_WAKEUP_COUNTER(RTC_WakeUpCounter));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Configure the Wakeup Timer counter */
+ RTC->WUTR = (uint32_t)RTC_WakeUpCounter;
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Returns the RTC WakeUp timer counter value.
+ * @param None
+ * @retval The RTC WakeUp Counter value.
+ */
+uint32_t RTC_GetWakeUpCounter(void)
+{
+ /* Get the counter value */
+ return ((uint32_t)(RTC->WUTR & RTC_WUTR_WUT));
+}
+
+/**
+ * @brief Enables or Disables the RTC WakeUp timer.
+ * @param NewState: new state of the WakeUp timer.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+ErrorStatus RTC_WakeUpCmd(FunctionalState NewState)
+{
+ __IO uint32_t wutcounter = 0x00;
+ uint32_t wutwfstatus = 0x00;
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ if (NewState != DISABLE)
+ {
+ /* Enable the Wakeup Timer */
+ RTC->CR |= (uint32_t)RTC_CR_WUTE;
+ status = SUCCESS;
+ }
+ else
+ {
+ /* Disable the Wakeup Timer */
+ RTC->CR &= (uint32_t)~RTC_CR_WUTE;
+ /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
+ do
+ {
+ wutwfstatus = RTC->ISR & RTC_ISR_WUTWF;
+ wutcounter++;
+ } while((wutcounter != INITMODE_TIMEOUT) && (wutwfstatus == 0x00));
+
+ if ((RTC->ISR & RTC_ISR_WUTWF) == RESET)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group5 Daylight Saving configuration functions
+ * @brief Daylight Saving configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Daylight Saving configuration functions #####
+ ===============================================================================
+
+ [..] This section provide functions allowing to configure the RTC DayLight Saving.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Adds or substract one hour from the current time.
+ * @param RTC_DayLightSaveOperation: the value of hour adjustment.
+ * This parameter can be one of the following values:
+ * @arg RTC_DayLightSaving_SUB1H: Substract one hour (winter time)
+ * @arg RTC_DayLightSaving_ADD1H: Add one hour (summer time)
+ * @param RTC_StoreOperation: Specifies the value to be written in the BCK bit
+ * in CR register to store the operation.
+ * This parameter can be one of the following values:
+ * @arg RTC_StoreOperation_Reset: BCK Bit Reset
+ * @arg RTC_StoreOperation_Set: BCK Bit Set
+ * @retval None
+ */
+void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_DAYLIGHT_SAVING(RTC_DayLightSaving));
+ assert_param(IS_RTC_STORE_OPERATION(RTC_StoreOperation));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Clear the bits to be configured */
+ RTC->CR &= (uint32_t)~(RTC_CR_BCK);
+
+ /* Configure the RTC_CR register */
+ RTC->CR |= (uint32_t)(RTC_DayLightSaving | RTC_StoreOperation);
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Returns the RTC Day Light Saving stored operation.
+ * @param None
+ * @retval RTC Day Light Saving stored operation.
+ * - RTC_StoreOperation_Reset
+ * - RTC_StoreOperation_Set
+ */
+uint32_t RTC_GetStoreOperation(void)
+{
+ return (RTC->CR & RTC_CR_BCK);
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group6 Output pin Configuration function
+ * @brief Output pin Configuration function
+ *
+@verbatim
+ ===============================================================================
+ ##### Output pin Configuration function #####
+ ===============================================================================
+
+ [..] This section provide functions allowing to configure the RTC Output source.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Configures the RTC output source (AFO_ALARM).
+ * @param RTC_Output: Specifies which signal will be routed to the RTC output.
+ * This parameter can be one of the following values:
+ * @arg RTC_Output_Disable: No output selected
+ * @arg RTC_Output_AlarmA: signal of AlarmA mapped to output
+ * @arg RTC_Output_AlarmB: signal of AlarmB mapped to output
+ * @arg RTC_Output_WakeUp: signal of WakeUp mapped to output
+ * @param RTC_OutputPolarity: Specifies the polarity of the output signal.
+ * This parameter can be one of the following:
+ * @arg RTC_OutputPolarity_High: The output pin is high when the
+ * ALRAF/ALRBF/WUTF is high (depending on OSEL)
+ * @arg RTC_OutputPolarity_Low: The output pin is low when the
+ * ALRAF/ALRBF/WUTF is high (depending on OSEL)
+ * @retval None
+ */
+void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_OUTPUT(RTC_Output));
+ assert_param(IS_RTC_OUTPUT_POL(RTC_OutputPolarity));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Clear the bits to be configured */
+ RTC->CR &= (uint32_t)~(RTC_CR_OSEL | RTC_CR_POL);
+
+ /* Configure the output selection and polarity */
+ RTC->CR |= (uint32_t)(RTC_Output | RTC_OutputPolarity);
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group7 Digital Calibration configuration functions
+ * @brief Coarse Calibration configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Digital Calibration configuration functions #####
+ ===============================================================================
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Configures the Coarse calibration parameters.
+ * @param RTC_CalibSign: specifies the sign of the coarse calibration value.
+ * This parameter can be one of the following values:
+ * @arg RTC_CalibSign_Positive: The value sign is positive
+ * @arg RTC_CalibSign_Negative: The value sign is negative
+ * @param Value: value of coarse calibration expressed in ppm (coded on 5 bits).
+ *
+ * @note This Calibration value should be between 0 and 63 when using negative
+ * sign with a 2-ppm step.
+ *
+ * @note This Calibration value should be between 0 and 126 when using positive
+ * sign with a 4-ppm step.
+ *
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC Coarse calibration are initialized
+ * - ERROR: RTC Coarse calibration are not initialized
+ */
+ErrorStatus RTC_CoarseCalibConfig(uint32_t RTC_CalibSign, uint32_t Value)
+{
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_CALIB_SIGN(RTC_CalibSign));
+ assert_param(IS_RTC_CALIB_VALUE(Value));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Set Initialization mode */
+ if (RTC_EnterInitMode() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ /* Set the coarse calibration value */
+ RTC->CALIBR = (uint32_t)(RTC_CalibSign | Value);
+ /* Exit Initialization mode */
+ RTC_ExitInitMode();
+
+ status = SUCCESS;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Enables or disables the Coarse calibration process.
+ * @param NewState: new state of the Coarse calibration.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC Coarse calibration are enabled/disabled
+ * - ERROR: RTC Coarse calibration are not enabled/disabled
+ */
+ErrorStatus RTC_CoarseCalibCmd(FunctionalState NewState)
+{
+ ErrorStatus status = ERROR;
+
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Set Initialization mode */
+ if (RTC_EnterInitMode() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ if (NewState != DISABLE)
+ {
+ /* Enable the Coarse Calibration */
+ RTC->CR |= (uint32_t)RTC_CR_DCE;
+ }
+ else
+ {
+ /* Disable the Coarse Calibration */
+ RTC->CR &= (uint32_t)~RTC_CR_DCE;
+ }
+ /* Exit Initialization mode */
+ RTC_ExitInitMode();
+
+ status = SUCCESS;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return status;
+}
+
+/**
+ * @brief Enables or disables the RTC clock to be output through the relative pin.
+ * @param NewState: new state of the digital calibration Output.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void RTC_CalibOutputCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ if (NewState != DISABLE)
+ {
+ /* Enable the RTC clock output */
+ RTC->CR |= (uint32_t)RTC_CR_COE;
+ }
+ else
+ {
+ /* Disable the RTC clock output */
+ RTC->CR &= (uint32_t)~RTC_CR_COE;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
+ * @param RTC_CalibOutput : Select the Calibration output Selection .
+ * This parameter can be one of the following values:
+ * @arg RTC_CalibOutput_512Hz: A signal has a regular waveform at 512Hz.
+ * @arg RTC_CalibOutput_1Hz : A signal has a regular waveform at 1Hz.
+ * @retval None
+*/
+void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_CALIB_OUTPUT(RTC_CalibOutput));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /*clear flags before configuration */
+ RTC->CR &= (uint32_t)~(RTC_CR_COSEL);
+
+ /* Configure the RTC_CR register */
+ RTC->CR |= (uint32_t)RTC_CalibOutput;
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Configures the Smooth Calibration Settings.
+ * @param RTC_SmoothCalibPeriod : Select the Smooth Calibration Period.
+ * This parameter can be can be one of the following values:
+ * @arg RTC_SmoothCalibPeriod_32sec : The smooth calibration period is 32s.
+ * @arg RTC_SmoothCalibPeriod_16sec : The smooth calibration period is 16s.
+ * @arg RTC_SmoothCalibPeriod_8sec : The smooth calibartion period is 8s.
+ * @param RTC_SmoothCalibPlusPulses : Select to Set or reset the CALP bit.
+ * This parameter can be one of the following values:
+ * @arg RTC_SmoothCalibPlusPulses_Set : Add one RTCCLK puls every 2**11 pulses.
+ * @arg RTC_SmoothCalibPlusPulses_Reset: No RTCCLK pulses are added.
+ * @param RTC_SmouthCalibMinusPulsesValue: Select the value of CALM[8:0] bits.
+ * This parameter can be one any value from 0 to 0x000001FF.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC Calib registers are configured
+ * - ERROR: RTC Calib registers are not configured
+*/
+ErrorStatus RTC_SmoothCalibConfig(uint32_t RTC_SmoothCalibPeriod,
+ uint32_t RTC_SmoothCalibPlusPulses,
+ uint32_t RTC_SmouthCalibMinusPulsesValue)
+{
+ ErrorStatus status = ERROR;
+ uint32_t recalpfcount = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(RTC_SmoothCalibPeriod));
+ assert_param(IS_RTC_SMOOTH_CALIB_PLUS(RTC_SmoothCalibPlusPulses));
+ assert_param(IS_RTC_SMOOTH_CALIB_MINUS(RTC_SmouthCalibMinusPulsesValue));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* check if a calibration is pending*/
+ if ((RTC->ISR & RTC_ISR_RECALPF) != RESET)
+ {
+ /* wait until the Calibration is completed*/
+ while (((RTC->ISR & RTC_ISR_RECALPF) != RESET) && (recalpfcount != RECALPF_TIMEOUT))
+ {
+ recalpfcount++;
+ }
+ }
+
+ /* check if the calibration pending is completed or if there is no calibration operation at all*/
+ if ((RTC->ISR & RTC_ISR_RECALPF) == RESET)
+ {
+ /* Configure the Smooth calibration settings */
+ RTC->CALR = (uint32_t)((uint32_t)RTC_SmoothCalibPeriod | (uint32_t)RTC_SmoothCalibPlusPulses | (uint32_t)RTC_SmouthCalibMinusPulsesValue);
+
+ status = SUCCESS;
+ }
+ else
+ {
+ status = ERROR;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return (ErrorStatus)(status);
+}
+
+/**
+ * @}
+ */
+
+
+/** @defgroup RTC_Group8 TimeStamp configuration functions
+ * @brief TimeStamp configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### TimeStamp configuration functions #####
+ ===============================================================================
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enables or Disables the RTC TimeStamp functionality with the
+ * specified time stamp pin stimulating edge.
+ * @param RTC_TimeStampEdge: Specifies the pin edge on which the TimeStamp is
+ * activated.
+ * This parameter can be one of the following:
+ * @arg RTC_TimeStampEdge_Rising: the Time stamp event occurs on the rising
+ * edge of the related pin.
+ * @arg RTC_TimeStampEdge_Falling: the Time stamp event occurs on the
+ * falling edge of the related pin.
+ * @param NewState: new state of the TimeStamp.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_TIMESTAMP_EDGE(RTC_TimeStampEdge));
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Get the RTC_CR register and clear the bits to be configured */
+ tmpreg = (uint32_t)(RTC->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
+
+ /* Get the new configuration */
+ if (NewState != DISABLE)
+ {
+ tmpreg |= (uint32_t)(RTC_TimeStampEdge | RTC_CR_TSE);
+ }
+ else
+ {
+ tmpreg |= (uint32_t)(RTC_TimeStampEdge);
+ }
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Configure the Time Stamp TSEDGE and Enable bits */
+ RTC->CR = (uint32_t)tmpreg;
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Get the RTC TimeStamp value and masks.
+ * @param RTC_Format: specifies the format of the output parameters.
+ * This parameter can be one of the following values:
+ * @arg RTC_Format_BIN: Binary data format
+ * @arg RTC_Format_BCD: BCD data format
+ * @param RTC_StampTimeStruct: pointer to a RTC_TimeTypeDef structure that will
+ * contains the TimeStamp time values.
+ * @param RTC_StampDateStruct: pointer to a RTC_DateTypeDef structure that will
+ * contains the TimeStamp date values.
+ * @retval None
+ */
+void RTC_GetTimeStamp(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_StampTimeStruct,
+ RTC_DateTypeDef* RTC_StampDateStruct)
+{
+ uint32_t tmptime = 0, tmpdate = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_FORMAT(RTC_Format));
+
+ /* Get the TimeStamp time and date registers values */
+ tmptime = (uint32_t)(RTC->TSTR & RTC_TR_RESERVED_MASK);
+ tmpdate = (uint32_t)(RTC->TSDR & RTC_DR_RESERVED_MASK);
+
+ /* Fill the Time structure fields with the read parameters */
+ RTC_StampTimeStruct->RTC_Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16);
+ RTC_StampTimeStruct->RTC_Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8);
+ RTC_StampTimeStruct->RTC_Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU));
+ RTC_StampTimeStruct->RTC_H12 = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16);
+
+ /* Fill the Date structure fields with the read parameters */
+ RTC_StampDateStruct->RTC_Year = 0;
+ RTC_StampDateStruct->RTC_Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8);
+ RTC_StampDateStruct->RTC_Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU));
+ RTC_StampDateStruct->RTC_WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13);
+
+ /* Check the input parameters format */
+ if (RTC_Format == RTC_Format_BIN)
+ {
+ /* Convert the Time structure parameters to Binary format */
+ RTC_StampTimeStruct->RTC_Hours = (uint8_t)RTC_Bcd2ToByte(RTC_StampTimeStruct->RTC_Hours);
+ RTC_StampTimeStruct->RTC_Minutes = (uint8_t)RTC_Bcd2ToByte(RTC_StampTimeStruct->RTC_Minutes);
+ RTC_StampTimeStruct->RTC_Seconds = (uint8_t)RTC_Bcd2ToByte(RTC_StampTimeStruct->RTC_Seconds);
+
+ /* Convert the Date structure parameters to Binary format */
+ RTC_StampDateStruct->RTC_Month = (uint8_t)RTC_Bcd2ToByte(RTC_StampDateStruct->RTC_Month);
+ RTC_StampDateStruct->RTC_Date = (uint8_t)RTC_Bcd2ToByte(RTC_StampDateStruct->RTC_Date);
+ RTC_StampDateStruct->RTC_WeekDay = (uint8_t)RTC_Bcd2ToByte(RTC_StampDateStruct->RTC_WeekDay);
+ }
+}
+
+/**
+ * @brief Get the RTC timestamp Sub seconds value.
+ * @param None
+ * @retval RTC current timestamp Sub seconds value.
+ */
+uint32_t RTC_GetTimeStampSubSecond(void)
+{
+ /* Get timestamp sub seconds values from the correspondent registers */
+ return (uint32_t)(RTC->TSSSR);
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group9 Tampers configuration functions
+ * @brief Tampers configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Tampers configuration functions #####
+ ===============================================================================
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Configures the select Tamper pin edge.
+ * @param RTC_Tamper: Selected tamper pin.
+ * This parameter can be RTC_Tamper_1.
+ * @param RTC_TamperTrigger: Specifies the trigger on the tamper pin that
+ * stimulates tamper event.
+ * This parameter can be one of the following values:
+ * @arg RTC_TamperTrigger_RisingEdge: Rising Edge of the tamper pin causes tamper event.
+ * @arg RTC_TamperTrigger_FallingEdge: Falling Edge of the tamper pin causes tamper event.
+ * @arg RTC_TamperTrigger_LowLevel: Low Level of the tamper pin causes tamper event.
+ * @arg RTC_TamperTrigger_HighLevel: High Level of the tamper pin causes tamper event.
+ * @retval None
+ */
+void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_TAMPER(RTC_Tamper));
+ assert_param(IS_RTC_TAMPER_TRIGGER(RTC_TamperTrigger));
+
+ if (RTC_TamperTrigger == RTC_TamperTrigger_RisingEdge)
+ {
+ /* Configure the RTC_TAFCR register */
+ RTC->TAFCR &= (uint32_t)((uint32_t)~(RTC_Tamper << 1));
+ }
+ else
+ {
+ /* Configure the RTC_TAFCR register */
+ RTC->TAFCR |= (uint32_t)(RTC_Tamper << 1);
+ }
+}
+
+/**
+ * @brief Enables or Disables the Tamper detection.
+ * @param RTC_Tamper: Selected tamper pin.
+ * This parameter can be RTC_Tamper_1.
+ * @param NewState: new state of the tamper pin.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_TAMPER(RTC_Tamper));
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ if (NewState != DISABLE)
+ {
+ /* Enable the selected Tamper pin */
+ RTC->TAFCR |= (uint32_t)RTC_Tamper;
+ }
+ else
+ {
+ /* Disable the selected Tamper pin */
+ RTC->TAFCR &= (uint32_t)~RTC_Tamper;
+ }
+}
+
+/**
+ * @brief Configures the Tampers Filter.
+ * @param RTC_TamperFilter: Specifies the tampers filter.
+ * This parameter can be one of the following values:
+ * @arg RTC_TamperFilter_Disable: Tamper filter is disabled.
+ * @arg RTC_TamperFilter_2Sample: Tamper is activated after 2 consecutive
+ * samples at the active level
+ * @arg RTC_TamperFilter_4Sample: Tamper is activated after 4 consecutive
+ * samples at the active level
+ * @arg RTC_TamperFilter_8Sample: Tamper is activated after 8 consecutive
+ * samples at the active level
+ * @retval None
+ */
+void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_TAMPER_FILTER(RTC_TamperFilter));
+
+ /* Clear TAMPFLT[1:0] bits in the RTC_TAFCR register */
+ RTC->TAFCR &= (uint32_t)~(RTC_TAFCR_TAMPFLT);
+
+ /* Configure the RTC_TAFCR register */
+ RTC->TAFCR |= (uint32_t)RTC_TamperFilter;
+}
+
+/**
+ * @brief Configures the Tampers Sampling Frequency.
+ * @param RTC_TamperSamplingFreq: Specifies the tampers Sampling Frequency.
+ * This parameter can be one of the following values:
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div32768: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 32768
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div16384: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 16384
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div8192: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 8192
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div4096: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 4096
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div2048: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 2048
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div1024: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 1024
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div512: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 512
+ * @arg RTC_TamperSamplingFreq_RTCCLK_Div256: Each of the tamper inputs are sampled
+ * with a frequency = RTCCLK / 256
+ * @retval None
+ */
+void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(RTC_TamperSamplingFreq));
+
+ /* Clear TAMPFREQ[2:0] bits in the RTC_TAFCR register */
+ RTC->TAFCR &= (uint32_t)~(RTC_TAFCR_TAMPFREQ);
+
+ /* Configure the RTC_TAFCR register */
+ RTC->TAFCR |= (uint32_t)RTC_TamperSamplingFreq;
+}
+
+/**
+ * @brief Configures the Tampers Pins input Precharge Duration.
+ * @param RTC_TamperPrechargeDuration: Specifies the Tampers Pins input
+ * Precharge Duration.
+ * This parameter can be one of the following values:
+ * @arg RTC_TamperPrechargeDuration_1RTCCLK: Tamper pins are precharged before sampling during 1 RTCCLK cycle
+ * @arg RTC_TamperPrechargeDuration_2RTCCLK: Tamper pins are precharged before sampling during 2 RTCCLK cycle
+ * @arg RTC_TamperPrechargeDuration_4RTCCLK: Tamper pins are precharged before sampling during 4 RTCCLK cycle
+ * @arg RTC_TamperPrechargeDuration_8RTCCLK: Tamper pins are precharged before sampling during 8 RTCCLK cycle
+ * @retval None
+ */
+void RTC_TamperPinsPrechargeDuration(uint32_t RTC_TamperPrechargeDuration)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(RTC_TamperPrechargeDuration));
+
+ /* Clear TAMPPRCH[1:0] bits in the RTC_TAFCR register */
+ RTC->TAFCR &= (uint32_t)~(RTC_TAFCR_TAMPPRCH);
+
+ /* Configure the RTC_TAFCR register */
+ RTC->TAFCR |= (uint32_t)RTC_TamperPrechargeDuration;
+}
+
+/**
+ * @brief Enables or Disables the TimeStamp on Tamper Detection Event.
+ * @note The timestamp is valid even the TSE bit in tamper control register
+ * is reset.
+ * @param NewState: new state of the timestamp on tamper event.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ if (NewState != DISABLE)
+ {
+ /* Save timestamp on tamper detection event */
+ RTC->TAFCR |= (uint32_t)RTC_TAFCR_TAMPTS;
+ }
+ else
+ {
+ /* Tamper detection does not cause a timestamp to be saved */
+ RTC->TAFCR &= (uint32_t)~RTC_TAFCR_TAMPTS;
+ }
+}
+
+/**
+ * @brief Enables or Disables the Precharge of Tamper pin.
+ * @param NewState: new state of tamper pull up.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void RTC_TamperPullUpCmd(FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ if (NewState != DISABLE)
+ {
+ /* Enable precharge of the selected Tamper pin */
+ RTC->TAFCR &= (uint32_t)~RTC_TAFCR_TAMPPUDIS;
+ }
+ else
+ {
+ /* Disable precharge of the selected Tamper pin */
+ RTC->TAFCR |= (uint32_t)RTC_TAFCR_TAMPPUDIS;
+ }
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group10 Backup Data Registers configuration functions
+ * @brief Backup Data Registers configuration functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Backup Data Registers configuration functions #####
+ ===============================================================================
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Writes a data in a specified RTC Backup data register.
+ * @param RTC_BKP_DR: RTC Backup data Register number.
+ * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
+ * specify the register.
+ * @param Data: Data to be written in the specified RTC Backup data register.
+ * @retval None
+ */
+void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data)
+{
+ __IO uint32_t tmp = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_BKP(RTC_BKP_DR));
+
+ tmp = RTC_BASE + 0x50;
+ tmp += (RTC_BKP_DR * 4);
+
+ /* Write the specified register */
+ *(__IO uint32_t *)tmp = (uint32_t)Data;
+}
+
+/**
+ * @brief Reads data from the specified RTC Backup data Register.
+ * @param RTC_BKP_DR: RTC Backup data Register number.
+ * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
+ * specify the register.
+ * @retval None
+ */
+uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR)
+{
+ __IO uint32_t tmp = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_BKP(RTC_BKP_DR));
+
+ tmp = RTC_BASE + 0x50;
+ tmp += (RTC_BKP_DR * 4);
+
+ /* Read the specified register */
+ return (*(__IO uint32_t *)tmp);
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group11 RTC Tamper and TimeStamp Pins Selection and Output Type Config configuration functions
+ * @brief RTC Tamper and TimeStamp Pins Selection and Output Type Config
+ * configuration functions
+ *
+@verbatim
+ ==================================================================================================
+ ##### RTC Tamper and TimeStamp Pins Selection and Output Type Config configuration functions #####
+ ==================================================================================================
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Selects the RTC Tamper Pin.
+ * @param RTC_TamperPin: specifies the RTC Tamper Pin.
+ * This parameter can be one of the following values:
+ * @arg RTC_TamperPin_PC13: PC13 is selected as RTC Tamper Pin.
+ * @arg RTC_TamperPin_PI8: PI8 is selected as RTC Tamper Pin.
+ * @retval None
+ */
+void RTC_TamperPinSelection(uint32_t RTC_TamperPin)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_TAMPER_PIN(RTC_TamperPin));
+
+ RTC->TAFCR &= (uint32_t)~(RTC_TAFCR_TAMPINSEL);
+ RTC->TAFCR |= (uint32_t)(RTC_TamperPin);
+}
+
+/**
+ * @brief Selects the RTC TimeStamp Pin.
+ * @param RTC_TimeStampPin: specifies the RTC TimeStamp Pin.
+ * This parameter can be one of the following values:
+ * @arg RTC_TimeStampPin_PC13: PC13 is selected as RTC TimeStamp Pin.
+ * @arg RTC_TimeStampPin_PI8: PI8 is selected as RTC TimeStamp Pin.
+ * @retval None
+ */
+void RTC_TimeStampPinSelection(uint32_t RTC_TimeStampPin)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
+
+ RTC->TAFCR &= (uint32_t)~(RTC_TAFCR_TSINSEL);
+ RTC->TAFCR |= (uint32_t)(RTC_TimeStampPin);
+}
+
+/**
+ * @brief Configures the RTC Output Pin mode.
+ * @param RTC_OutputType: specifies the RTC Output (PC13) pin mode.
+ * This parameter can be one of the following values:
+ * @arg RTC_OutputType_OpenDrain: RTC Output (PC13) is configured in
+ * Open Drain mode.
+ * @arg RTC_OutputType_PushPull: RTC Output (PC13) is configured in
+ * Push Pull mode.
+ * @retval None
+ */
+void RTC_OutputTypeConfig(uint32_t RTC_OutputType)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_OUTPUT_TYPE(RTC_OutputType));
+
+ RTC->TAFCR &= (uint32_t)~(RTC_TAFCR_ALARMOUTTYPE);
+ RTC->TAFCR |= (uint32_t)(RTC_OutputType);
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group12 Shift control synchronisation functions
+ * @brief Shift control synchronisation functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Shift control synchronisation functions #####
+ ===============================================================================
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Configures the Synchronization Shift Control Settings.
+ * @note When REFCKON is set, firmware must not write to Shift control register
+ * @param RTC_ShiftAdd1S : Select to add or not 1 second to the time Calendar.
+ * This parameter can be one of the following values :
+ * @arg RTC_ShiftAdd1S_Set : Add one second to the clock calendar.
+ * @arg RTC_ShiftAdd1S_Reset: No effect.
+ * @param RTC_ShiftSubFS: Select the number of Second Fractions to Substitute.
+ * This parameter can be one any value from 0 to 0x7FFF.
+ * @retval An ErrorStatus enumeration value:
+ * - SUCCESS: RTC Shift registers are configured
+ * - ERROR: RTC Shift registers are not configured
+*/
+ErrorStatus RTC_SynchroShiftConfig(uint32_t RTC_ShiftAdd1S, uint32_t RTC_ShiftSubFS)
+{
+ ErrorStatus status = ERROR;
+ uint32_t shpfcount = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_SHIFT_ADD1S(RTC_ShiftAdd1S));
+ assert_param(IS_RTC_SHIFT_SUBFS(RTC_ShiftSubFS));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ /* Check if a Shift is pending*/
+ if ((RTC->ISR & RTC_ISR_SHPF) != RESET)
+ {
+ /* Wait until the shift is completed*/
+ while (((RTC->ISR & RTC_ISR_SHPF) != RESET) && (shpfcount != SHPF_TIMEOUT))
+ {
+ shpfcount++;
+ }
+ }
+
+ /* Check if the Shift pending is completed or if there is no Shift operation at all*/
+ if ((RTC->ISR & RTC_ISR_SHPF) == RESET)
+ {
+ /* check if the reference clock detection is disabled */
+ if((RTC->CR & RTC_CR_REFCKON) == RESET)
+ {
+ /* Configure the Shift settings */
+ RTC->SHIFTR = (uint32_t)(uint32_t)(RTC_ShiftSubFS) | (uint32_t)(RTC_ShiftAdd1S);
+
+ if(RTC_WaitForSynchro() == ERROR)
+ {
+ status = ERROR;
+ }
+ else
+ {
+ status = SUCCESS;
+ }
+ }
+ else
+ {
+ status = ERROR;
+ }
+ }
+ else
+ {
+ status = ERROR;
+ }
+
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+
+ return (ErrorStatus)(status);
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Group13 Interrupts and flags management functions
+ * @brief Interrupts and flags management functions
+ *
+@verbatim
+ ===============================================================================
+ ##### Interrupts and flags management functions #####
+ ===============================================================================
+ [..] All RTC interrupts are connected to the EXTI controller.
+
+ (+) To enable the RTC Alarm interrupt, the following sequence is required:
+ (++) Configure and enable the EXTI Line 17 in interrupt mode and select
+ the rising edge sensitivity using the EXTI_Init() function.
+ (++) Configure and enable the RTC_Alarm IRQ channel in the NVIC using the
+ NVIC_Init() function.
+ (++) Configure the RTC to generate RTC alarms (Alarm A and/or Alarm B) using
+ the RTC_SetAlarm() and RTC_AlarmCmd() functions.
+
+ (+) To enable the RTC Wakeup interrupt, the following sequence is required:
+ (++) Configure and enable the EXTI Line 22 in interrupt mode and select the
+ rising edge sensitivity using the EXTI_Init() function.
+ (++) Configure and enable the RTC_WKUP IRQ channel in the NVIC using the
+ NVIC_Init() function.
+ (++) Configure the RTC to generate the RTC wakeup timer event using the
+ RTC_WakeUpClockConfig(), RTC_SetWakeUpCounter() and RTC_WakeUpCmd()
+ functions.
+
+ (+) To enable the RTC Tamper interrupt, the following sequence is required:
+ (++) Configure and enable the EXTI Line 21 in interrupt mode and select
+ the rising edge sensitivity using the EXTI_Init() function.
+ (++) Configure and enable the TAMP_STAMP IRQ channel in the NVIC using the
+ NVIC_Init() function.
+ (++) Configure the RTC to detect the RTC tamper event using the
+ RTC_TamperTriggerConfig() and RTC_TamperCmd() functions.
+
+ (+) To enable the RTC TimeStamp interrupt, the following sequence is required:
+ (++) Configure and enable the EXTI Line 21 in interrupt mode and select the
+ rising edge sensitivity using the EXTI_Init() function.
+ (++) Configure and enable the TAMP_STAMP IRQ channel in the NVIC using the
+ NVIC_Init() function.
+ (++) Configure the RTC to detect the RTC time stamp event using the
+ RTC_TimeStampCmd() functions.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Enables or disables the specified RTC interrupts.
+ * @param RTC_IT: specifies the RTC interrupt sources to be enabled or disabled.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_TS: Time Stamp interrupt mask
+ * @arg RTC_IT_WUT: WakeUp Timer interrupt mask
+ * @arg RTC_IT_ALRB: Alarm B interrupt mask
+ * @arg RTC_IT_ALRA: Alarm A interrupt mask
+ * @arg RTC_IT_TAMP: Tamper event interrupt mask
+ * @param NewState: new state of the specified RTC interrupts.
+ * This parameter can be: ENABLE or DISABLE.
+ * @retval None
+ */
+void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_CONFIG_IT(RTC_IT));
+ assert_param(IS_FUNCTIONAL_STATE(NewState));
+
+ /* Disable the write protection for RTC registers */
+ RTC->WPR = 0xCA;
+ RTC->WPR = 0x53;
+
+ if (NewState != DISABLE)
+ {
+ /* Configure the Interrupts in the RTC_CR register */
+ RTC->CR |= (uint32_t)(RTC_IT & ~RTC_TAFCR_TAMPIE);
+ /* Configure the Tamper Interrupt in the RTC_TAFCR */
+ RTC->TAFCR |= (uint32_t)(RTC_IT & RTC_TAFCR_TAMPIE);
+ }
+ else
+ {
+ /* Configure the Interrupts in the RTC_CR register */
+ RTC->CR &= (uint32_t)~(RTC_IT & (uint32_t)~RTC_TAFCR_TAMPIE);
+ /* Configure the Tamper Interrupt in the RTC_TAFCR */
+ RTC->TAFCR &= (uint32_t)~(RTC_IT & RTC_TAFCR_TAMPIE);
+ }
+ /* Enable the write protection for RTC registers */
+ RTC->WPR = 0xFF;
+}
+
+/**
+ * @brief Checks whether the specified RTC flag is set or not.
+ * @param RTC_FLAG: specifies the flag to check.
+ * This parameter can be one of the following values:
+ * @arg RTC_FLAG_RECALPF: RECALPF event flag.
+ * @arg RTC_FLAG_TAMP1F: Tamper 1 event flag
+ * @arg RTC_FLAG_TSOVF: Time Stamp OverFlow flag
+ * @arg RTC_FLAG_TSF: Time Stamp event flag
+ * @arg RTC_FLAG_WUTF: WakeUp Timer flag
+ * @arg RTC_FLAG_ALRBF: Alarm B flag
+ * @arg RTC_FLAG_ALRAF: Alarm A flag
+ * @arg RTC_FLAG_INITF: Initialization mode flag
+ * @arg RTC_FLAG_RSF: Registers Synchronized flag
+ * @arg RTC_FLAG_INITS: Registers Configured flag
+ * @arg RTC_FLAG_SHPF: Shift operation pending flag.
+ * @arg RTC_FLAG_WUTWF: WakeUp Timer Write flag
+ * @arg RTC_FLAG_ALRBWF: Alarm B Write flag
+ * @arg RTC_FLAG_ALRAWF: Alarm A write flag
+ * @retval The new state of RTC_FLAG (SET or RESET).
+ */
+FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG)
+{
+ FlagStatus bitstatus = RESET;
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_GET_FLAG(RTC_FLAG));
+
+ /* Get all the flags */
+ tmpreg = (uint32_t)(RTC->ISR & RTC_FLAGS_MASK);
+
+ /* Return the status of the flag */
+ if ((tmpreg & RTC_FLAG) != (uint32_t)RESET)
+ {
+ bitstatus = SET;
+ }
+ else
+ {
+ bitstatus = RESET;
+ }
+ return bitstatus;
+}
+
+/**
+ * @brief Clears the RTC's pending flags.
+ * @param RTC_FLAG: specifies the RTC flag to clear.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_FLAG_TAMP1F: Tamper 1 event flag
+ * @arg RTC_FLAG_TSOVF: Time Stamp Overflow flag
+ * @arg RTC_FLAG_TSF: Time Stamp event flag
+ * @arg RTC_FLAG_WUTF: WakeUp Timer flag
+ * @arg RTC_FLAG_ALRBF: Alarm B flag
+ * @arg RTC_FLAG_ALRAF: Alarm A flag
+ * @arg RTC_FLAG_RSF: Registers Synchronized flag
+ * @retval None
+ */
+void RTC_ClearFlag(uint32_t RTC_FLAG)
+{
+ /* Check the parameters */
+ assert_param(IS_RTC_CLEAR_FLAG(RTC_FLAG));
+
+ /* Clear the Flags in the RTC_ISR register */
+ RTC->ISR = (uint32_t)((uint32_t)(~((RTC_FLAG | RTC_ISR_INIT)& 0x0000FFFF) | (uint32_t)(RTC->ISR & RTC_ISR_INIT)));
+}
+
+/**
+ * @brief Checks whether the specified RTC interrupt has occurred or not.
+ * @param RTC_IT: specifies the RTC interrupt source to check.
+ * This parameter can be one of the following values:
+ * @arg RTC_IT_TS: Time Stamp interrupt
+ * @arg RTC_IT_WUT: WakeUp Timer interrupt
+ * @arg RTC_IT_ALRB: Alarm B interrupt
+ * @arg RTC_IT_ALRA: Alarm A interrupt
+ * @arg RTC_IT_TAMP1: Tamper 1 event interrupt
+ * @retval The new state of RTC_IT (SET or RESET).
+ */
+ITStatus RTC_GetITStatus(uint32_t RTC_IT)
+{
+ ITStatus bitstatus = RESET;
+ uint32_t tmpreg = 0, enablestatus = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_GET_IT(RTC_IT));
+
+ /* Get the TAMPER Interrupt enable bit and pending bit */
+ tmpreg = (uint32_t)(RTC->TAFCR & (RTC_TAFCR_TAMPIE));
+
+ /* Get the Interrupt enable Status */
+ enablestatus = (uint32_t)((RTC->CR & RTC_IT) | (tmpreg & (RTC_IT >> 15)));
+
+ /* Get the Interrupt pending bit */
+ tmpreg = (uint32_t)((RTC->ISR & (uint32_t)(RTC_IT >> 4)));
+
+ /* Get the status of the Interrupt */
+ if ((enablestatus != (uint32_t)RESET) && ((tmpreg & 0x0000FFFF) != (uint32_t)RESET))
+ {
+ bitstatus = SET;
+ }
+ else
+ {
+ bitstatus = RESET;
+ }
+ return bitstatus;
+}
+
+/**
+ * @brief Clears the RTC's interrupt pending bits.
+ * @param RTC_IT: specifies the RTC interrupt pending bit to clear.
+ * This parameter can be any combination of the following values:
+ * @arg RTC_IT_TS: Time Stamp interrupt
+ * @arg RTC_IT_WUT: WakeUp Timer interrupt
+ * @arg RTC_IT_ALRB: Alarm B interrupt
+ * @arg RTC_IT_ALRA: Alarm A interrupt
+ * @arg RTC_IT_TAMP1: Tamper 1 event interrupt
+ * @retval None
+ */
+void RTC_ClearITPendingBit(uint32_t RTC_IT)
+{
+ uint32_t tmpreg = 0;
+
+ /* Check the parameters */
+ assert_param(IS_RTC_CLEAR_IT(RTC_IT));
+
+ /* Get the RTC_ISR Interrupt pending bits mask */
+ tmpreg = (uint32_t)(RTC_IT >> 4);
+
+ /* Clear the interrupt pending bits in the RTC_ISR register */
+ RTC->ISR = (uint32_t)((uint32_t)(~((tmpreg | RTC_ISR_INIT)& 0x0000FFFF) | (uint32_t)(RTC->ISR & RTC_ISR_INIT)));
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @brief Converts a 2 digit decimal to BCD format.
+ * @param Value: Byte to be converted.
+ * @retval Converted byte
+ */
+static uint8_t RTC_ByteToBcd2(uint8_t Value)
+{
+ uint8_t bcdhigh = 0;
+
+ while (Value >= 10)
+ {
+ bcdhigh++;
+ Value -= 10;
+ }
+
+ return ((uint8_t)(bcdhigh << 4) | Value);
+}
+
+/**
+ * @brief Convert from 2 digit BCD to Binary.
+ * @param Value: BCD value to be converted.
+ * @retval Converted word
+ */
+static uint8_t RTC_Bcd2ToByte(uint8_t Value)
+{
+ uint8_t tmp = 0;
+ tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10;
+ return (tmp + (Value & (uint8_t)0x0F));
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/stm/lib/stm32f4xx_rtc.h b/stm/lib/stm32f4xx_rtc.h
new file mode 100644
index 0000000000000000000000000000000000000000..51e2cfd63fa8b79ea22c27a8280cc5e6690eb35c
--- /dev/null
+++ b/stm/lib/stm32f4xx_rtc.h
@@ -0,0 +1,881 @@
+/**
+ ******************************************************************************
+ * @file stm32f4xx_rtc.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 11-January-2013
+ * @brief This file contains all the functions prototypes for the RTC firmware
+ * library.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_RTC_H
+#define __STM32F4xx_RTC_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx.h"
+
+/** @addtogroup STM32F4xx_StdPeriph_Driver
+ * @{
+ */
+
+/** @addtogroup RTC
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+
+/**
+ * @brief RTC Init structures definition
+ */
+typedef struct
+{
+ uint32_t RTC_HourFormat; /*!< Specifies the RTC Hour Format.
+ This parameter can be a value of @ref RTC_Hour_Formats */
+
+ uint32_t RTC_AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value.
+ This parameter must be set to a value lower than 0x7F */
+
+ uint32_t RTC_SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
+ This parameter must be set to a value lower than 0x7FFF */
+}RTC_InitTypeDef;
+
+/**
+ * @brief RTC Time structure definition
+ */
+typedef struct
+{
+ uint8_t RTC_Hours; /*!< Specifies the RTC Time Hour.
+ This parameter must be set to a value in the 0-12 range
+ if the RTC_HourFormat_12 is selected or 0-23 range if
+ the RTC_HourFormat_24 is selected. */
+
+ uint8_t RTC_Minutes; /*!< Specifies the RTC Time Minutes.
+ This parameter must be set to a value in the 0-59 range. */
+
+ uint8_t RTC_Seconds; /*!< Specifies the RTC Time Seconds.
+ This parameter must be set to a value in the 0-59 range. */
+
+ uint8_t RTC_H12; /*!< Specifies the RTC AM/PM Time.
+ This parameter can be a value of @ref RTC_AM_PM_Definitions */
+}RTC_TimeTypeDef;
+
+/**
+ * @brief RTC Date structure definition
+ */
+typedef struct
+{
+ uint8_t RTC_WeekDay; /*!< Specifies the RTC Date WeekDay.
+ This parameter can be a value of @ref RTC_WeekDay_Definitions */
+
+ uint8_t RTC_Month; /*!< Specifies the RTC Date Month (in BCD format).
+ This parameter can be a value of @ref RTC_Month_Date_Definitions */
+
+ uint8_t RTC_Date; /*!< Specifies the RTC Date.
+ This parameter must be set to a value in the 1-31 range. */
+
+ uint8_t RTC_Year; /*!< Specifies the RTC Date Year.
+ This parameter must be set to a value in the 0-99 range. */
+}RTC_DateTypeDef;
+
+/**
+ * @brief RTC Alarm structure definition
+ */
+typedef struct
+{
+ RTC_TimeTypeDef RTC_AlarmTime; /*!< Specifies the RTC Alarm Time members. */
+
+ uint32_t RTC_AlarmMask; /*!< Specifies the RTC Alarm Masks.
+ This parameter can be a value of @ref RTC_AlarmMask_Definitions */
+
+ uint32_t RTC_AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
+ This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
+
+ uint8_t RTC_AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
+ If the Alarm Date is selected, this parameter
+ must be set to a value in the 1-31 range.
+ If the Alarm WeekDay is selected, this
+ parameter can be a value of @ref RTC_WeekDay_Definitions */
+}RTC_AlarmTypeDef;
+
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup RTC_Exported_Constants
+ * @{
+ */
+
+
+/** @defgroup RTC_Hour_Formats
+ * @{
+ */
+#define RTC_HourFormat_24 ((uint32_t)0x00000000)
+#define RTC_HourFormat_12 ((uint32_t)0x00000040)
+#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HourFormat_12) || \
+ ((FORMAT) == RTC_HourFormat_24))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Asynchronous_Predivider
+ * @{
+ */
+#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7F)
+
+/**
+ * @}
+ */
+
+
+/** @defgroup RTC_Synchronous_Predivider
+ * @{
+ */
+#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FFF)
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Time_Definitions
+ * @{
+ */
+#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0) && ((HOUR) <= 12))
+#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23)
+#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59)
+#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59)
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_AM_PM_Definitions
+ * @{
+ */
+#define RTC_H12_AM ((uint8_t)0x00)
+#define RTC_H12_PM ((uint8_t)0x40)
+#define IS_RTC_H12(PM) (((PM) == RTC_H12_AM) || ((PM) == RTC_H12_PM))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Year_Date_Definitions
+ * @{
+ */
+#define IS_RTC_YEAR(YEAR) ((YEAR) <= 99)
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Month_Date_Definitions
+ * @{
+ */
+
+/* Coded in BCD format */
+#define RTC_Month_January ((uint8_t)0x01)
+#define RTC_Month_February ((uint8_t)0x02)
+#define RTC_Month_March ((uint8_t)0x03)
+#define RTC_Month_April ((uint8_t)0x04)
+#define RTC_Month_May ((uint8_t)0x05)
+#define RTC_Month_June ((uint8_t)0x06)
+#define RTC_Month_July ((uint8_t)0x07)
+#define RTC_Month_August ((uint8_t)0x08)
+#define RTC_Month_September ((uint8_t)0x09)
+#define RTC_Month_October ((uint8_t)0x10)
+#define RTC_Month_November ((uint8_t)0x11)
+#define RTC_Month_December ((uint8_t)0x12)
+#define IS_RTC_MONTH(MONTH) (((MONTH) >= 1) && ((MONTH) <= 12))
+#define IS_RTC_DATE(DATE) (((DATE) >= 1) && ((DATE) <= 31))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_WeekDay_Definitions
+ * @{
+ */
+
+#define RTC_Weekday_Monday ((uint8_t)0x01)
+#define RTC_Weekday_Tuesday ((uint8_t)0x02)
+#define RTC_Weekday_Wednesday ((uint8_t)0x03)
+#define RTC_Weekday_Thursday ((uint8_t)0x04)
+#define RTC_Weekday_Friday ((uint8_t)0x05)
+#define RTC_Weekday_Saturday ((uint8_t)0x06)
+#define RTC_Weekday_Sunday ((uint8_t)0x07)
+#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
+ ((WEEKDAY) == RTC_Weekday_Tuesday) || \
+ ((WEEKDAY) == RTC_Weekday_Wednesday) || \
+ ((WEEKDAY) == RTC_Weekday_Thursday) || \
+ ((WEEKDAY) == RTC_Weekday_Friday) || \
+ ((WEEKDAY) == RTC_Weekday_Saturday) || \
+ ((WEEKDAY) == RTC_Weekday_Sunday))
+/**
+ * @}
+ */
+
+
+/** @defgroup RTC_Alarm_Definitions
+ * @{
+ */
+#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0) && ((DATE) <= 31))
+#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
+ ((WEEKDAY) == RTC_Weekday_Tuesday) || \
+ ((WEEKDAY) == RTC_Weekday_Wednesday) || \
+ ((WEEKDAY) == RTC_Weekday_Thursday) || \
+ ((WEEKDAY) == RTC_Weekday_Friday) || \
+ ((WEEKDAY) == RTC_Weekday_Saturday) || \
+ ((WEEKDAY) == RTC_Weekday_Sunday))
+
+/**
+ * @}
+ */
+
+
+/** @defgroup RTC_AlarmDateWeekDay_Definitions
+ * @{
+ */
+#define RTC_AlarmDateWeekDaySel_Date ((uint32_t)0x00000000)
+#define RTC_AlarmDateWeekDaySel_WeekDay ((uint32_t)0x40000000)
+
+#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_AlarmDateWeekDaySel_Date) || \
+ ((SEL) == RTC_AlarmDateWeekDaySel_WeekDay))
+
+/**
+ * @}
+ */
+
+
+/** @defgroup RTC_AlarmMask_Definitions
+ * @{
+ */
+#define RTC_AlarmMask_None ((uint32_t)0x00000000)
+#define RTC_AlarmMask_DateWeekDay ((uint32_t)0x80000000)
+#define RTC_AlarmMask_Hours ((uint32_t)0x00800000)
+#define RTC_AlarmMask_Minutes ((uint32_t)0x00008000)
+#define RTC_AlarmMask_Seconds ((uint32_t)0x00000080)
+#define RTC_AlarmMask_All ((uint32_t)0x80808080)
+#define IS_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET)
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Alarms_Definitions
+ * @{
+ */
+#define RTC_Alarm_A ((uint32_t)0x00000100)
+#define RTC_Alarm_B ((uint32_t)0x00000200)
+#define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_Alarm_A) || ((ALARM) == RTC_Alarm_B))
+#define IS_RTC_CMD_ALARM(ALARM) (((ALARM) & (RTC_Alarm_A | RTC_Alarm_B)) != (uint32_t)RESET)
+
+/**
+ * @}
+ */
+
+ /** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions
+ * @{
+ */
+#define RTC_AlarmSubSecondMask_All ((uint32_t)0x00000000) /*!< All Alarm SS fields are masked.
+ There is no comparison on sub seconds
+ for Alarm */
+#define RTC_AlarmSubSecondMask_SS14_1 ((uint32_t)0x01000000) /*!< SS[14:1] are don't care in Alarm
+ comparison. Only SS[0] is compared. */
+#define RTC_AlarmSubSecondMask_SS14_2 ((uint32_t)0x02000000) /*!< SS[14:2] are don't care in Alarm
+ comparison. Only SS[1:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_3 ((uint32_t)0x03000000) /*!< SS[14:3] are don't care in Alarm
+ comparison. Only SS[2:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_4 ((uint32_t)0x04000000) /*!< SS[14:4] are don't care in Alarm
+ comparison. Only SS[3:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_5 ((uint32_t)0x05000000) /*!< SS[14:5] are don't care in Alarm
+ comparison. Only SS[4:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_6 ((uint32_t)0x06000000) /*!< SS[14:6] are don't care in Alarm
+ comparison. Only SS[5:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_7 ((uint32_t)0x07000000) /*!< SS[14:7] are don't care in Alarm
+ comparison. Only SS[6:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_8 ((uint32_t)0x08000000) /*!< SS[14:8] are don't care in Alarm
+ comparison. Only SS[7:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_9 ((uint32_t)0x09000000) /*!< SS[14:9] are don't care in Alarm
+ comparison. Only SS[8:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_10 ((uint32_t)0x0A000000) /*!< SS[14:10] are don't care in Alarm
+ comparison. Only SS[9:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_11 ((uint32_t)0x0B000000) /*!< SS[14:11] are don't care in Alarm
+ comparison. Only SS[10:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_12 ((uint32_t)0x0C000000) /*!< SS[14:12] are don't care in Alarm
+ comparison.Only SS[11:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14_13 ((uint32_t)0x0D000000) /*!< SS[14:13] are don't care in Alarm
+ comparison. Only SS[12:0] are compared */
+#define RTC_AlarmSubSecondMask_SS14 ((uint32_t)0x0E000000) /*!< SS[14] is don't care in Alarm
+ comparison.Only SS[13:0] are compared */
+#define RTC_AlarmSubSecondMask_None ((uint32_t)0x0F000000) /*!< SS[14:0] are compared and must match
+ to activate alarm. */
+#define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_AlarmSubSecondMask_All) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_1) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_2) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_3) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_4) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_5) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_6) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_7) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_8) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_9) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_10) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_11) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_12) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14_13) || \
+ ((MASK) == RTC_AlarmSubSecondMask_SS14) || \
+ ((MASK) == RTC_AlarmSubSecondMask_None))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Alarm_Sub_Seconds_Value
+ * @{
+ */
+
+#define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= 0x00007FFF)
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Wakeup_Timer_Definitions
+ * @{
+ */
+#define RTC_WakeUpClock_RTCCLK_Div16 ((uint32_t)0x00000000)
+#define RTC_WakeUpClock_RTCCLK_Div8 ((uint32_t)0x00000001)
+#define RTC_WakeUpClock_RTCCLK_Div4 ((uint32_t)0x00000002)
+#define RTC_WakeUpClock_RTCCLK_Div2 ((uint32_t)0x00000003)
+#define RTC_WakeUpClock_CK_SPRE_16bits ((uint32_t)0x00000004)
+#define RTC_WakeUpClock_CK_SPRE_17bits ((uint32_t)0x00000006)
+#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WakeUpClock_RTCCLK_Div16) || \
+ ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div8) || \
+ ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div4) || \
+ ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div2) || \
+ ((CLOCK) == RTC_WakeUpClock_CK_SPRE_16bits) || \
+ ((CLOCK) == RTC_WakeUpClock_CK_SPRE_17bits))
+#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF)
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Time_Stamp_Edges_definitions
+ * @{
+ */
+#define RTC_TimeStampEdge_Rising ((uint32_t)0x00000000)
+#define RTC_TimeStampEdge_Falling ((uint32_t)0x00000008)
+#define IS_RTC_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TimeStampEdge_Rising) || \
+ ((EDGE) == RTC_TimeStampEdge_Falling))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Output_selection_Definitions
+ * @{
+ */
+#define RTC_Output_Disable ((uint32_t)0x00000000)
+#define RTC_Output_AlarmA ((uint32_t)0x00200000)
+#define RTC_Output_AlarmB ((uint32_t)0x00400000)
+#define RTC_Output_WakeUp ((uint32_t)0x00600000)
+
+#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_Output_Disable) || \
+ ((OUTPUT) == RTC_Output_AlarmA) || \
+ ((OUTPUT) == RTC_Output_AlarmB) || \
+ ((OUTPUT) == RTC_Output_WakeUp))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Output_Polarity_Definitions
+ * @{
+ */
+#define RTC_OutputPolarity_High ((uint32_t)0x00000000)
+#define RTC_OutputPolarity_Low ((uint32_t)0x00100000)
+#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OutputPolarity_High) || \
+ ((POL) == RTC_OutputPolarity_Low))
+/**
+ * @}
+ */
+
+
+/** @defgroup RTC_Digital_Calibration_Definitions
+ * @{
+ */
+#define RTC_CalibSign_Positive ((uint32_t)0x00000000)
+#define RTC_CalibSign_Negative ((uint32_t)0x00000080)
+#define IS_RTC_CALIB_SIGN(SIGN) (((SIGN) == RTC_CalibSign_Positive) || \
+ ((SIGN) == RTC_CalibSign_Negative))
+#define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20)
+
+/**
+ * @}
+ */
+
+ /** @defgroup RTC_Calib_Output_selection_Definitions
+ * @{
+ */
+#define RTC_CalibOutput_512Hz ((uint32_t)0x00000000)
+#define RTC_CalibOutput_1Hz ((uint32_t)0x00080000)
+#define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CalibOutput_512Hz) || \
+ ((OUTPUT) == RTC_CalibOutput_1Hz))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Smooth_calib_period_Definitions
+ * @{
+ */
+#define RTC_SmoothCalibPeriod_32sec ((uint32_t)0x00000000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
+ period is 32s, else 2exp20 RTCCLK seconds */
+#define RTC_SmoothCalibPeriod_16sec ((uint32_t)0x00002000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
+ period is 16s, else 2exp19 RTCCLK seconds */
+#define RTC_SmoothCalibPeriod_8sec ((uint32_t)0x00004000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
+ period is 8s, else 2exp18 RTCCLK seconds */
+#define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SmoothCalibPeriod_32sec) || \
+ ((PERIOD) == RTC_SmoothCalibPeriod_16sec) || \
+ ((PERIOD) == RTC_SmoothCalibPeriod_8sec))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Smooth_calib_Plus_pulses_Definitions
+ * @{
+ */
+#define RTC_SmoothCalibPlusPulses_Set ((uint32_t)0x00008000) /*!< The number of RTCCLK pulses added
+ during a X -second window = Y - CALM[8:0].
+ with Y = 512, 256, 128 when X = 32, 16, 8 */
+#define RTC_SmoothCalibPlusPulses_Reset ((uint32_t)0x00000000) /*!< The number of RTCCLK pulses subbstited
+ during a 32-second window = CALM[8:0]. */
+#define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SmoothCalibPlusPulses_Set) || \
+ ((PLUS) == RTC_SmoothCalibPlusPulses_Reset))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Smooth_calib_Minus_pulses_Definitions
+ * @{
+ */
+#define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FF)
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_DayLightSaving_Definitions
+ * @{
+ */
+#define RTC_DayLightSaving_SUB1H ((uint32_t)0x00020000)
+#define RTC_DayLightSaving_ADD1H ((uint32_t)0x00010000)
+#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DayLightSaving_SUB1H) || \
+ ((SAVE) == RTC_DayLightSaving_ADD1H))
+
+#define RTC_StoreOperation_Reset ((uint32_t)0x00000000)
+#define RTC_StoreOperation_Set ((uint32_t)0x00040000)
+#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_StoreOperation_Reset) || \
+ ((OPERATION) == RTC_StoreOperation_Set))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Tamper_Trigger_Definitions
+ * @{
+ */
+#define RTC_TamperTrigger_RisingEdge ((uint32_t)0x00000000)
+#define RTC_TamperTrigger_FallingEdge ((uint32_t)0x00000001)
+#define RTC_TamperTrigger_LowLevel ((uint32_t)0x00000000)
+#define RTC_TamperTrigger_HighLevel ((uint32_t)0x00000001)
+#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TamperTrigger_RisingEdge) || \
+ ((TRIGGER) == RTC_TamperTrigger_FallingEdge) || \
+ ((TRIGGER) == RTC_TamperTrigger_LowLevel) || \
+ ((TRIGGER) == RTC_TamperTrigger_HighLevel))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Tamper_Filter_Definitions
+ * @{
+ */
+#define RTC_TamperFilter_Disable ((uint32_t)0x00000000) /*!< Tamper filter is disabled */
+
+#define RTC_TamperFilter_2Sample ((uint32_t)0x00000800) /*!< Tamper is activated after 2
+ consecutive samples at the active level */
+#define RTC_TamperFilter_4Sample ((uint32_t)0x00001000) /*!< Tamper is activated after 4
+ consecutive samples at the active level */
+#define RTC_TamperFilter_8Sample ((uint32_t)0x00001800) /*!< Tamper is activated after 8
+ consecutive samples at the active leve. */
+#define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TamperFilter_Disable) || \
+ ((FILTER) == RTC_TamperFilter_2Sample) || \
+ ((FILTER) == RTC_TamperFilter_4Sample) || \
+ ((FILTER) == RTC_TamperFilter_8Sample))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Tamper_Sampling_Frequencies_Definitions
+ * @{
+ */
+#define RTC_TamperSamplingFreq_RTCCLK_Div32768 ((uint32_t)0x00000000) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 32768 */
+#define RTC_TamperSamplingFreq_RTCCLK_Div16384 ((uint32_t)0x000000100) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 16384 */
+#define RTC_TamperSamplingFreq_RTCCLK_Div8192 ((uint32_t)0x00000200) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 8192 */
+#define RTC_TamperSamplingFreq_RTCCLK_Div4096 ((uint32_t)0x00000300) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 4096 */
+#define RTC_TamperSamplingFreq_RTCCLK_Div2048 ((uint32_t)0x00000400) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 2048 */
+#define RTC_TamperSamplingFreq_RTCCLK_Div1024 ((uint32_t)0x00000500) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 1024 */
+#define RTC_TamperSamplingFreq_RTCCLK_Div512 ((uint32_t)0x00000600) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 512 */
+#define RTC_TamperSamplingFreq_RTCCLK_Div256 ((uint32_t)0x00000700) /*!< Each of the tamper inputs are sampled
+ with a frequency = RTCCLK / 256 */
+#define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div32768) || \
+ ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div16384) || \
+ ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div8192) || \
+ ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div4096) || \
+ ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div2048) || \
+ ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div1024) || \
+ ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div512) || \
+ ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div256))
+
+/**
+ * @}
+ */
+
+ /** @defgroup RTC_Tamper_Pin_Precharge_Duration_Definitions
+ * @{
+ */
+#define RTC_TamperPrechargeDuration_1RTCCLK ((uint32_t)0x00000000) /*!< Tamper pins are pre-charged before
+ sampling during 1 RTCCLK cycle */
+#define RTC_TamperPrechargeDuration_2RTCCLK ((uint32_t)0x00002000) /*!< Tamper pins are pre-charged before
+ sampling during 2 RTCCLK cycles */
+#define RTC_TamperPrechargeDuration_4RTCCLK ((uint32_t)0x00004000) /*!< Tamper pins are pre-charged before
+ sampling during 4 RTCCLK cycles */
+#define RTC_TamperPrechargeDuration_8RTCCLK ((uint32_t)0x00006000) /*!< Tamper pins are pre-charged before
+ sampling during 8 RTCCLK cycles */
+
+#define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TamperPrechargeDuration_1RTCCLK) || \
+ ((DURATION) == RTC_TamperPrechargeDuration_2RTCCLK) || \
+ ((DURATION) == RTC_TamperPrechargeDuration_4RTCCLK) || \
+ ((DURATION) == RTC_TamperPrechargeDuration_8RTCCLK))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Tamper_Pins_Definitions
+ * @{
+ */
+#define RTC_Tamper_1 RTC_TAFCR_TAMP1E
+#define IS_RTC_TAMPER(TAMPER) (((TAMPER) == RTC_Tamper_1))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Tamper_Pin_Selection
+ * @{
+ */
+#define RTC_TamperPin_PC13 ((uint32_t)0x00000000)
+#define RTC_TamperPin_PI8 ((uint32_t)0x00010000)
+#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TamperPin_PC13) || \
+ ((PIN) == RTC_TamperPin_PI8))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_TimeStamp_Pin_Selection
+ * @{
+ */
+#define RTC_TimeStampPin_PC13 ((uint32_t)0x00000000)
+#define RTC_TimeStampPin_PI8 ((uint32_t)0x00020000)
+#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TimeStampPin_PC13) || \
+ ((PIN) == RTC_TimeStampPin_PI8))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Output_Type_ALARM_OUT
+ * @{
+ */
+#define RTC_OutputType_OpenDrain ((uint32_t)0x00000000)
+#define RTC_OutputType_PushPull ((uint32_t)0x00040000)
+#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OutputType_OpenDrain) || \
+ ((TYPE) == RTC_OutputType_PushPull))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Add_1_Second_Parameter_Definitions
+ * @{
+ */
+#define RTC_ShiftAdd1S_Reset ((uint32_t)0x00000000)
+#define RTC_ShiftAdd1S_Set ((uint32_t)0x80000000)
+#define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_ShiftAdd1S_Reset) || \
+ ((SEL) == RTC_ShiftAdd1S_Set))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Substract_Fraction_Of_Second_Value
+ * @{
+ */
+#define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFF)
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Backup_Registers_Definitions
+ * @{
+ */
+
+#define RTC_BKP_DR0 ((uint32_t)0x00000000)
+#define RTC_BKP_DR1 ((uint32_t)0x00000001)
+#define RTC_BKP_DR2 ((uint32_t)0x00000002)
+#define RTC_BKP_DR3 ((uint32_t)0x00000003)
+#define RTC_BKP_DR4 ((uint32_t)0x00000004)
+#define RTC_BKP_DR5 ((uint32_t)0x00000005)
+#define RTC_BKP_DR6 ((uint32_t)0x00000006)
+#define RTC_BKP_DR7 ((uint32_t)0x00000007)
+#define RTC_BKP_DR8 ((uint32_t)0x00000008)
+#define RTC_BKP_DR9 ((uint32_t)0x00000009)
+#define RTC_BKP_DR10 ((uint32_t)0x0000000A)
+#define RTC_BKP_DR11 ((uint32_t)0x0000000B)
+#define RTC_BKP_DR12 ((uint32_t)0x0000000C)
+#define RTC_BKP_DR13 ((uint32_t)0x0000000D)
+#define RTC_BKP_DR14 ((uint32_t)0x0000000E)
+#define RTC_BKP_DR15 ((uint32_t)0x0000000F)
+#define RTC_BKP_DR16 ((uint32_t)0x00000010)
+#define RTC_BKP_DR17 ((uint32_t)0x00000011)
+#define RTC_BKP_DR18 ((uint32_t)0x00000012)
+#define RTC_BKP_DR19 ((uint32_t)0x00000013)
+#define IS_RTC_BKP(BKP) (((BKP) == RTC_BKP_DR0) || \
+ ((BKP) == RTC_BKP_DR1) || \
+ ((BKP) == RTC_BKP_DR2) || \
+ ((BKP) == RTC_BKP_DR3) || \
+ ((BKP) == RTC_BKP_DR4) || \
+ ((BKP) == RTC_BKP_DR5) || \
+ ((BKP) == RTC_BKP_DR6) || \
+ ((BKP) == RTC_BKP_DR7) || \
+ ((BKP) == RTC_BKP_DR8) || \
+ ((BKP) == RTC_BKP_DR9) || \
+ ((BKP) == RTC_BKP_DR10) || \
+ ((BKP) == RTC_BKP_DR11) || \
+ ((BKP) == RTC_BKP_DR12) || \
+ ((BKP) == RTC_BKP_DR13) || \
+ ((BKP) == RTC_BKP_DR14) || \
+ ((BKP) == RTC_BKP_DR15) || \
+ ((BKP) == RTC_BKP_DR16) || \
+ ((BKP) == RTC_BKP_DR17) || \
+ ((BKP) == RTC_BKP_DR18) || \
+ ((BKP) == RTC_BKP_DR19))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Input_parameter_format_definitions
+ * @{
+ */
+#define RTC_Format_BIN ((uint32_t)0x000000000)
+#define RTC_Format_BCD ((uint32_t)0x000000001)
+#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_Format_BIN) || ((FORMAT) == RTC_Format_BCD))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Flags_Definitions
+ * @{
+ */
+#define RTC_FLAG_RECALPF ((uint32_t)0x00010000)
+#define RTC_FLAG_TAMP1F ((uint32_t)0x00002000)
+#define RTC_FLAG_TSOVF ((uint32_t)0x00001000)
+#define RTC_FLAG_TSF ((uint32_t)0x00000800)
+#define RTC_FLAG_WUTF ((uint32_t)0x00000400)
+#define RTC_FLAG_ALRBF ((uint32_t)0x00000200)
+#define RTC_FLAG_ALRAF ((uint32_t)0x00000100)
+#define RTC_FLAG_INITF ((uint32_t)0x00000040)
+#define RTC_FLAG_RSF ((uint32_t)0x00000020)
+#define RTC_FLAG_INITS ((uint32_t)0x00000010)
+#define RTC_FLAG_SHPF ((uint32_t)0x00000008)
+#define RTC_FLAG_WUTWF ((uint32_t)0x00000004)
+#define RTC_FLAG_ALRBWF ((uint32_t)0x00000002)
+#define RTC_FLAG_ALRAWF ((uint32_t)0x00000001)
+#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_TSOVF) || ((FLAG) == RTC_FLAG_TSF) || \
+ ((FLAG) == RTC_FLAG_WUTF) || ((FLAG) == RTC_FLAG_ALRBF) || \
+ ((FLAG) == RTC_FLAG_ALRAF) || ((FLAG) == RTC_FLAG_INITF) || \
+ ((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_WUTWF) || \
+ ((FLAG) == RTC_FLAG_ALRBWF) || ((FLAG) == RTC_FLAG_ALRAWF) || \
+ ((FLAG) == RTC_FLAG_TAMP1F) || ((FLAG) == RTC_FLAG_RECALPF) || \
+ ((FLAG) == RTC_FLAG_SHPF))
+#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF00DF) == (uint32_t)RESET))
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Interrupts_Definitions
+ * @{
+ */
+#define RTC_IT_TS ((uint32_t)0x00008000)
+#define RTC_IT_WUT ((uint32_t)0x00004000)
+#define RTC_IT_ALRB ((uint32_t)0x00002000)
+#define RTC_IT_ALRA ((uint32_t)0x00001000)
+#define RTC_IT_TAMP ((uint32_t)0x00000004) /* Used only to Enable the Tamper Interrupt */
+#define RTC_IT_TAMP1 ((uint32_t)0x00020000)
+
+#define IS_RTC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFF0FFB) == (uint32_t)RESET))
+#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_TS) || ((IT) == RTC_IT_WUT) || \
+ ((IT) == RTC_IT_ALRB) || ((IT) == RTC_IT_ALRA) || \
+ ((IT) == RTC_IT_TAMP1))
+#define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFD0FFF) == (uint32_t)RESET))
+
+/**
+ * @}
+ */
+
+/** @defgroup RTC_Legacy
+ * @{
+ */
+#define RTC_DigitalCalibConfig RTC_CoarseCalibConfig
+#define RTC_DigitalCalibCmd RTC_CoarseCalibCmd
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/* Function used to set the RTC configuration to the default reset state *****/
+ErrorStatus RTC_DeInit(void);
+
+/* Initialization and Configuration functions *********************************/
+ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct);
+void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct);
+void RTC_WriteProtectionCmd(FunctionalState NewState);
+ErrorStatus RTC_EnterInitMode(void);
+void RTC_ExitInitMode(void);
+ErrorStatus RTC_WaitForSynchro(void);
+ErrorStatus RTC_RefClockCmd(FunctionalState NewState);
+void RTC_BypassShadowCmd(FunctionalState NewState);
+
+/* Time and Date configuration functions **************************************/
+ErrorStatus RTC_SetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
+void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct);
+void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
+uint32_t RTC_GetSubSecond(void);
+ErrorStatus RTC_SetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
+void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct);
+void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
+
+/* Alarms (Alarm A and Alarm B) configuration functions **********************/
+void RTC_SetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
+void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct);
+void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
+ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState);
+void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondValue, uint32_t RTC_AlarmSubSecondMask);
+uint32_t RTC_GetAlarmSubSecond(uint32_t RTC_Alarm);
+
+/* WakeUp Timer configuration functions ***************************************/
+void RTC_WakeUpClockConfig(uint32_t RTC_WakeUpClock);
+void RTC_SetWakeUpCounter(uint32_t RTC_WakeUpCounter);
+uint32_t RTC_GetWakeUpCounter(void);
+ErrorStatus RTC_WakeUpCmd(FunctionalState NewState);
+
+/* Daylight Saving configuration functions ************************************/
+void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation);
+uint32_t RTC_GetStoreOperation(void);
+
+/* Output pin Configuration function ******************************************/
+void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity);
+
+/* Digital Calibration configuration functions *********************************/
+ErrorStatus RTC_CoarseCalibConfig(uint32_t RTC_CalibSign, uint32_t Value);
+ErrorStatus RTC_CoarseCalibCmd(FunctionalState NewState);
+void RTC_CalibOutputCmd(FunctionalState NewState);
+void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput);
+ErrorStatus RTC_SmoothCalibConfig(uint32_t RTC_SmoothCalibPeriod,
+ uint32_t RTC_SmoothCalibPlusPulses,
+ uint32_t RTC_SmouthCalibMinusPulsesValue);
+
+/* TimeStamp configuration functions ******************************************/
+void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState);
+void RTC_GetTimeStamp(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_StampTimeStruct,
+ RTC_DateTypeDef* RTC_StampDateStruct);
+uint32_t RTC_GetTimeStampSubSecond(void);
+
+/* Tampers configuration functions ********************************************/
+void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger);
+void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState);
+void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter);
+void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq);
+void RTC_TamperPinsPrechargeDuration(uint32_t RTC_TamperPrechargeDuration);
+void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState);
+void RTC_TamperPullUpCmd(FunctionalState NewState);
+
+/* Backup Data Registers configuration functions ******************************/
+void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data);
+uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR);
+
+/* RTC Tamper and TimeStamp Pins Selection and Output Type Config configuration
+ functions ******************************************************************/
+void RTC_TamperPinSelection(uint32_t RTC_TamperPin);
+void RTC_TimeStampPinSelection(uint32_t RTC_TimeStampPin);
+void RTC_OutputTypeConfig(uint32_t RTC_OutputType);
+
+/* RTC_Shift_control_synchonisation_functions *********************************/
+ErrorStatus RTC_SynchroShiftConfig(uint32_t RTC_ShiftAdd1S, uint32_t RTC_ShiftSubFS);
+
+/* Interrupts and flags management functions **********************************/
+void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState);
+FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG);
+void RTC_ClearFlag(uint32_t RTC_FLAG);
+ITStatus RTC_GetITStatus(uint32_t RTC_IT);
+void RTC_ClearITPendingBit(uint32_t RTC_IT);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__STM32F4xx_RTC_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/stm/main.c b/stm/main.c
index ffefbb64c742872f10232384f2476b4a0a817bfa..92a1a4c807ff0b146db1b6f7ca21c07a98e88eb8 100644
--- a/stm/main.c
+++ b/stm/main.c
@@ -3,6 +3,7 @@
#include <stm32f4xx_rcc.h>
#include <stm32f4xx_gpio.h>
#include <stm32f4xx_tim.h>
+#include <stm32f4xx_rtc.h>
#include <stm_misc.h>
#include "std.h"
@@ -462,6 +463,66 @@ py_obj_t pyb_hid_send_report(py_obj_t arg) {
return py_const_none;
}
+static void rtc_init(void) {
+ /* Enable the PWR clock */
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+
+ /* Allow access to RTC */
+ PWR_BackupAccessCmd(ENABLE);
+
+ /* Enable the LSE OSC */
+ RCC_LSEConfig(RCC_LSE_ON);
+
+ /* Wait till LSE is ready */
+ while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) {
+ }
+
+ /* Select the RTC Clock Source */
+ RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
+ /* ck_spre(1Hz) = RTCCLK(LSE) /(uwAsynchPrediv + 1)*(uwSynchPrediv + 1)*/
+ uint32_t uwSynchPrediv = 0xFF;
+ uint32_t uwAsynchPrediv = 0x7F;
+
+ /* Enable the RTC Clock */
+ RCC_RTCCLKCmd(ENABLE);
+
+ /* Wait for RTC APB registers synchronisation */
+ RTC_WaitForSynchro();
+
+ /* Configure the RTC data register and RTC prescaler */
+ RTC_InitTypeDef RTC_InitStructure;
+ RTC_InitStructure.RTC_AsynchPrediv = uwAsynchPrediv;
+ RTC_InitStructure.RTC_SynchPrediv = uwSynchPrediv;
+ RTC_InitStructure.RTC_HourFormat = RTC_HourFormat_24;
+ RTC_Init(&RTC_InitStructure);
+
+ // Set the date (BCD)
+ RTC_DateTypeDef RTC_DateStructure;
+ RTC_DateStructure.RTC_Year = 0x13;
+ RTC_DateStructure.RTC_Month = RTC_Month_October;
+ RTC_DateStructure.RTC_Date = 0x26;
+ RTC_DateStructure.RTC_WeekDay = RTC_Weekday_Saturday;
+ RTC_SetDate(RTC_Format_BCD, &RTC_DateStructure);
+
+ // Set the time (BCD)
+ RTC_TimeTypeDef RTC_TimeStructure;
+ RTC_TimeStructure.RTC_H12 = RTC_H12_AM;
+ RTC_TimeStructure.RTC_Hours = 0x01;
+ RTC_TimeStructure.RTC_Minutes = 0x53;
+ RTC_TimeStructure.RTC_Seconds = 0x00;
+ RTC_SetTime(RTC_Format_BCD, &RTC_TimeStructure);
+
+ // Indicator for the RTC configuration
+ //RTC_WriteBackupRegister(RTC_BKP_DR0, 0x32F2);
+}
+
+py_obj_t pyb_rtc_read(void) {
+ RTC_TimeTypeDef RTC_TimeStructure;
+ RTC_GetTime(RTC_Format_BIN, &RTC_TimeStructure);
+ printf("%02d:%02d:%02d\n", RTC_TimeStructure.RTC_Hours, RTC_TimeStructure.RTC_Minutes, RTC_TimeStructure.RTC_Seconds);
+ return py_const_none;
+}
+
int main(void) {
// TODO disable JTAG
@@ -489,6 +550,7 @@ int main(void) {
// basic sub-system init
sys_tick_init();
led_init();
+ rtc_init();
// turn on LED to indicate bootup
led_state(PYB_LED_G1, 1);
@@ -526,6 +588,7 @@ soft_reset:
rt_store_attr(m, qstr_from_str_static("servo"), rt_make_function_1(pyb_servo_set));
rt_store_attr(m, qstr_from_str_static("mma"), rt_make_function_0(pyb_mma_read));
rt_store_attr(m, qstr_from_str_static("hid"), rt_make_function_1(pyb_hid_send_report));
+ rt_store_attr(m, qstr_from_str_static("time"), rt_make_function_0(pyb_rtc_read));
rt_store_name(qstr_from_str_static("pyb"), m);
}