diff --git a/bootloader/build_image.sh b/bootloader/build_image.sh index 6d3e53ef85d247062c3b066c3b7170091c44a0e3..f7b87a7017892a63aa02d249ab1e34dc9b83cf50 100755 --- a/bootloader/build_image.sh +++ b/bootloader/build_image.sh @@ -1,6 +1,7 @@ #!/bin/sh set -e +echo "build image" $1 $2 $3 PYTHON="$1" ELF="$2" BIN="$3" diff --git a/bootloader/crc_patch.py b/bootloader/crc_patch.py index 21eeb57a5d1894bbdb4bcfc3bb0dbb889478de61..1be4b06b818094a8041160c9766bd1a1cb42ff41 100755 --- a/bootloader/crc_patch.py +++ b/bootloader/crc_patch.py @@ -6,12 +6,12 @@ crc = 0 data = open(sys.argv[1], 'rb').read() crc = crc16.crc16xmodem(data) -print(crc) +#print(crc) padded = data + bytes([crc >> 8, crc & 0xFF]) crc = 0 crc = crc16.crc16xmodem(padded) -print(crc) +#print(crc) open(sys.argv[1], 'wb').write(padded) diff --git a/bootloader/main.c b/bootloader/main.c index e62d88abbdc987c57c342545fba851c1445b13a3..f46a192aea328d5827efbbf75f233fb925891359 100644 --- a/bootloader/main.c +++ b/bootloader/main.c @@ -20,8 +20,11 @@ #define PARTITION_START (0x10000000 + 64 * 1024) -#define PARTITION_END (0x10000000 + 512 * 1024 - 1) /* TODO: check if 1 MB also works. Might have to enable the second bank */ -//#define PARTITION_END (0x10000000 + 1024 * 1024 - 1) +//#define PARTITION_END (0x10000000 + 512 * 1024 - 1) /* TODO: check if 1 MB also works. Might have to enable the second bank */ +#define PARTITION_END (0x10000000 + 1024 * 1024 - 1) + +//#define PARTITION_START (0x10080000) +//#define PARTITION_END (0x10000000 + 1024 * 1024 - 1) /* TODO: check if 1 MB also works. Might have to enable the second bank */ extern void run_usbmsc(void); @@ -188,13 +191,14 @@ int main(void) while(1); } + //MXC_FLC0->clkdiv = 96; + //MXC_FLC0->clkdiv = 96; if(mount()) { if(check_integrity()) { printf("Found valid application image\n"); if(is_update_needed()) { printf("Trying to update application from external flash\n"); - MXC_FLC0->clkdiv = 54; erase_partition(); flash_partition(); } else { diff --git a/epicardium/meson.build b/epicardium/meson.build index 767c9c4f9273203af677cc1dcc10775721510f60..03fa835bb7e8464ba3db291f5e21852364984381 100644 --- a/epicardium/meson.build +++ b/epicardium/meson.build @@ -60,6 +60,7 @@ custom_target( name + '.bin', build_by_default: true, output: name + '.bin', + #output: 'card10.bin', input: elf, command: [build_image, '@INPUT@', '@OUTPUT0@'], ) diff --git a/lib/card10/card10.c b/lib/card10/card10.c index da0a355c64363d47de8ddb05a5c1d5073d5972d1..df141a29db8b59b61403981f6f247293d08ee498 100644 --- a/lib/card10/card10.c +++ b/lib/card10/card10.c @@ -174,7 +174,7 @@ void card10_diag(void) void core1_start(void) { //MXC_GCR->gp0 = (uint32_t)(&__isr_vector_core1); - MXC_GCR->gp0 = 0x10040000; + MXC_GCR->gp0 = 0x10080000; MXC_GCR->perckcn1 &= ~MXC_F_GCR_PERCKCN1_CPU1; } diff --git a/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld b/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld index 3978179d2ab8db41f85f9fd5411a3f973d1ff863..7612a2589924a64d772572fc5ffcec3d7400f811 100644 --- a/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld +++ b/lib/sdk/Libraries/CMSIS/Device/Maxim/MAX32665/Source/GCC/max32665_core1.ld @@ -38,7 +38,7 @@ /* If used, they should be adjusted for the external Flash/RAM size */ MEMORY { SPIX (rx) : ORIGIN = 0x08000000, LENGTH = 128M - FLASH (rx) : ORIGIN = 0x10040000, LENGTH = 256k + FLASH (rx) : ORIGIN = 0x10080000, LENGTH = 512k SRAM (rwx) : ORIGIN = 0x20040000, LENGTH = 256k SPID (r) : ORIGIN = 0x80000000, LENGTH = 512M } diff --git a/lib/sdk/Libraries/MAX32665PeriphDriver/Source/flc.c b/lib/sdk/Libraries/MAX32665PeriphDriver/Source/flc.c index a595ad4bc7c21257b3351fd353526083071914e6..c99d954420077fb80911df84fd15872124d88a81 100644 --- a/lib/sdk/Libraries/MAX32665PeriphDriver/Source/flc.c +++ b/lib/sdk/Libraries/MAX32665PeriphDriver/Source/flc.c @@ -199,14 +199,18 @@ int FLC_PageErase(uint32_t address) uint32_t addr; mxc_flc_regs_t *flc = NULL; + printf("%p\n", address); // Get FLC Instance if ((err = SYS_FLC_GetByAddress(&flc, address)) != E_NO_ERROR) { + printf("A\n"); return err; } if ((err = SYS_FLC_GetPhysicalAddress(address, &addr)) < E_NO_ERROR) { + printf("B\n"); return err; } if ((err = prepare_flc(flc)) != E_NO_ERROR) { + printf("C\n"); return err; } @@ -227,6 +231,7 @@ int FLC_PageErase(uint32_t address) /* Check access violations */ if (flc->intr & MXC_F_FLC_INTR_AF) { flc->intr &= ~MXC_F_FLC_INTR_AF; + printf("D\n"); return E_BAD_STATE; } diff --git a/openocd/scripts/target/max32665.cfg b/openocd/scripts/target/max32665.cfg index 4ade1745d11bf2ccf2ab68c4c2dcb2c73adce10b..c79eb6fc324379bc6d824be4a49fa9b30c4bbf22 100644 --- a/openocd/scripts/target/max32665.cfg +++ b/openocd/scripts/target/max32665.cfg @@ -9,8 +9,10 @@ reset_config none # Set flash parameters set FLASH_BASE 0x10000000 -set FLASH_SIZE 0x300000 +set FLASH_BASE1 0x10080000 +set FLASH_SIZE 0x80000 set FLC_BASE 0x40029000 +set FLC_BASE1 0x40029400 set FLASH_SECTOR 0x2000 set FLASH_CLK 96 set FLASH_OPTIONS 0x01 diff --git a/openocd/scripts/target/max32xxx.cfg b/openocd/scripts/target/max32xxx.cfg index 9f5b2719e09ef166e07eeb99a0eb90c452ce98ed..21385f62c923829cc718c87a504780ccf12970a5 100644 --- a/openocd/scripts/target/max32xxx.cfg +++ b/openocd/scripts/target/max32xxx.cfg @@ -93,3 +93,8 @@ if { [info exists FLASH_OPTIONS] } { flash bank $_CHIPNAME.flash max32xxx $_FLASH_BASE $_FLASH_SIZE 0 0 $_CHIPNAME.cpu \ $_FLC_BASE $_FLASH_SECTOR $_FLASH_CLK $_FLASH_OPTIONS + +if { [info exists FLASH_BASE1] } { + flash bank $_CHIPNAME.flash1 max32xxx $FLASH_BASE1 $_FLASH_SIZE 0 0 $_CHIPNAME.cpu \ + $FLC_BASE1 $_FLASH_SECTOR $_FLASH_CLK $_FLASH_OPTIONS +} diff --git a/pycardium/meson.build b/pycardium/meson.build index 49d083c387b4db950df78a78d2360b26fb7f4b35..2c73fe86e4027c529709d333428202033cae6015 100644 --- a/pycardium/meson.build +++ b/pycardium/meson.build @@ -67,6 +67,15 @@ custom_target( name + '.bin', build_by_default: true, output: name + '.bin', - input: elf, + #input: [elf, 'epicardium/epicardium.bin'], + input: [elf], command: [build_image, '@INPUT@', '@OUTPUT0@'], ) + +#custom_target( +# name + '.b1n', +# build_by_default: true, +# output: name + '.b1n', +# input: bin, +# command: [build_image, '@INPUT@', '@OUTPUT0@'], +#)