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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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Registers, Bit Masks and Bit Positions for the I2C Peripheral Module. More...
Modules | |
| Register Offsets | |
| I2C Peripheral Register Offsets from the I2C Base Peripheral Address. | |
| I2C_CTRL | |
| Control Register0. | |
| I2C_STATUS | |
| Status Register. | |
| I2C_INT_FL0 | |
| Interrupt Status Register. | |
| I2C_INT_EN0 | |
| Interrupt Enable Register. | |
| I2C_INT_FL1 | |
| Interrupt Status Register 1. | |
| I2C_INT_EN1 | |
| Interrupt Staus Register 1. | |
| I2C_FIFO_LEN | |
| FIFO Configuration Register. | |
| I2C_RX_CTRL0 | |
| Receive Control Register 0. | |
| I2C_RX_CTRL1 | |
| Receive Control Register 1. | |
| I2C_TX_CTRL0 | |
| Transmit Control Register 0. | |
| I2C_TX_CTRL1 | |
| Transmit Control Register 1. | |
| I2C_FIFO | |
| Data Register. | |
| I2C_MASTER_CTRL | |
| Master Control Register. | |
| I2C_CLK_LO | |
| Clock Low Register. | |
| I2C_CLK_HI | |
| Clock high Register. | |
| I2C_HS_CLK | |
| HS-Mode Clock Control Register. | |
| I2C_TIMEOUT | |
| Timeout Register. | |
| I2C_DMA | |
| DMA Register. | |
| I2C_SLAVE_ADDR | |
| Slave Address Register. | |
Data Structures | |
| struct | mxc_i2c_regs_t |
| Structure type to access the I2C Registers. More... | |
Inter-Integrated Circuit.