MAX32665 SDK Documentation  0.2
Software Development Kit Overview and API Documentation
dma.h
1 
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37  * $Date: 2020-03-02 07:59:20 -0600 (Mon, 02 Mar 2020) $
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41 
42 #ifndef _DMA_H_
43 #define _DMA_H_
44 
45 /* **** Includes **** */
46 #include "mxc_config.h"
47 #include "dma_regs.h"
48 
49 #ifdef __cplusplus
50 extern "C" {
51 #endif
52 
59 /* **** Definitions **** */
60 
64 typedef enum {
70 
72 typedef enum {
114 } dma_reqsel_t;
115 
117 typedef enum {
123 
125 typedef enum {
134 } dma_timeout_t;
135 
137 typedef enum {
138  /* Using the '_V_' define instead of the '_S_' since these same values will be used to
139  specify the DSTWD also. The API functions will shift the value the correct amount
140  prior to writing the cfg register. */
144 } dma_width_t;
145 
147 #define DMA_FALSE 0
148 #define DMA_TRUE 1
150 /* **** Function Prototypes **** */
151 
157 int DMA_Init(void);
158 
159 
169 int DMA_AcquireChannel(void);
170 
179 int DMA_ReleaseChannel(int ch);
180 
202 int DMA_ConfigChannel(int ch,
203  dma_priority_t prio,
204  dma_reqsel_t reqsel, unsigned int reqwait_en,
205  dma_timeout_t tosel, dma_prescale_t pssel,
206  dma_width_t srcwd, unsigned int srcinc_en,
207  dma_width_t dstwd, unsigned int dstinc_en,
208  unsigned int burst_size, unsigned int chdis_inten,
209  unsigned int ctz_inten);
210 
226 int DMA_SetSrcDstCnt(int ch,
227  void *src_addr,
228  void *dst_addr,
229  unsigned int count);
230 
243 int DMA_SetReload(int ch,
244  void *src_addr_reload,
245  void *dst_addr_reload,
246  unsigned int count_reload);
247 
270 int DMA_SetCallback(int ch, void (*callback)(int, int));
271 
278 int DMA_EnableInterrupt(int ch);
279 
286 int DMA_DisableInterrupt(int ch);
287 
295 int DMA_GetFlags(int ch, unsigned int *fl);
296 
303 int DMA_ClearFlags(int ch);
304 
312 int DMA_Start(int ch);
313 
320 int DMA_Stop(int ch);
321 
330 
338 void DMA_Handler(int ch);
339 
341 #ifdef __cplusplus
342 }
343 #endif
344 
345 #endif /* _DMA_H_ */
I2C0 Receive DMA Request Selection.
Definition: dma.h:78
#define MXC_S_DMA_CFG_REQSEL_UART2RX
CFG_REQSEL_UART2RX Setting.
Definition: dma_regs.h:234
#define MXC_S_DMA_CFG_REQSEL_USBRXEP7
CFG_REQSEL_USBRXEP7 Setting.
Definition: dma_regs.h:250
Memory to Memory DMA Request Selection.
Definition: dma.h:73
#define MXC_S_DMA_CFG_REQSEL_USBTXEP5
CFG_REQSEL_USBTXEP5 Setting.
Definition: dma_regs.h:284
#define MXC_S_DMA_CFG_REQSEL_USBRXEP5
CFG_REQSEL_USBRXEP5 Setting.
Definition: dma_regs.h:246
SPI1 Receive DMA Request Selection.
Definition: dma.h:74
High Priority.
Definition: dma.h:65
#define MXC_S_DMA_CFG_REQSEL_SPI0TX
CFG_REQSEL_SPI0TX Setting.
Definition: dma_regs.h:274
#define MXC_V_DMA_CFG_SRCWD_WORD
CFG_SRCWD_WORD Value.
Definition: dma_regs.h:337
Prescaler disabled.
Definition: dma.h:118
USB Receive Endpoint 6 DMA Request Selection.
Definition: dma.h:89
#define MXC_S_DMA_CFG_REQSEL_MEMTOMEM
CFG_REQSEL_MEMTOMEM Setting.
Definition: dma_regs.h:216
#define MXC_S_DMA_CFG_PSSEL_DIS
CFG_PSSEL_DIS Setting.
Definition: dma_regs.h:323
USB Receive Endpoint 9 DMA Request Selection.
Definition: dma.h:92
int DMA_ReleaseChannel(int ch)
Release DMA channel.
SPI1 Transmit DMA Request Selection.
Definition: dma.h:95
UART 2 Transmit DMA Request Selection.
Definition: dma.h:101
#define MXC_S_DMA_CFG_REQSEL_I2C2RX
CFG_REQSEL_I2C2RX Setting.
Definition: dma_regs.h:232
int DMA_EnableInterrupt(int ch)
Enable channel interrupt.
Medium High Priority.
Definition: dma.h:66
USB TX Endpoint 2 DMA Request Selection.
Definition: dma.h:104
DMA timeout of 256 clocks.
Definition: dma.h:132
#define MXC_S_DMA_CFG_REQSEL_USBTXEP11
CFG_REQSEL_USBTXEP11 Setting.
Definition: dma_regs.h:296
int DMA_Stop(int ch)
Stop DMA transfer, irrespective of status (complete or in-progress)
#define MXC_S_DMA_CFG_TOSEL_TO4
CFG_TOSEL_TO4 Setting.
Definition: dma_regs.h:304
UART1 Receive DMA Request Selection.
Definition: dma.h:77
dma_reqsel_t
DMA request select.
Definition: dma.h:72
#define MXC_S_DMA_CFG_REQSEL_USBTXEP10
CFG_REQSEL_USBTXEP10 Setting.
Definition: dma_regs.h:294
#define MXC_S_DMA_CFG_REQSEL_I2C0RX
CFG_REQSEL_I2C0RX Setting.
Definition: dma_regs.h:226
Structure type to access the DMA Registers.
Definition: dma_regs.h:88
dma_prescale_t
Enumeration for the DMA prescaler.
Definition: dma.h:117
#define MXC_S_DMA_CFG_REQSEL_SPI0RX
CFG_REQSEL_SPI0RX Setting.
Definition: dma_regs.h:236
I2C1 Receive DMA Request Selection.
Definition: dma.h:79
#define MXC_S_DMA_CFG_REQSEL_UART0RX
CFG_REQSEL_UART0RX Setting.
Definition: dma_regs.h:222
#define MXC_S_DMA_CFG_REQSEL_USBRXEP2
CFG_REQSEL_USBRXEP2 Setting.
Definition: dma_regs.h:240
UART0 Transmit DMA Request Selection.
Definition: dma.h:97
SPI0S Transmit DMA Request Selection.
Definition: dma.h:102
#define MXC_S_DMA_CFG_REQSEL_SPI1RX
CFG_REQSEL_SPI1RX Setting.
Definition: dma_regs.h:218
USB Receive Endpoint 11 DMA Request Selection.
Definition: dma.h:94
#define MXC_S_DMA_CFG_TOSEL_TO32
CFG_TOSEL_TO32 Setting.
Definition: dma_regs.h:310
int DMA_AcquireChannel(void)
Request DMA channel.
USB TX Endpoint 4 DMA Request Selection.
Definition: dma.h:106
#define MXC_S_DMA_CFG_PRI_HIGH
CFG_PRI_HIGH Setting.
Definition: dma_regs.h:205
DMA transfer in 16-bit half-words.
Definition: dma.h:142
#define MXC_S_DMA_CFG_REQSEL_I2C1RX
CFG_REQSEL_I2C1RX Setting.
Definition: dma_regs.h:228
USB Receive Endpoint 8 DMA Request Selection.
Definition: dma.h:91
#define MXC_S_DMA_CFG_PSSEL_DIV64K
CFG_PSSEL_DIV64K Setting.
Definition: dma_regs.h:327
USB TX Endpoint 7 DMA Request Selection.
Definition: dma.h:109
dma_priority_t
Enumeration for the DMA Channel's priority level.
Definition: dma.h:64
#define MXC_S_DMA_CFG_REQSEL_USBTXEP1
CFG_REQSEL_USBTXEP1 Setting.
Definition: dma_regs.h:276
#define MXC_S_DMA_CFG_REQSEL_USBTXEP7
CFG_REQSEL_USBTXEP7 Setting.
Definition: dma_regs.h:288
USB TX Endpoint 10 DMA Request Selection.
Definition: dma.h:112
I2C1 Transmit DMA Request Selection.
Definition: dma.h:100
USB TX Endpoint 11 DMA Request Selection.
Definition: dma.h:113
USB TX Endpoint 1 DMA Request Selection.
Definition: dma.h:103
#define MXC_S_DMA_CFG_REQSEL_UART0TX
CFG_REQSEL_UART0TX Setting.
Definition: dma_regs.h:264
DMA timeout of 64 clocks.
Definition: dma.h:130
#define MXC_S_DMA_CFG_PSSEL_DIV16M
CFG_PSSEL_DIV16M Setting.
Definition: dma_regs.h:329
#define MXC_S_DMA_CFG_REQSEL_USBRXEP3
CFG_REQSEL_USBRXEP3 Setting.
Definition: dma_regs.h:242
DMA transfer in 32-bit words.
Definition: dma.h:143
#define MXC_S_DMA_CFG_REQSEL_SPI1TX
CFG_REQSEL_SPI1TX Setting.
Definition: dma_regs.h:260
dma_width_t
DMA transfer data width.
Definition: dma.h:137
USB Receive Endpoint 1 DMA Request Selection.
Definition: dma.h:84
#define MXC_S_DMA_CFG_REQSEL_SPI2RX
CFG_REQSEL_SPI2RX Setting.
Definition: dma_regs.h:220
#define MXC_S_DMA_CFG_REQSEL_UART1TX
CFG_REQSEL_UART1TX Setting.
Definition: dma_regs.h:266
USB Receive Endpoint 5 DMA Request Selection.
Definition: dma.h:88
#define MXC_S_DMA_CFG_TOSEL_TO16
CFG_TOSEL_TO16 Setting.
Definition: dma_regs.h:308
#define MXC_S_DMA_CFG_REQSEL_UART1RX
CFG_REQSEL_UART1RX Setting.
Definition: dma_regs.h:224
DMA timeout of 128 clocks.
Definition: dma.h:131
#define MXC_S_DMA_CFG_REQSEL_USBTXEP6
CFG_REQSEL_USBTXEP6 Setting.
Definition: dma_regs.h:286
#define MXC_S_DMA_CFG_REQSEL_USBTXEP9
CFG_REQSEL_USBTXEP9 Setting.
Definition: dma_regs.h:292
int DMA_GetFlags(int ch, unsigned int *fl)
Read channel interrupt flags.
Divide by 65,536.
Definition: dma.h:120
UART0 Receive DMA Request Selection.
Definition: dma.h:76
int DMA_DisableInterrupt(int ch)
Disable channel interrupt.
Divide by 256.
Definition: dma.h:119
USB TX Endpoint 9 DMA Request Selection.
Definition: dma.h:111
DMA timeout of 512 clocks.
Definition: dma.h:133
SPI2 Receive DMA Request Selection.
Definition: dma.h:75
#define MXC_S_DMA_CFG_TOSEL_TO8
CFG_TOSEL_TO8 Setting.
Definition: dma_regs.h:306
USB Receive Endpoint 4 DMA Request Selection.
Definition: dma.h:87
#define MXC_V_DMA_CFG_SRCWD_BYTE
CFG_SRCWD_BYTE Value.
Definition: dma_regs.h:333
DMA timeout of 8 clocks.
Definition: dma.h:127
#define MXC_S_DMA_CFG_REQSEL_USBTXEP4
CFG_REQSEL_USBTXEP4 Setting.
Definition: dma_regs.h:282
USB TX Endpoint 5 DMA Request Selection.
Definition: dma.h:107
mxc_dma_ch_regs_t * DMA_GetCHRegs(int ch)
Get a pointer to the DMA channel registers.
#define MXC_S_DMA_CFG_TOSEL_TO512
CFG_TOSEL_TO512 Setting.
Definition: dma_regs.h:318
#define MXC_S_DMA_CFG_PSSEL_DIV256
CFG_PSSEL_DIV256 Setting.
Definition: dma_regs.h:325
DMA timeout of 16 clocks.
Definition: dma.h:128
int DMA_SetSrcDstCnt(int ch, void *src_addr, void *dst_addr, unsigned int count)
Set channel source, destination, and count for transfer.
I2C2 Receive DMA Request Selection.
Definition: dma.h:81
Low Priority.
Definition: dma.h:68
DMA transfer in bytes.
Definition: dma.h:141
UART1 Transmit DMA Request Selection.
Definition: dma.h:98
USB TX Endpoint 6 DMA Request Selection.
Definition: dma.h:108
#define MXC_S_DMA_CFG_REQSEL_UART2TX
CFG_REQSEL_UART2TX Setting.
Definition: dma_regs.h:272
#define MXC_S_DMA_CFG_TOSEL_TO128
CFG_TOSEL_TO128 Setting.
Definition: dma_regs.h:314
#define MXC_S_DMA_CFG_REQSEL_I2C0TX
CFG_REQSEL_I2C0TX Setting.
Definition: dma_regs.h:268
#define MXC_S_DMA_CFG_PRI_MEDLOW
CFG_PRI_MEDLOW Setting.
Definition: dma_regs.h:209
dma_timeout_t
Enumeration for the DMA timeout value.
Definition: dma.h:125
USB TX Endpoint 3 DMA Request Selection.
Definition: dma.h:105
DMA timeout of 4 clocks.
Definition: dma.h:126
SPI2 Transmit DMA Request Selection.
Definition: dma.h:96
#define MXC_S_DMA_CFG_REQSEL_USBRXEP1
CFG_REQSEL_USBRXEP1 Setting.
Definition: dma_regs.h:238
USB TX Endpoint 8 DMA Request Selection.
Definition: dma.h:110
Medium Low Priority.
Definition: dma.h:67
#define MXC_S_DMA_CFG_REQSEL_I2C1TX
CFG_REQSEL_I2C1TX Setting.
Definition: dma_regs.h:270
#define MXC_S_DMA_CFG_REQSEL_USBRXEP11
CFG_REQSEL_USBRXEP11 Setting.
Definition: dma_regs.h:258
I2C0 Transmit DMA Request Selection.
Definition: dma.h:99
DMA timeout of 32 clocks.
Definition: dma.h:129
#define MXC_V_DMA_CFG_SRCWD_HALFWORD
CFG_SRCWD_HALFWORD Value.
Definition: dma_regs.h:335
USB Receive Endpoint 2 DMA Request Selection.
Definition: dma.h:85
#define MXC_S_DMA_CFG_REQSEL_USBTXEP8
CFG_REQSEL_USBTXEP8 Setting.
Definition: dma_regs.h:290
#define MXC_S_DMA_CFG_REQSEL_USBRXEP8
CFG_REQSEL_USBRXEP8 Setting.
Definition: dma_regs.h:252
#define MXC_S_DMA_CFG_TOSEL_TO256
CFG_TOSEL_TO256 Setting.
Definition: dma_regs.h:316
#define MXC_S_DMA_CFG_PRI_LOW
CFG_PRI_LOW Setting.
Definition: dma_regs.h:211
#define MXC_S_DMA_CFG_REQSEL_USBRXEP9
CFG_REQSEL_USBRXEP9 Setting.
Definition: dma_regs.h:254
int DMA_SetReload(int ch, void *src_addr_reload, void *dst_addr_reload, unsigned int count_reload)
Set channel reload values.
void DMA_Handler(int ch)
Interrupt handler function.
Divide by 16,777,216.
Definition: dma.h:121
UART2 Receive DMA Request Selection.
Definition: dma.h:82
ADC DMA Request Selection.
Definition: dma.h:80
int DMA_Start(int ch)
Start transfer.
#define MXC_S_DMA_CFG_REQSEL_USBTXEP2
CFG_REQSEL_USBTXEP2 Setting.
Definition: dma_regs.h:278
int DMA_Init(void)
Initialize DMA resources.
#define MXC_S_DMA_CFG_REQSEL_SPI2TX
CFG_REQSEL_SPI2TX Setting.
Definition: dma_regs.h:262
int DMA_SetCallback(int ch, void(*callback)(int, int))
Set channel interrupt callback.
#define MXC_S_DMA_CFG_TOSEL_TO64
CFG_TOSEL_TO64 Setting.
Definition: dma_regs.h:312
USB Receive Endpoint 7 DMA Request Selection.
Definition: dma.h:90
#define MXC_S_DMA_CFG_REQSEL_USBRXEP10
CFG_REQSEL_USBRXEP10 Setting.
Definition: dma_regs.h:256
#define MXC_S_DMA_CFG_REQSEL_USBTXEP3
CFG_REQSEL_USBTXEP3 Setting.
Definition: dma_regs.h:280
#define MXC_S_DMA_CFG_REQSEL_USBRXEP4
CFG_REQSEL_USBRXEP4 Setting.
Definition: dma_regs.h:244
#define MXC_S_DMA_CFG_REQSEL_USBRXEP6
CFG_REQSEL_USBRXEP6 Setting.
Definition: dma_regs.h:248
int DMA_ClearFlags(int ch)
Clear channel interrupt flags.
USB Receive Endpoint 10 DMA Request Selection.
Definition: dma.h:93
SPI0 Receive DMA Request Selection.
Definition: dma.h:83
USB Receive Endpoint 3 DMA Request Selection.
Definition: dma.h:86
int DMA_ConfigChannel(int ch, dma_priority_t prio, dma_reqsel_t reqsel, unsigned int reqwait_en, dma_timeout_t tosel, dma_prescale_t pssel, dma_width_t srcwd, unsigned int srcinc_en, dma_width_t dstwd, unsigned int dstinc_en, unsigned int burst_size, unsigned int chdis_inten, unsigned int ctz_inten)
Configure the DMA channel.
#define MXC_S_DMA_CFG_REQSEL_ADC
CFG_REQSEL_ADC Setting.
Definition: dma_regs.h:230
#define MXC_S_DMA_CFG_PRI_MEDHIGH
CFG_PRI_MEDHIGH Setting.
Definition: dma_regs.h:207