40 #ifndef _SPIXR_REGS_H_ 41 #define _SPIXR_REGS_H_ 50 #if defined (__ICCARM__) 51 #pragma system_include 54 #if defined (__CC_ARM) 65 #define __I volatile const 71 #define __R volatile const 91 __IO uint16_t data16[2];
92 __IO uint8_t data8[4];
99 __R uint32_t rsv_0x18;
116 #define MXC_R_SPIXR_DATA32 ((uint32_t)0x00000000UL) 117 #define MXC_R_SPIXR_DATA16 ((uint32_t)0x00000000UL) 118 #define MXC_R_SPIXR_DATA8 ((uint32_t)0x00000000UL) 119 #define MXC_R_SPIXR_CTRL1 ((uint32_t)0x00000004UL) 120 #define MXC_R_SPIXR_CTRL2 ((uint32_t)0x00000008UL) 121 #define MXC_R_SPIXR_CTRL3 ((uint32_t)0x0000000CUL) 122 #define MXC_R_SPIXR_CTRL4 ((uint32_t)0x00000010UL) 123 #define MXC_R_SPIXR_BRG_CTRL ((uint32_t)0x00000014UL) 124 #define MXC_R_SPIXR_DMA ((uint32_t)0x0000001CUL) 125 #define MXC_R_SPIXR_IRQ ((uint32_t)0x00000020UL) 126 #define MXC_R_SPIXR_IRQE ((uint32_t)0x00000024UL) 127 #define MXC_R_SPIXR_WAKE ((uint32_t)0x00000028UL) 128 #define MXC_R_SPIXR_WAKEE ((uint32_t)0x0000002CUL) 129 #define MXC_R_SPIXR_STAT ((uint32_t)0x00000030UL) 130 #define MXC_R_SPIXR_XMEM_CTRL ((uint32_t)0x00000034UL) 139 #define MXC_F_SPIXR_DATA32_DATA_POS 0 140 #define MXC_F_SPIXR_DATA32_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_SPIXR_DATA32_DATA_POS)) 150 #define MXC_F_SPIXR_DATA16_DATA_POS 0 151 #define MXC_F_SPIXR_DATA16_DATA ((uint16_t)(0xFFFFUL << MXC_F_SPIXR_DATA16_DATA_POS)) 161 #define MXC_F_SPIXR_DATA8_DATA_POS 0 162 #define MXC_F_SPIXR_DATA8_DATA ((uint8_t)(0xFFUL << MXC_F_SPIXR_DATA8_DATA_POS)) 172 #define MXC_F_SPIXR_CTRL1_SPIEN_POS 0 173 #define MXC_F_SPIXR_CTRL1_SPIEN ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_SPIEN_POS)) 175 #define MXC_F_SPIXR_CTRL1_MMEN_POS 1 176 #define MXC_F_SPIXR_CTRL1_MMEN ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_MMEN_POS)) 178 #define MXC_F_SPIXR_CTRL1_TIMER_POS 2 179 #define MXC_F_SPIXR_CTRL1_TIMER ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_TIMER_POS)) 181 #define MXC_F_SPIXR_CTRL1_FL_EN_POS 3 182 #define MXC_F_SPIXR_CTRL1_FL_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_FL_EN_POS)) 184 #define MXC_F_SPIXR_CTRL1_SSIO_POS 4 185 #define MXC_F_SPIXR_CTRL1_SSIO ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_SSIO_POS)) 187 #define MXC_F_SPIXR_CTRL1_TX_START_POS 5 188 #define MXC_F_SPIXR_CTRL1_TX_START ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_TX_START_POS)) 190 #define MXC_F_SPIXR_CTRL1_SS_CTRL_POS 8 191 #define MXC_F_SPIXR_CTRL1_SS_CTRL ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL1_SS_CTRL_POS)) 193 #define MXC_F_SPIXR_CTRL1_SS_POS 16 194 #define MXC_F_SPIXR_CTRL1_SS ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL1_SS_POS)) 195 #define MXC_V_SPIXR_CTRL1_SS_SS0 ((uint32_t)0x1UL) 196 #define MXC_S_SPIXR_CTRL1_SS_SS0 (MXC_V_SPIXR_CTRL1_SS_SS0 << MXC_F_SPIXR_CTRL1_SS_POS) 197 #define MXC_V_SPIXR_CTRL1_SS_SS1 ((uint32_t)0x2UL) 198 #define MXC_S_SPIXR_CTRL1_SS_SS1 (MXC_V_SPIXR_CTRL1_SS_SS1 << MXC_F_SPIXR_CTRL1_SS_POS) 199 #define MXC_V_SPIXR_CTRL1_SS_SS2 ((uint32_t)0x4UL) 200 #define MXC_S_SPIXR_CTRL1_SS_SS2 (MXC_V_SPIXR_CTRL1_SS_SS2 << MXC_F_SPIXR_CTRL1_SS_POS) 201 #define MXC_V_SPIXR_CTRL1_SS_SS3 ((uint32_t)0x8UL) 202 #define MXC_S_SPIXR_CTRL1_SS_SS3 (MXC_V_SPIXR_CTRL1_SS_SS3 << MXC_F_SPIXR_CTRL1_SS_POS) 203 #define MXC_V_SPIXR_CTRL1_SS_SS4 ((uint32_t)0x10UL) 204 #define MXC_S_SPIXR_CTRL1_SS_SS4 (MXC_V_SPIXR_CTRL1_SS_SS4 << MXC_F_SPIXR_CTRL1_SS_POS) 205 #define MXC_V_SPIXR_CTRL1_SS_SS5 ((uint32_t)0x20UL) 206 #define MXC_S_SPIXR_CTRL1_SS_SS5 (MXC_V_SPIXR_CTRL1_SS_SS5 << MXC_F_SPIXR_CTRL1_SS_POS) 207 #define MXC_V_SPIXR_CTRL1_SS_SS6 ((uint32_t)0x40UL) 208 #define MXC_S_SPIXR_CTRL1_SS_SS6 (MXC_V_SPIXR_CTRL1_SS_SS6 << MXC_F_SPIXR_CTRL1_SS_POS) 209 #define MXC_V_SPIXR_CTRL1_SS_SS7 ((uint32_t)0x80UL) 210 #define MXC_S_SPIXR_CTRL1_SS_SS7 (MXC_V_SPIXR_CTRL1_SS_SS7 << MXC_F_SPIXR_CTRL1_SS_POS) 220 #define MXC_F_SPIXR_CTRL2_TX_NUM_CHAR_POS 0 221 #define MXC_F_SPIXR_CTRL2_TX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPIXR_CTRL2_TX_NUM_CHAR_POS)) 223 #define MXC_F_SPIXR_CTRL2_RX_NUM_CHAR_POS 16 224 #define MXC_F_SPIXR_CTRL2_RX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPIXR_CTRL2_RX_NUM_CHAR_POS)) 234 #define MXC_F_SPIXR_CTRL3_CPHA_POS 0 235 #define MXC_F_SPIXR_CTRL3_CPHA ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_CPHA_POS)) 237 #define MXC_F_SPIXR_CTRL3_CPOL_POS 1 238 #define MXC_F_SPIXR_CTRL3_CPOL ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_CPOL_POS)) 240 #define MXC_F_SPIXR_CTRL3_SCLK_FB_INV_POS 4 241 #define MXC_F_SPIXR_CTRL3_SCLK_FB_INV ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_SCLK_FB_INV_POS)) 243 #define MXC_F_SPIXR_CTRL3_NUMBITS_POS 8 244 #define MXC_F_SPIXR_CTRL3_NUMBITS ((uint32_t)(0xFUL << MXC_F_SPIXR_CTRL3_NUMBITS_POS)) 245 #define MXC_V_SPIXR_CTRL3_NUMBITS_0 ((uint32_t)0x0UL) 246 #define MXC_S_SPIXR_CTRL3_NUMBITS_0 (MXC_V_SPIXR_CTRL3_NUMBITS_0 << MXC_F_SPIXR_CTRL3_NUMBITS_POS) 248 #define MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS 12 249 #define MXC_F_SPIXR_CTRL3_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS)) 250 #define MXC_V_SPIXR_CTRL3_DATA_WIDTH_MONO ((uint32_t)0x0UL) 251 #define MXC_S_SPIXR_CTRL3_DATA_WIDTH_MONO (MXC_V_SPIXR_CTRL3_DATA_WIDTH_MONO << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS) 252 #define MXC_V_SPIXR_CTRL3_DATA_WIDTH_DUAL ((uint32_t)0x1UL) 253 #define MXC_S_SPIXR_CTRL3_DATA_WIDTH_DUAL (MXC_V_SPIXR_CTRL3_DATA_WIDTH_DUAL << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS) 254 #define MXC_V_SPIXR_CTRL3_DATA_WIDTH_QUAD ((uint32_t)0x2UL) 255 #define MXC_S_SPIXR_CTRL3_DATA_WIDTH_QUAD (MXC_V_SPIXR_CTRL3_DATA_WIDTH_QUAD << MXC_F_SPIXR_CTRL3_DATA_WIDTH_POS) 257 #define MXC_F_SPIXR_CTRL3_THREE_WIRE_POS 15 258 #define MXC_F_SPIXR_CTRL3_THREE_WIRE ((uint32_t)(0x1UL << MXC_F_SPIXR_CTRL3_THREE_WIRE_POS)) 260 #define MXC_F_SPIXR_CTRL3_SSPOL_POS 16 261 #define MXC_F_SPIXR_CTRL3_SSPOL ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL3_SSPOL_POS)) 262 #define MXC_V_SPIXR_CTRL3_SSPOL_SS0_HIGH ((uint32_t)0x1UL) 263 #define MXC_S_SPIXR_CTRL3_SSPOL_SS0_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS0_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 264 #define MXC_V_SPIXR_CTRL3_SSPOL_SS1_HIGH ((uint32_t)0x2UL) 265 #define MXC_S_SPIXR_CTRL3_SSPOL_SS1_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS1_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 266 #define MXC_V_SPIXR_CTRL3_SSPOL_SS2_HIGH ((uint32_t)0x4UL) 267 #define MXC_S_SPIXR_CTRL3_SSPOL_SS2_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS2_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 268 #define MXC_V_SPIXR_CTRL3_SSPOL_SS3_HIGH ((uint32_t)0x8UL) 269 #define MXC_S_SPIXR_CTRL3_SSPOL_SS3_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS3_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 270 #define MXC_V_SPIXR_CTRL3_SSPOL_SS4_HIGH ((uint32_t)0x10UL) 271 #define MXC_S_SPIXR_CTRL3_SSPOL_SS4_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS4_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 272 #define MXC_V_SPIXR_CTRL3_SSPOL_SS5_HIGH ((uint32_t)0x20UL) 273 #define MXC_S_SPIXR_CTRL3_SSPOL_SS5_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS5_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 274 #define MXC_V_SPIXR_CTRL3_SSPOL_SS6_HIGH ((uint32_t)0x40UL) 275 #define MXC_S_SPIXR_CTRL3_SSPOL_SS6_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS6_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 276 #define MXC_V_SPIXR_CTRL3_SSPOL_SS7_HIGH ((uint32_t)0x80UL) 277 #define MXC_S_SPIXR_CTRL3_SSPOL_SS7_HIGH (MXC_V_SPIXR_CTRL3_SSPOL_SS7_HIGH << MXC_F_SPIXR_CTRL3_SSPOL_POS) 287 #define MXC_F_SPIXR_CTRL4_SSACT1_POS 0 288 #define MXC_F_SPIXR_CTRL4_SSACT1 ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL4_SSACT1_POS)) 289 #define MXC_V_SPIXR_CTRL4_SSACT1_256 ((uint32_t)0x0UL) 290 #define MXC_S_SPIXR_CTRL4_SSACT1_256 (MXC_V_SPIXR_CTRL4_SSACT1_256 << MXC_F_SPIXR_CTRL4_SSACT1_POS) 292 #define MXC_F_SPIXR_CTRL4_SSACT2_POS 8 293 #define MXC_F_SPIXR_CTRL4_SSACT2 ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL4_SSACT2_POS)) 294 #define MXC_V_SPIXR_CTRL4_SSACT2_256 ((uint32_t)0x0UL) 295 #define MXC_S_SPIXR_CTRL4_SSACT2_256 (MXC_V_SPIXR_CTRL4_SSACT2_256 << MXC_F_SPIXR_CTRL4_SSACT2_POS) 297 #define MXC_F_SPIXR_CTRL4_SSINACT_POS 16 298 #define MXC_F_SPIXR_CTRL4_SSINACT ((uint32_t)(0xFFUL << MXC_F_SPIXR_CTRL4_SSINACT_POS)) 299 #define MXC_V_SPIXR_CTRL4_SSINACT_256 ((uint32_t)0x0UL) 300 #define MXC_S_SPIXR_CTRL4_SSINACT_256 (MXC_V_SPIXR_CTRL4_SSINACT_256 << MXC_F_SPIXR_CTRL4_SSINACT_POS) 310 #define MXC_F_SPIXR_BRG_CTRL_LOW_POS 0 311 #define MXC_F_SPIXR_BRG_CTRL_LOW ((uint32_t)(0xFFUL << MXC_F_SPIXR_BRG_CTRL_LOW_POS)) 312 #define MXC_V_SPIXR_BRG_CTRL_LOW_DIS ((uint32_t)0x0UL) 313 #define MXC_S_SPIXR_BRG_CTRL_LOW_DIS (MXC_V_SPIXR_BRG_CTRL_LOW_DIS << MXC_F_SPIXR_BRG_CTRL_LOW_POS) 315 #define MXC_F_SPIXR_BRG_CTRL_HI_POS 8 316 #define MXC_F_SPIXR_BRG_CTRL_HI ((uint32_t)(0xFFUL << MXC_F_SPIXR_BRG_CTRL_HI_POS)) 317 #define MXC_V_SPIXR_BRG_CTRL_HI_DIS ((uint32_t)0x0UL) 318 #define MXC_S_SPIXR_BRG_CTRL_HI_DIS (MXC_V_SPIXR_BRG_CTRL_HI_DIS << MXC_F_SPIXR_BRG_CTRL_HI_POS) 320 #define MXC_F_SPIXR_BRG_CTRL_SCALE_POS 16 321 #define MXC_F_SPIXR_BRG_CTRL_SCALE ((uint32_t)(0xFUL << MXC_F_SPIXR_BRG_CTRL_SCALE_POS)) 331 #define MXC_F_SPIXR_DMA_TX_FIFO_LEVEL_POS 0 332 #define MXC_F_SPIXR_DMA_TX_FIFO_LEVEL ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_TX_FIFO_LEVEL_POS)) 334 #define MXC_F_SPIXR_DMA_TX_FIFO_EN_POS 6 335 #define MXC_F_SPIXR_DMA_TX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_FIFO_EN_POS)) 337 #define MXC_F_SPIXR_DMA_TX_FIFO_CLEAR_POS 7 338 #define MXC_F_SPIXR_DMA_TX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_FIFO_CLEAR_POS)) 340 #define MXC_F_SPIXR_DMA_TX_FIFO_CNT_POS 8 341 #define MXC_F_SPIXR_DMA_TX_FIFO_CNT ((uint32_t)(0x1FUL << MXC_F_SPIXR_DMA_TX_FIFO_CNT_POS)) 343 #define MXC_F_SPIXR_DMA_TX_DMA_EN_POS 15 344 #define MXC_F_SPIXR_DMA_TX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_DMA_EN_POS)) 346 #define MXC_F_SPIXR_DMA_RX_FIFO_LEVEL_POS 16 347 #define MXC_F_SPIXR_DMA_RX_FIFO_LEVEL ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_RX_FIFO_LEVEL_POS)) 349 #define MXC_F_SPIXR_DMA_RX_FIFO_EN_POS 22 350 #define MXC_F_SPIXR_DMA_RX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_FIFO_EN_POS)) 352 #define MXC_F_SPIXR_DMA_RX_FIFO_CLEAR_POS 23 353 #define MXC_F_SPIXR_DMA_RX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_FIFO_CLEAR_POS)) 355 #define MXC_F_SPIXR_DMA_RX_FIFO_CNT_POS 24 356 #define MXC_F_SPIXR_DMA_RX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_RX_FIFO_CNT_POS)) 358 #define MXC_F_SPIXR_DMA_RX_DMA_EN_POS 31 359 #define MXC_F_SPIXR_DMA_RX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_DMA_EN_POS)) 370 #define MXC_F_SPIXR_IRQ_TX_THRESH_POS 0 371 #define MXC_F_SPIXR_IRQ_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_THRESH_POS)) 373 #define MXC_F_SPIXR_IRQ_TX_EMPTY_POS 1 374 #define MXC_F_SPIXR_IRQ_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_EMPTY_POS)) 376 #define MXC_F_SPIXR_IRQ_RX_THRESH_POS 2 377 #define MXC_F_SPIXR_IRQ_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_THRESH_POS)) 379 #define MXC_F_SPIXR_IRQ_RX_FULL_POS 3 380 #define MXC_F_SPIXR_IRQ_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_FULL_POS)) 382 #define MXC_F_SPIXR_IRQ_SSA_POS 4 383 #define MXC_F_SPIXR_IRQ_SSA ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SSA_POS)) 385 #define MXC_F_SPIXR_IRQ_SSD_POS 5 386 #define MXC_F_SPIXR_IRQ_SSD ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_SSD_POS)) 388 #define MXC_F_SPIXR_IRQ_FAULT_POS 8 389 #define MXC_F_SPIXR_IRQ_FAULT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_FAULT_POS)) 391 #define MXC_F_SPIXR_IRQ_ABORT_POS 9 392 #define MXC_F_SPIXR_IRQ_ABORT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_ABORT_POS)) 394 #define MXC_F_SPIXR_IRQ_M_DONE_POS 11 395 #define MXC_F_SPIXR_IRQ_M_DONE ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_M_DONE_POS)) 397 #define MXC_F_SPIXR_IRQ_TX_OVR_POS 12 398 #define MXC_F_SPIXR_IRQ_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_OVR_POS)) 400 #define MXC_F_SPIXR_IRQ_TX_UND_POS 13 401 #define MXC_F_SPIXR_IRQ_TX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_TX_UND_POS)) 403 #define MXC_F_SPIXR_IRQ_RX_OVR_POS 14 404 #define MXC_F_SPIXR_IRQ_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_OVR_POS)) 406 #define MXC_F_SPIXR_IRQ_RX_UND_POS 15 407 #define MXC_F_SPIXR_IRQ_RX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQ_RX_UND_POS)) 417 #define MXC_F_SPIXR_IRQE_TX_THRESH_POS 0 418 #define MXC_F_SPIXR_IRQE_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_THRESH_POS)) 420 #define MXC_F_SPIXR_IRQE_TX_EMPTY_POS 1 421 #define MXC_F_SPIXR_IRQE_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_EMPTY_POS)) 423 #define MXC_F_SPIXR_IRQE_RX_THRESH_POS 2 424 #define MXC_F_SPIXR_IRQE_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_THRESH_POS)) 426 #define MXC_F_SPIXR_IRQE_RX_FULL_POS 3 427 #define MXC_F_SPIXR_IRQE_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_FULL_POS)) 429 #define MXC_F_SPIXR_IRQE_SSA_POS 4 430 #define MXC_F_SPIXR_IRQE_SSA ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SSA_POS)) 432 #define MXC_F_SPIXR_IRQE_SSD_POS 5 433 #define MXC_F_SPIXR_IRQE_SSD ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_SSD_POS)) 435 #define MXC_F_SPIXR_IRQE_FAULT_POS 8 436 #define MXC_F_SPIXR_IRQE_FAULT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_FAULT_POS)) 438 #define MXC_F_SPIXR_IRQE_ABORT_POS 9 439 #define MXC_F_SPIXR_IRQE_ABORT ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_ABORT_POS)) 441 #define MXC_F_SPIXR_IRQE_M_DONE_POS 11 442 #define MXC_F_SPIXR_IRQE_M_DONE ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_M_DONE_POS)) 444 #define MXC_F_SPIXR_IRQE_TX_OVR_POS 12 445 #define MXC_F_SPIXR_IRQE_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_OVR_POS)) 447 #define MXC_F_SPIXR_IRQE_TX_UND_POS 13 448 #define MXC_F_SPIXR_IRQE_TX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_TX_UND_POS)) 450 #define MXC_F_SPIXR_IRQE_RX_OVR_POS 14 451 #define MXC_F_SPIXR_IRQE_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_OVR_POS)) 453 #define MXC_F_SPIXR_IRQE_RX_UND_POS 15 454 #define MXC_F_SPIXR_IRQE_RX_UND ((uint32_t)(0x1UL << MXC_F_SPIXR_IRQE_RX_UND_POS)) 464 #define MXC_F_SPIXR_WAKE_TX_THRESH_POS 0 465 #define MXC_F_SPIXR_WAKE_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_TX_THRESH_POS)) 467 #define MXC_F_SPIXR_WAKE_TX_EMPTY_POS 1 468 #define MXC_F_SPIXR_WAKE_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_TX_EMPTY_POS)) 470 #define MXC_F_SPIXR_WAKE_RX_THRESH_POS 2 471 #define MXC_F_SPIXR_WAKE_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_RX_THRESH_POS)) 473 #define MXC_F_SPIXR_WAKE_RX_FULL_POS 3 474 #define MXC_F_SPIXR_WAKE_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKE_RX_FULL_POS)) 484 #define MXC_F_SPIXR_WAKEE_TX_THRESH_POS 0 485 #define MXC_F_SPIXR_WAKEE_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_TX_THRESH_POS)) 487 #define MXC_F_SPIXR_WAKEE_TX_EMPTY_POS 1 488 #define MXC_F_SPIXR_WAKEE_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_TX_EMPTY_POS)) 490 #define MXC_F_SPIXR_WAKEE_RX_THRESH_POS 2 491 #define MXC_F_SPIXR_WAKEE_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_RX_THRESH_POS)) 493 #define MXC_F_SPIXR_WAKEE_RX_FULL_POS 3 494 #define MXC_F_SPIXR_WAKEE_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPIXR_WAKEE_RX_FULL_POS)) 504 #define MXC_F_SPIXR_STAT_BUSY_POS 0 505 #define MXC_F_SPIXR_STAT_BUSY ((uint32_t)(0x1UL << MXC_F_SPIXR_STAT_BUSY_POS)) 515 #define MXC_F_SPIXR_XMEM_CTRL_RD_CMD_POS 0 516 #define MXC_F_SPIXR_XMEM_CTRL_RD_CMD ((uint32_t)(0xFFUL << MXC_F_SPIXR_XMEM_CTRL_RD_CMD_POS)) 518 #define MXC_F_SPIXR_XMEM_CTRL_WR_CMD_POS 8 519 #define MXC_F_SPIXR_XMEM_CTRL_WR_CMD ((uint32_t)(0xFFUL << MXC_F_SPIXR_XMEM_CTRL_WR_CMD_POS)) 521 #define MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK_POS 16 522 #define MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK ((uint32_t)(0xFFUL << MXC_F_SPIXR_XMEM_CTRL_DUMMY_CLK_POS)) 524 #define MXC_F_SPIXR_XMEM_CTRL_XMEM_EN_POS 31 525 #define MXC_F_SPIXR_XMEM_CTRL_XMEM_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_XMEM_CTRL_XMEM_EN_POS)) __IO uint32_t wake
0x28: SPIXR WAKE Register
Definition: spixr_regs.h:103
__IO uint32_t dma
0x1C: SPIXR DMA Register
Definition: spixr_regs.h:100
__IO uint32_t ctrl4
0x10: SPIXR CTRL4 Register
Definition: spixr_regs.h:97
__I uint32_t stat
0x30: SPIXR STAT Register
Definition: spixr_regs.h:105
__IO uint32_t irqe
0x24: SPIXR IRQE Register
Definition: spixr_regs.h:102
__IO uint32_t brg_ctrl
0x14: SPIXR BRG_CTRL Register
Definition: spixr_regs.h:98
__IO uint32_t ctrl3
0x0C: SPIXR CTRL3 Register
Definition: spixr_regs.h:96
__IO uint32_t data32
0x00: SPIXR DATA32 Register
Definition: spixr_regs.h:90
__IO uint32_t irq
0x20: SPIXR IRQ Register
Definition: spixr_regs.h:101
__IO uint32_t xmem_ctrl
0x34: SPIXR XMEM_CTRL Register
Definition: spixr_regs.h:106
__IO uint32_t ctrl1
0x04: SPIXR CTRL1 Register
Definition: spixr_regs.h:94
__IO uint32_t ctrl2
0x08: SPIXR CTRL2 Register
Definition: spixr_regs.h:95
Structure type to access the SPIXR Registers.
Definition: spixr_regs.h:88
__IO uint32_t wakee
0x2C: SPIXR WAKEE Register
Definition: spixr_regs.h:104