![]() |
MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
|
Low Power Peripheral Wakeup Status Register. More...
Macros | |
#define | MXC_F_PWRSEQ_LPPWST_USBLSWKST_POS 0 |
LPPWST_USBLSWKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_USBLSWKST ((uint32_t)(0x3UL << MXC_F_PWRSEQ_LPPWST_USBLSWKST_POS)) |
LPPWST_USBLSWKST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_USBVBUSWKST_POS 2 |
LPPWST_USBVBUSWKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_USBVBUSWKST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_USBVBUSWKST_POS)) |
LPPWST_USBVBUSWKST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_SDMAWKST_POS 3 |
LPPWST_SDMAWKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_SDMAWKST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_SDMAWKST_POS)) |
LPPWST_SDMAWKST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP0WKST_POS 4 |
LPPWST_AINCOMP0WKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP0WKST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP0WKST_POS)) |
LPPWST_AINCOMP0WKST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP1WKST_POS 5 |
LPPWST_AINCOMP1WKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP1WKST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP1WKST_POS)) |
LPPWST_AINCOMP1WKST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP2WKST_POS 6 |
LPPWST_AINCOMP2WKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP2WKST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP2WKST_POS)) |
LPPWST_AINCOMP2WKST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP3WKST_POS 7 |
LPPWST_AINCOMP3WKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP3WKST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP3WKST_POS)) |
LPPWST_AINCOMP3WKST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP0ST_POS 8 |
LPPWST_AINCOMP0ST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP0ST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP0ST_POS)) |
LPPWST_AINCOMP0ST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP1ST_POS 9 |
LPPWST_AINCOMP1ST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP1ST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP1ST_POS)) |
LPPWST_AINCOMP1ST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP2ST_POS 10 |
LPPWST_AINCOMP2ST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP2ST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP2ST_POS)) |
LPPWST_AINCOMP2ST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP3ST_POS 11 |
LPPWST_AINCOMP3ST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_AINCOMP3ST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_AINCOMP3ST_POS)) |
LPPWST_AINCOMP3ST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_BBMODEST_POS 16 |
LPPWST_BBMODEST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_BBMODEST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_BBMODEST_POS)) |
LPPWST_BBMODEST Mask. | |
#define | MXC_F_PWRSEQ_LPPWST_RSTWKST_POS 17 |
LPPWST_RSTWKST Position. | |
#define | MXC_F_PWRSEQ_LPPWST_RSTWKST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWST_RSTWKST_POS)) |
LPPWST_RSTWKST Mask. | |