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MAX32665 SDK Documentation
0.2
Software Development Kit Overview and API Documentation
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Modules | |
| DMA_Registers | |
| Registers, Bit Masks and Bit Positions for the DMA Peripheral Module. | |
Macros | |
| #define | DMA_FALSE 0 |
| Convenience defines for options. More... | |
| #define | DMA_TRUE 1 |
| Define for passing 1 to DMA functions. | |
Enumerations | |
| enum | dma_priority_t { DMA_PRIO_HIGH = MXC_S_DMA_CFG_PRI_HIGH, DMA_PRIO_MEDHIGH = MXC_S_DMA_CFG_PRI_MEDHIGH, DMA_PRIO_MEDLOW = MXC_S_DMA_CFG_PRI_MEDLOW, DMA_PRIO_LOW = MXC_S_DMA_CFG_PRI_LOW } |
| Enumeration for the DMA Channel's priority level. More... | |
| enum | dma_reqsel_t { DMA_REQSEL_MEMTOMEM = MXC_S_DMA_CFG_REQSEL_MEMTOMEM, DMA_REQSEL_SPI0RX = MXC_S_DMA_CFG_REQSEL_SPI0RX, DMA_REQSEL_SPI1RX = MXC_S_DMA_CFG_REQSEL_SPI1RX, DMA_REQSEL_SPI2RX = MXC_S_DMA_CFG_REQSEL_SPI2RX, DMA_REQSEL_UART0RX = MXC_S_DMA_CFG_REQSEL_UART0RX, DMA_REQSEL_UART1RX = MXC_S_DMA_CFG_REQSEL_UART1RX, DMA_REQSEL_I2C0RX = MXC_S_DMA_CFG_REQSEL_I2C0RX, DMA_REQSEL_I2C1RX = MXC_S_DMA_CFG_REQSEL_I2C1RX, DMA_REQSEL_ADC = MXC_S_DMA_CFG_REQSEL_ADC, DMA_REQSEL_UART2RX = MXC_S_DMA_CFG_REQSEL_UART2RX, DMA_REQSEL_SPI3RX = MXC_S_DMA_CFG_REQSEL_SPI3RX, DMA_REQSEL_SPI_MSS0RX = MXC_S_DMA_CFG_REQSEL_SPI_MSS0RX, DMA_REQSEL_USBRXEP1 = MXC_S_DMA_CFG_REQSEL_USBRXEP1, DMA_REQSEL_USBRXEP2 = MXC_S_DMA_CFG_REQSEL_USBRXEP2, DMA_REQSEL_USBRXEP3 = MXC_S_DMA_CFG_REQSEL_USBRXEP3, DMA_REQSEL_USBRXEP4 = MXC_S_DMA_CFG_REQSEL_USBRXEP4, DMA_REQSEL_USBRXEP5 = MXC_S_DMA_CFG_REQSEL_USBRXEP5, DMA_REQSEL_USBRXEP6 = MXC_S_DMA_CFG_REQSEL_USBRXEP6, DMA_REQSEL_USBRXEP7 = MXC_S_DMA_CFG_REQSEL_USBRXEP7, DMA_REQSEL_USBRXEP8 = MXC_S_DMA_CFG_REQSEL_USBRXEP8, DMA_REQSEL_USBRXEP9 = MXC_S_DMA_CFG_REQSEL_USBRXEP9, DMA_REQSEL_USBRXEP10 = MXC_S_DMA_CFG_REQSEL_USBRXEP10, DMA_REQSEL_USBRXEP11 = MXC_S_DMA_CFG_REQSEL_USBRXEP11, DMA_REQSEL_SPI0TX = MXC_S_DMA_CFG_REQSEL_SPI0TX, DMA_REQSEL_SPI1TX = MXC_S_DMA_CFG_REQSEL_SPI1TX, DMA_REQSEL_SPI2TX = MXC_S_DMA_CFG_REQSEL_SPI2TX, DMA_REQSEL_UART0TX = MXC_S_DMA_CFG_REQSEL_UART0TX, DMA_REQSEL_UART1TX = MXC_S_DMA_CFG_REQSEL_UART1TX, DMA_REQSEL_I2C0TX = MXC_S_DMA_CFG_REQSEL_I2C0TX, DMA_REQSEL_I2C1TX = MXC_S_DMA_CFG_REQSEL_I2C1TX, DMA_REQSEL_UART2TX = MXC_S_DMA_CFG_REQSEL_UART2TX, DMA_REQSEL_SPI3TX = MXC_S_DMA_CFG_REQSEL_SPI3TX, DMA_REQSEL_SPI_MSS0TX = MXC_S_DMA_CFG_REQSEL_SPI_MSS0TX, DMA_REQSEL_USBTXEP1 = MXC_S_DMA_CFG_REQSEL_USBTXEP1, DMA_REQSEL_USBTXEP2 = MXC_S_DMA_CFG_REQSEL_USBTXEP2, DMA_REQSEL_USBTXEP3 = MXC_S_DMA_CFG_REQSEL_USBTXEP3, DMA_REQSEL_USBTXEP4 = MXC_S_DMA_CFG_REQSEL_USBTXEP4, DMA_REQSEL_USBTXEP5 = MXC_S_DMA_CFG_REQSEL_USBTXEP5, DMA_REQSEL_USBTXEP6 = MXC_S_DMA_CFG_REQSEL_USBTXEP6, DMA_REQSEL_USBTXEP7 = MXC_S_DMA_CFG_REQSEL_USBTXEP7, DMA_REQSEL_USBTXEP8 = MXC_S_DMA_CFG_REQSEL_USBTXEP8, DMA_REQSEL_USBTXEP9 = MXC_S_DMA_CFG_REQSEL_USBTXEP9, DMA_REQSEL_USBTXEP10 = MXC_S_DMA_CFG_REQSEL_USBTXEP10, DMA_REQSEL_USBTXEP11 = MXC_S_DMA_CFG_REQSEL_USBTXEP11 } |
| DMA request select. More... | |
| enum | dma_prescale_t { DMA_PRESCALE_DISABLE = MXC_S_DMA_CFG_PSSEL_DIS, DMA_PRESCALE_DIV256 = MXC_S_DMA_CFG_PSSEL_DIV256, DMA_PRESCALE_DIV64K = MXC_S_DMA_CFG_PSSEL_DIV64K, DMA_PRESCALE_DIV16M = MXC_S_DMA_CFG_PSSEL_DIV16M } |
| Enumeration for the DMA prescaler. More... | |
| enum | dma_timeout_t { DMA_TIMEOUT_4_CLK = MXC_S_DMA_CFG_TOSEL_TO4, DMA_TIMEOUT_8_CLK = MXC_S_DMA_CFG_TOSEL_TO8, DMA_TIMEOUT_16_CLK = MXC_S_DMA_CFG_TOSEL_TO16, DMA_TIMEOUT_32_CLK = MXC_S_DMA_CFG_TOSEL_TO32, DMA_TIMEOUT_64_CLK = MXC_S_DMA_CFG_TOSEL_TO64, DMA_TIMEOUT_128_CLK = MXC_S_DMA_CFG_TOSEL_TO128, DMA_TIMEOUT_256_CLK = MXC_S_DMA_CFG_TOSEL_TO256, DMA_TIMEOUT_512_CLK = MXC_S_DMA_CFG_TOSEL_TO512 } |
| Enumeration for the DMA timeout value. More... | |
| enum | dma_width_t { DMA_WIDTH_BYTE = MXC_V_DMA_CFG_SRCWD_BYTE, DMA_WIDTH_HALFWORD = MXC_V_DMA_CFG_SRCWD_HALFWORD, DMA_WIDTH_WORD = MXC_V_DMA_CFG_SRCWD_WORD } |
| DMA transfer data width. More... | |
Functions | |
| int | DMA_Init (void) |
| Initialize DMA resources. More... | |
| int | DMA_AcquireChannel (void) |
| Request DMA channel. More... | |
| int | DMA_ReleaseChannel (int ch) |
| Release DMA channel. More... | |
| int | DMA_ConfigChannel (int ch, dma_priority_t prio, dma_reqsel_t reqsel, unsigned int reqwait_en, dma_timeout_t tosel, dma_prescale_t pssel, dma_width_t srcwd, unsigned int srcinc_en, dma_width_t dstwd, unsigned int dstinc_en, unsigned int burst_size, unsigned int chdis_inten, unsigned int ctz_inten) |
| Configure the DMA channel. More... | |
| int | DMA_SetSrcDstCnt (int ch, void *src_addr, void *dst_addr, unsigned int count) |
| Set channel source, destination, and count for transfer. More... | |
| int | DMA_SetReload (int ch, void *src_addr_reload, void *dst_addr_reload, unsigned int count_reload) |
| Set channel reload values. More... | |
| int | DMA_SetCallback (int ch, void(*callback)(int, int)) |
| Set channel interrupt callback. More... | |
| int | DMA_EnableInterrupt (int ch) |
| Enable channel interrupt. More... | |
| int | DMA_DisableInterrupt (int ch) |
| Disable channel interrupt. More... | |
| int | DMA_GetFlags (int ch, unsigned int *fl) |
| Read channel interrupt flags. More... | |
| int | DMA_ClearFlags (int ch) |
| Clear channel interrupt flags. More... | |
| int | DMA_Start (int ch) |
| Start transfer. More... | |
| int | DMA_Stop (int ch) |
| Stop DMA transfer, irrespective of status (complete or in-progress) More... | |
| mxc_dma_ch_regs_t * | DMA_GetCHRegs (int ch) |
| Get a pointer to the DMA channel registers. More... | |
| void | DMA_Handler (int ch) |
| Interrupt handler function. More... | |
| #define DMA_FALSE 0 |
Define for passing 0 to DMA functions
| enum dma_priority_t |
| enum dma_reqsel_t |
| enum dma_prescale_t |
| enum dma_timeout_t |
| enum dma_width_t |
| int DMA_Init | ( | void | ) |
This initialization is required before using the DMA driver functions.
| int DMA_AcquireChannel | ( | void | ) |
Returns a handle to the first free DMA channel, which can be used via API calls or direct access to channel registers using the DMA_GetCHRegs(int ch) function.
| int DMA_ReleaseChannel | ( | int | ch | ) |
Stops any DMA operation on the channel and returns it to the pool of free channels.
| ch | channel handle to release |
| int DMA_ConfigChannel | ( | int | ch, |
| dma_priority_t | prio, | ||
| dma_reqsel_t | reqsel, | ||
| unsigned int | reqwait_en, | ||
| dma_timeout_t | tosel, | ||
| dma_prescale_t | pssel, | ||
| dma_width_t | srcwd, | ||
| unsigned int | srcinc_en, | ||
| dma_width_t | dstwd, | ||
| unsigned int | dstinc_en, | ||
| unsigned int | burst_size, | ||
| unsigned int | chdis_inten, | ||
| unsigned int | ctz_inten | ||
| ) |
Configures the channel, which was previously requested by DMA_Getchannel()
| ch | The channel to configure |
| prio | The channel's priority |
| reqsel | Select the DMA request line |
| reqwait_en | The enable delay before request |
| tosel | The transfer timer timeout select |
| pssel | The transfer timer prescale select |
| srcwd | The size of the read transactions |
| srcinc_en | Enable auto-increment source pointer |
| dstwd | The size of write transactions |
| dstinc_en | Enable auto-increment destination pointer |
| burst_size | The number of bytes transferred in one transaction |
| chdis_inten | The channel disable interrupt enable |
| ctz_inten | The count-to-zero interrupt enable |
| int DMA_SetSrcDstCnt | ( | int | ch, |
| void * | src_addr, | ||
| void * | dst_addr, | ||
| unsigned int | count | ||
| ) |
| ch | channel handle |
| src_addr | source address (*) |
| dst_addr | destination address (*) |
| count | number of bytes to transfer |
This function is used to set the source and destination addresses and the number of bytes to transfer using the channel, ch.
| int DMA_SetReload | ( | int | ch, |
| void * | src_addr_reload, | ||
| void * | dst_addr_reload, | ||
| unsigned int | count_reload | ||
| ) |
| ch | channel handle |
| src_addr_reload | source address |
| dst_addr_reload | destination address |
| count_reload | number of bytes to transfer |
This function will set the values which will be loaded after the channel count register reaches zero. After enabling, call with count_reload set to zero to disable reload.
| int DMA_SetCallback | ( | int | ch, |
| void(*)(int, int) | callback | ||
| ) |
| ch | channel handle |
| callback | Pointer to a function to call when the channel interrupt flag is set and interrupts are enabled or when DMA is shutdown by the driver. |
Configures the channel interrupt callback. The callback function is called for two conditions:
ch indicates the channel that generated the callback, reason is either E_NO_ERROR for a DMA interrupt or E_SHUTDOWN if the DMA is being shutdown.| int DMA_EnableInterrupt | ( | int | ch | ) |
| ch | channel handle |
| int DMA_DisableInterrupt | ( | int | ch | ) |
| ch | channel handle |
| int DMA_GetFlags | ( | int | ch, |
| unsigned int * | fl | ||
| ) |
| ch | channel handle |
| fl | flags to get |
| int DMA_ClearFlags | ( | int | ch | ) |
| ch | channel handle |
| int DMA_Start | ( | int | ch | ) |
| ch | channel handle |
Start the DMA channel transfer, assumes that DMA_SetSrcDstCnt() has been called beforehand
| int DMA_Stop | ( | int | ch | ) |
| ch | channel handle |
| mxc_dma_ch_regs_t* DMA_GetCHRegs | ( | int | ch | ) |
| ch | channel handle |
If direct access to DMA channel registers is required, this function can be used on a channel handle returned by DMA_AcquireChannel()
| void DMA_Handler | ( | int | ch | ) |
| ch | channel handle |
Call this function as the ISR for each DMA channel under driver control. Interrupt flags for channel ch will be automatically cleared before return.