firmware

This commit introduces a way to control core 1.  This is archieved by a
predefined API-Interrupt:  The reset interrupt.  When triggered, it will
bring the core back into its default state and wait for a new vector
address from Epicardium.  Once this vector address is transferred, it
will start the new payload.

This method only works as long as core 1 is responsive to the API
interrupts.  Cases where this might not be the case:

  - During times where core 1 has interrupts disabled
  - When in a higher priority exception handler
  - When core 1 has corrupted its IVT

Signed-off-by: Rahix <rahix@rahix.de>