hw-tests/harmonictest/MAX30003.h

+/*******************************************************************************
+ * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
+ * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Except as contained in this notice, the name of Maxim Integrated
+ * Products, Inc. shall not be used except as stated in the Maxim Integrated
+ * Products, Inc. Branding Policy.
+ *
+ * The mere transfer of this software does not imply any licenses
+ * of trade secrets, proprietary technology, copyrights, patents,
+ * trademarks, maskwork rights, or any other form of intellectual
+ * property whatsoever. Maxim Integrated Products, Inc. retains all
+ * ownership rights.
+ *******************************************************************************
+ */
+
+
+#ifndef _MAX30003_H_
+#define _MAX30003_H_
+
+
+    ///MAX30003 Registers
+    enum Registers_e
+    {
+        NO_OP          = 0x00,
+        STATUS         = 0x01,
+        EN_INT         = 0x02,
+        EN_INT2        = 0x03,
+        MNGR_INT       = 0x04,
+        MNGR_DYN       = 0x05,
+        SW_RST         = 0x08,
+        SYNCH          = 0x09,
+        FIFO_RST       = 0x0A,
+        INFO           = 0x0F,
+        CNFG_GEN       = 0x10,
+        CNFG_ALL       = 0x12,
+        CNFG_EMUX      = 0x14,
+        CNFG_ECG       = 0x15,
+        CNFG_RTOR1     = 0x1D,
+        CNFG_RTOR2     = 0x1E,
+        ECG_FIFO_BURST = 0x20,
+        ECG_FIFO       = 0x21,
+        RTOR           = 0x25,
+        NO_OP2         = 0x7F
+    };
+
+    ///Status register bits
+    union Status_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct
+        {
+            uint32_t loff_nl    : 1;
+            uint32_t loff_nh    : 1;
+            uint32_t loff_pl    : 1;
+            uint32_t loff_ph    : 1;
+            uint32_t reserved1  : 4;
+            uint32_t pllint     : 1;
+            uint32_t samp       : 1;
+            uint32_t rrint      : 1;
+            uint32_t lonint     : 1;
+            uint32_t reserved2  : 8;
+            uint32_t dcloffint : 1;
+            uint32_t fstint     : 1;
+            uint32_t eovf       : 1;
+            uint32_t eint       : 1;
+            uint32_t reserved3  : 8;
+        }bits;
+    };
+
+    ///Enable Interrupt registers bits
+    union EnableInterrupts_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t intb_type    : 2;
+            uint32_t reserved1    : 6;
+            uint32_t en_pllint    : 1;
+            uint32_t en_samp      : 1;
+            uint32_t en_rrint     : 1;
+            uint32_t en_loint     : 1;
+            uint32_t reserved2    : 8;
+            uint32_t en_dcloffint : 1;
+            uint32_t en_fstint    : 1;
+            uint32_t en_eovf      : 1;
+            uint32_t en_eint      : 1;
+            uint32_t reserved3    : 8;
+        }bits;
+    };
+
+    ///Manage Interrupt register bits
+    union ManageInterrupts_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t samp_it   : 4;
+            uint32_t clr_samp  : 1;
+            uint32_t reserved1 : 1;
+            uint32_t clr_rrint : 2;
+            uint32_t clr_fast  : 1;
+            uint32_t reserved2 : 12;
+            uint32_t efit      : 5;
+            uint32_t reserved3 : 8;
+        }bits;
+    };
+
+    ///Manage Dynamic Modes register bits
+    union ManageDynamicModes_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t reserved1 : 16;
+            uint32_t fast_th   : 6;
+            uint32_t fast      : 2;
+            uint32_t reserved2 : 8;
+        }bits;
+    };
+
+    ///General Configuration bits
+    union GeneralConfiguration_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t rbiasn     : 1;
+            uint32_t rbiasp     : 1;
+            uint32_t rbiasv     : 2;
+            uint32_t en_rbias   : 2;
+            uint32_t vth        : 2;
+            uint32_t imag       : 3;
+            uint32_t ipol       : 1;
+            uint32_t en_dcloff  : 2;
+            uint32_t reserved1  : 5;
+            uint32_t en_ecg     : 1;
+            uint32_t fmstr      : 2;
+            uint32_t en_ulp_lon : 2;
+            uint32_t reserved2  : 8;
+        }bits;
+    };
+
+    ///Cal Configuration bits
+    union CalConfiguration_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t thigh     : 11;
+            uint32_t fifty     : 1;
+            uint32_t fcal      : 3;
+            uint32_t reserved1 : 5;
+            uint32_t vmag      : 1;
+            uint32_t vmode     : 1;
+            uint32_t en_vcal   : 1;
+            uint32_t reserved2 : 9;
+
+        }bits;
+    };
+
+    ///Mux Configuration bits
+    union MuxConfiguration_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t reserved1 : 16;
+            uint32_t caln_sel  : 2;
+            uint32_t calp_sel  : 2;
+            uint32_t openn     : 1;
+            uint32_t openp     : 1;
+            uint32_t reserved2 : 1;
+            uint32_t pol       : 1;
+            uint32_t reserved3 : 8;
+        }bits;
+    };
+
+    ///ECG Configuration bits
+    union ECGConfiguration_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t reserved1 : 12;
+            uint32_t dlpf      : 2;
+            uint32_t dhpf      : 1;
+            uint32_t reserved2 : 1;
+            uint32_t gain      : 2;
+            uint32_t reserved3 : 4;
+            uint32_t rate      : 2;
+            uint32_t reserved4 : 8;
+        }bits;
+    };
+
+    ///RtoR1 Configuration bits
+    union RtoR1Configuration_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t reserved1 : 8;
+            uint32_t ptsf      : 4;
+            uint32_t pavg      : 2;
+            uint32_t reserved2 : 1;
+            uint32_t en_rtor   : 1;
+            uint32_t rgain     : 4;
+            uint32_t wndw      : 4;
+            uint32_t reserved3 : 8;
+        }bits;
+    };
+
+    ///RtoR2 Configuration bits
+    union RtoR2Configuration_u
+    {
+        ///Access all bits
+        uint32_t all;
+
+        ///Access individual bits
+        struct 
+        {
+            uint32_t reserved1 : 8;
+            uint32_t rhsf      : 3;
+            uint32_t reserved2 : 1;
+            uint32_t ravg      : 2;
+            uint32_t reserved3 : 2;
+            uint32_t hoff      : 6;
+            uint32_t reserved4 : 10;
+        }bits;
+    };
+
+#endif /* _MAX30003_H_ */
+

hw-tests/harmonictest/init.gdb

+source ../../init.gdb
+
+file ../../build/hw-tests/ecgtest/ecgtest.elf

hw-tests/harmonictest/main.c

+/*******************************************************************************
+ * License: TBD
+ ******************************************************************************/
+
+/***** Includes *****/
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+#include "mxc_config.h"
+#include "led.h"
+#include "board.h"
+#include "tmr_utils.h"
+#include "i2c.h"
+#include "rtc.h"
+#include "spi.h"
+#include "pb.h"
+#include "MAX30003.h"
+#include "max86150.h"
+#include "GUI_DEV/GUI_Paint.h"
+#include "pmic.h"
+#include "card10.h"
+#include <stdbool.h>
+#include <Heart.h>
+#include "leds.h"
+#include "adc.h"
+#include "MAX77650-Arduino-Library.h"
+
+/***** Definitions *****/
+
+/***** Globals *****/
+/***** Functions *****/
+int light_sensor_init()
+{
+	const sys_cfg_adc_t sys_adc_cfg =
+		NULL; /* No system specific configuration needed. */
+	if (ADC_Init(0x9, &sys_adc_cfg) != E_NO_ERROR) {
+		return -1;
+	}
+	GPIO_Config(&gpio_cfg_adc7);
+	return 0;
+}
+
+uint16_t read_light_sensor()
+{
+    uint16_t v;
+	ADC_StartConvert(ADC_CH_7, 0, 0);
+	ADC_GetData(&v);
+    return v;
+}
+
+
+// *****************************************************************************
+int main(void)
+{
+
+    card10_init();
+    card10_diag();
+    light_sensor_init();
+
+
+    max86150_begin();
+    max86150_setup(0x1F, 4, 3, 400, 411, 4096);
+
+    Paint_DrawImage(Heart, 0, 0, 160, 80);
+    LCD_Update();
+
+    for(int i=0; i<11; i++) {
+        leds_set_dim(i, 1);
+    }
+
+    for(int i=11; i<15; i++) {
+        leds_set(i, 255, 0, 0);
+    }
+
+    int count = 0;
+
+    while(1) {
+        if(max86150_check()>0) {
+            while(max86150_available()) {
+                max86150_getFIFORed();
+                max86150_getFIFOIR();
+                max86150_getFIFOECG();
+                max86150_nextSample();
+            }
+        }
+
+        for(int i=1; i<=4; i++) {
+            int leds[] = {0, 11, 14, 12, 13};
+            if(PB_Get(i)) {
+                printf("%d\n", i);
+                leds_set(leds[i], 0, 255, 0);
+            } else {
+                leds_set(leds[i], 255, 0, 0);
+            }
+        }
+        leds_update();
+
+        if(count++==100) {
+            count = 0;
+            uint16_t s = read_light_sensor();
+            for(int i=0; i<11; i++) {
+                if(i < s/3) {
+                    leds_set(i, 64, 0, 0);
+                } else {
+                    leds_set(i, 0, 64, 0);
+                }
+            }
+        }
+
+        TMR_Delay(MXC_TMR0, MSEC(10), 0);
+    }
+}

hw-tests/harmonictest/meson.build

+name = 'harmonictest'
+
+elf = executable(
+  name + '.elf',
+  'main.c',
+  dependencies: [libcard10, max32665_startup],
+  link_whole: [max32665_startup_lib, board_card10_lib],
+  link_args: [
+    '-Wl,-Map=' + meson.current_build_dir() + '/' + name + '.map',
+  ],
+)
+
+custom_target(
+  name + '.bin',
+  build_by_default: true,
+  output: name + '.bin',
+  input: elf,
+  command: [build_image, '@INPUT@', '@OUTPUT0@'],
+)

hw-tests/meson.build

@@ -4,6 +4,7 @@ subdir('bmatest/')
 subdir('bmetest/')
 subdir('dual-core/')
 subdir('ecgtest/')
+subdir('harmonictest/')
 # Disabled due to meson bug in older version
 # subdir('hello-freertos/')
 subdir('hello-world/')

lib/card10/card10.c

@@ -28,7 +28,7 @@
  * Current suspicion is that the SDK is buggy.
  *
  * At 12 MHz things seem stable*/
-#define SPI_SPEED (12 * 1000 * 1000) // Bit Rate. Display has 15 MHz limit
+#define SPI_SPEED (6 * 1000 * 1000) // Bit Rate. Display has 15 MHz limit
 
 const gpio_cfg_t bhi_interrupt_pin = {
 	PORT_0, PIN_13, GPIO_FUNC_IN, GPIO_PAD_PULL_UP

lib/card10/pb.c

@@ -124,6 +124,7 @@ int PB_Get(unsigned int pb)
             break;
         case 2:
             // TODO: read pmic button
+            return MAX77650_getDebounceStatusnEN0();
             break;
     }
     return 0;