Skip to content
Snippets Groups Projects
Select Git revision
  • 995f9cfdfcda96698c63de7a707981ef8bf2cecc
  • master default protected
2 results

main.c

  • Amir Gonnen's avatar
    995f9cfd
    esp32: Pin MicroPython tasks to a specific core. · 995f9cfd
    Amir Gonnen authored
    On this port the GIL is enabled and everything works under the assumption
    of the GIL, ie that a given task has exclusive access to the uPy state, and
    any ISRs interrupt the current task and therefore the ISR inherits
    exclusive access to the uPy state for the duration of its execution.
    
    If the MicroPython tasks are not pinned to a specific core then an ISR may
    be executed on a different core to the task, making it possible for the
    main task and an ISR to execute in parallel, breaking the assumption of the
    GIL.
    
    The easiest and safest fix for this is to pin all MicroPython related code
    to the same CPU core, as done by this patch.  Then any ISR that accesses
    MicroPython state must be registered from a MicroPython task, to ensure it
    is invoked on the same core.
    
    See issue #4895.
    995f9cfd
    History
    esp32: Pin MicroPython tasks to a specific core.
    Amir Gonnen authored
    On this port the GIL is enabled and everything works under the assumption
    of the GIL, ie that a given task has exclusive access to the uPy state, and
    any ISRs interrupt the current task and therefore the ISR inherits
    exclusive access to the uPy state for the duration of its execution.
    
    If the MicroPython tasks are not pinned to a specific core then an ISR may
    be executed on a different core to the task, making it possible for the
    main task and an ISR to execute in parallel, breaking the assumption of the
    GIL.
    
    The easiest and safest fix for this is to pin all MicroPython related code
    to the same CPU core, as done by this patch.  Then any ISR that accesses
    MicroPython state must be registered from a MicroPython task, to ensure it
    is invoked on the same core.
    
    See issue #4895.