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 <span id="projectnumber">0.2</span>
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<div class="title">RPU_UART1<div class="ingroups"><a class="el" href="group__rpu.html">Resource Protection Unit</a> » <a class="el" href="group__rpu__registers.html">RPU_Registers</a></div></div> </div>
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<p>UART1 Protection Register.
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Macros</h2></td></tr>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gaaf7f45ffaf6b32bcf63756fa7e9ca029">MXC_F_RPU_UART1_DMA0ACN_POS</a>   0</td></tr>
<tr class="memdesc:gaaf7f45ffaf6b32bcf63756fa7e9ca029"><td class="mdescLeft"> </td><td class="mdescRight">UART1_DMA0ACN Position. <br /></td></tr>
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<tr class="memitem:gab8f6dee986f45d564e532a8ad9ff46ea"><td class="memItemLeft" align="right" valign="top"><a id="gab8f6dee986f45d564e532a8ad9ff46ea"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gab8f6dee986f45d564e532a8ad9ff46ea">MXC_F_RPU_UART1_DMA0ACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_DMA0ACN_POS))</td></tr>
<tr class="memdesc:gab8f6dee986f45d564e532a8ad9ff46ea"><td class="mdescLeft"> </td><td class="mdescRight">UART1_DMA0ACN Mask. <br /></td></tr>
<tr class="separator:gab8f6dee986f45d564e532a8ad9ff46ea"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga983d82baec14eb71ec044517f48bf48a"><td class="memItemLeft" align="right" valign="top"><a id="ga983d82baec14eb71ec044517f48bf48a"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga983d82baec14eb71ec044517f48bf48a">MXC_F_RPU_UART1_DMA1ACN_POS</a>   1</td></tr>
<tr class="memdesc:ga983d82baec14eb71ec044517f48bf48a"><td class="mdescLeft"> </td><td class="mdescRight">UART1_DMA1ACN Position. <br /></td></tr>
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<tr class="memitem:ga5510d182bd23dd06c379b9c1a6faed0b"><td class="memItemLeft" align="right" valign="top"><a id="ga5510d182bd23dd06c379b9c1a6faed0b"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga5510d182bd23dd06c379b9c1a6faed0b">MXC_F_RPU_UART1_DMA1ACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_DMA1ACN_POS))</td></tr>
<tr class="memdesc:ga5510d182bd23dd06c379b9c1a6faed0b"><td class="mdescLeft"> </td><td class="mdescRight">UART1_DMA1ACN Mask. <br /></td></tr>
<tr class="separator:ga5510d182bd23dd06c379b9c1a6faed0b"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga8e0305f6bf9d0965a62ac8ca6a5d867e"><td class="memItemLeft" align="right" valign="top"><a id="ga8e0305f6bf9d0965a62ac8ca6a5d867e"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga8e0305f6bf9d0965a62ac8ca6a5d867e">MXC_F_RPU_UART1_USBACN_POS</a>   2</td></tr>
<tr class="memdesc:ga8e0305f6bf9d0965a62ac8ca6a5d867e"><td class="mdescLeft"> </td><td class="mdescRight">UART1_USBACN Position. <br /></td></tr>
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<tr class="memitem:gae89423f07dd7ab2e234a0e9470d9a954"><td class="memItemLeft" align="right" valign="top"><a id="gae89423f07dd7ab2e234a0e9470d9a954"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gae89423f07dd7ab2e234a0e9470d9a954">MXC_F_RPU_UART1_USBACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_USBACN_POS))</td></tr>
<tr class="memdesc:gae89423f07dd7ab2e234a0e9470d9a954"><td class="mdescLeft"> </td><td class="mdescRight">UART1_USBACN Mask. <br /></td></tr>
<tr class="separator:gae89423f07dd7ab2e234a0e9470d9a954"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaa9dbf33fea2ff661315ee1c18aead88b"><td class="memItemLeft" align="right" valign="top"><a id="gaa9dbf33fea2ff661315ee1c18aead88b"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gaa9dbf33fea2ff661315ee1c18aead88b">MXC_F_RPU_UART1_SYS0ACN_POS</a>   3</td></tr>
<tr class="memdesc:gaa9dbf33fea2ff661315ee1c18aead88b"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SYS0ACN Position. <br /></td></tr>
<tr class="separator:gaa9dbf33fea2ff661315ee1c18aead88b"><td class="memSeparator" colspan="2"> </td></tr>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga4ec63d315e71cd78e5725034cd60e506">MXC_F_RPU_UART1_SYS0ACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_SYS0ACN_POS))</td></tr>
<tr class="memdesc:ga4ec63d315e71cd78e5725034cd60e506"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SYS0ACN Mask. <br /></td></tr>
<tr class="separator:ga4ec63d315e71cd78e5725034cd60e506"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga7d87b9929add9b3b823962040cbfc463"><td class="memItemLeft" align="right" valign="top"><a id="ga7d87b9929add9b3b823962040cbfc463"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga7d87b9929add9b3b823962040cbfc463">MXC_F_RPU_UART1_SYS1ACN_POS</a>   4</td></tr>
<tr class="memdesc:ga7d87b9929add9b3b823962040cbfc463"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SYS1ACN Position. <br /></td></tr>
<tr class="separator:ga7d87b9929add9b3b823962040cbfc463"><td class="memSeparator" colspan="2"> </td></tr>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gab29c0859582767a4ce4d5e2a21b53be8">MXC_F_RPU_UART1_SYS1ACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_SYS1ACN_POS))</td></tr>
<tr class="memdesc:gab29c0859582767a4ce4d5e2a21b53be8"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SYS1ACN Mask. <br /></td></tr>
<tr class="separator:gab29c0859582767a4ce4d5e2a21b53be8"><td class="memSeparator" colspan="2"> </td></tr>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga7d1cd1000b3c7a558b2c438126b14d35">MXC_F_RPU_UART1_SDMADACN_POS</a>   5</td></tr>
<tr class="memdesc:ga7d1cd1000b3c7a558b2c438126b14d35"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SDMADACN Position. <br /></td></tr>
<tr class="separator:ga7d1cd1000b3c7a558b2c438126b14d35"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaa40054936c85ab383e16c553ac69b671"><td class="memItemLeft" align="right" valign="top"><a id="gaa40054936c85ab383e16c553ac69b671"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gaa40054936c85ab383e16c553ac69b671">MXC_F_RPU_UART1_SDMADACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_SDMADACN_POS))</td></tr>
<tr class="memdesc:gaa40054936c85ab383e16c553ac69b671"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SDMADACN Mask. <br /></td></tr>
<tr class="separator:gaa40054936c85ab383e16c553ac69b671"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga534270a51f1c683816e22b9c9b8550c3"><td class="memItemLeft" align="right" valign="top"><a id="ga534270a51f1c683816e22b9c9b8550c3"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga534270a51f1c683816e22b9c9b8550c3">MXC_F_RPU_UART1_SDMAIACN_POS</a>   6</td></tr>
<tr class="memdesc:ga534270a51f1c683816e22b9c9b8550c3"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SDMAIACN Position. <br /></td></tr>
<tr class="separator:ga534270a51f1c683816e22b9c9b8550c3"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gae31eb68280ae161f9b3d359ed1d6c958"><td class="memItemLeft" align="right" valign="top"><a id="gae31eb68280ae161f9b3d359ed1d6c958"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gae31eb68280ae161f9b3d359ed1d6c958">MXC_F_RPU_UART1_SDMAIACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_SDMAIACN_POS))</td></tr>
<tr class="memdesc:gae31eb68280ae161f9b3d359ed1d6c958"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SDMAIACN Mask. <br /></td></tr>
<tr class="separator:gae31eb68280ae161f9b3d359ed1d6c958"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gabcd0d9555a00bc1eeacd730158d63ed6"><td class="memItemLeft" align="right" valign="top"><a id="gabcd0d9555a00bc1eeacd730158d63ed6"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#gabcd0d9555a00bc1eeacd730158d63ed6">MXC_F_RPU_UART1_CRYPTOACN_POS</a>   7</td></tr>
<tr class="memdesc:gabcd0d9555a00bc1eeacd730158d63ed6"><td class="mdescLeft"> </td><td class="mdescRight">UART1_CRYPTOACN Position. <br /></td></tr><tr class="separator:gabcd0d9555a00bc1eeacd730158d63ed6"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga44cdff4aaf5d09f8eba112d65fad5f82"><td class="memItemLeft" align="right" valign="top"><a id="ga44cdff4aaf5d09f8eba112d65fad5f82"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga44cdff4aaf5d09f8eba112d65fad5f82">MXC_F_RPU_UART1_CRYPTOACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_CRYPTOACN_POS))</td></tr>
<tr class="memdesc:ga44cdff4aaf5d09f8eba112d65fad5f82"><td class="mdescLeft"> </td><td class="mdescRight">UART1_CRYPTOACN Mask. <br /></td></tr>
<tr class="separator:ga44cdff4aaf5d09f8eba112d65fad5f82"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga34cf0f514b57fb2eca440ce077c62c24"><td class="memItemLeft" align="right" valign="top"><a id="ga34cf0f514b57fb2eca440ce077c62c24"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga34cf0f514b57fb2eca440ce077c62c24">MXC_F_RPU_UART1_SDIOACN_POS</a>   8</td></tr>
<tr class="memdesc:ga34cf0f514b57fb2eca440ce077c62c24"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SDIOACN Position. <br /></td></tr>
<tr class="separator:ga34cf0f514b57fb2eca440ce077c62c24"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga95c875794d87305bea54368f6e97dbb7"><td class="memItemLeft" align="right" valign="top"><a id="ga95c875794d87305bea54368f6e97dbb7"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__UART1.html#ga95c875794d87305bea54368f6e97dbb7">MXC_F_RPU_UART1_SDIOACN</a>   ((uint32_t)(0x1UL << MXC_F_RPU_UART1_SDIOACN_POS))</td></tr>
<tr class="memdesc:ga95c875794d87305bea54368f6e97dbb7"><td class="mdescLeft"> </td><td class="mdescRight">UART1_SDIOACN Mask. <br /></td></tr>
<tr class="separator:ga95c875794d87305bea54368f6e97dbb7"><td class="memSeparator" colspan="2"> </td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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