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    • schneider's avatar
      change(backlight): Keep PWM stable when changing PCLK · 47b02df1
      schneider authored
      Timer frequency is now held close to a value which can be achieved both
      with a 48 MHz PCLK (96 MHz system clock) and a 7.5 MHz PCLK (15 MHz
      system clock).
      
      If even lower PCLKs should be supported, the frequency of the timer has
      to be changed as well.
      47b02df1
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