fix(usb): Reset the watchdog while perfoming MSC operations
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Passed 00:01:48
| Stage: build Stage: test |
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The MSC interrupts can come in back to back, effectively blocking the FreeRTOS timer task which resets the watchdog. This simple fix simply resets the watchdog when performing an MSC read or write.
Closes #217 (closed)
Status | Pipeline | Created by | Stages | |
---|---|---|---|---|
Passed 00:01:48
| Stage: build Stage: test |
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