Select Git revision
group__RPU__SYSRAM6.html 26.49 KiB
<!-- HTML header for doxygen 1.8.11-->
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.13"/>
<title>MAX32665 SDK Documentation: RPU_SYSRAM6</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtreedata.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
$(document).ready(initResizable);
</script>
<script type="text/x-mathjax-config">
MathJax.Hub.Config({
extensions: ["tex2jax.js"],
jax: ["input/TeX","output/HTML-CSS"],
});
</script><script type="text/javascript" src="http://cdn.mathjax.org/mathjax/latest/MathJax.js"></script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
<tbody>
<tr style="height: 44px;">
<td id="projectlogo" style="vertical-align:middle"><img alt="Logo" style="width:144px;height:63px;" src="MI_Logo_Small_Pos_RGB_150dpi.png"/></td>
<td id="projectalign" style="padding-left: 0.5em;">
<div id="projectname">MAX32665 SDK Documentation
 <span id="projectnumber">0.2</span>
</div>
<div id="projectbrief">Software Development Kit Overview and API Documentation</div>
</td>
</tr>
</tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.13 -->
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
$(function() {
initMenu('',false,false,'search.php','Search');
});
</script>
<div id="main-nav"></div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
<div id="nav-tree">
<div id="nav-tree-contents">
<div id="nav-sync" class="sync"></div>
</div>
</div>
<div id="splitbar" style="-moz-user-select:none;"
class="ui-resizable-handle">
</div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('group__RPU__SYSRAM6.html','');});
</script>
<div id="doc-content">
<div class="header">
<div class="summary">
<a href="#define-members">Macros</a> </div>
<div class="headertitle">
<div class="title">RPU_SYSRAM6<div class="ingroups"><a class="el" href="group__rpu.html">Resource Protection Unit</a> » <a class="el" href="group__rpu__registers.html">RPU_Registers</a></div></div> </div>
</div><!--header-->
<div class="contents">
<p>SYSRAM6 Protection Register.
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga6a3920a966c5a2953217bfcb8442ea0c"><td class="memItemLeft" align="right" valign="top"><a id="ga6a3920a966c5a2953217bfcb8442ea0c"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga6a3920a966c5a2953217bfcb8442ea0c">MXC_F_RPU_SYSRAM6_DMA0ACNR_POS</a>   0</td></tr>
<tr class="memdesc:ga6a3920a966c5a2953217bfcb8442ea0c"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA0ACNR Position. <br /></td></tr>
<tr class="separator:ga6a3920a966c5a2953217bfcb8442ea0c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gacfa3cc83c7c7edb164bb92bbce0660ca"><td class="memItemLeft" align="right" valign="top"><a id="gacfa3cc83c7c7edb164bb92bbce0660ca"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gacfa3cc83c7c7edb164bb92bbce0660ca">MXC_F_RPU_SYSRAM6_DMA0ACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_DMA0ACNR_POS))</td></tr>
<tr class="memdesc:gacfa3cc83c7c7edb164bb92bbce0660ca"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA0ACNR Mask. <br /></td></tr>
<tr class="separator:gacfa3cc83c7c7edb164bb92bbce0660ca"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga13c6eb32a60849153a8780186b312ec4"><td class="memItemLeft" align="right" valign="top"><a id="ga13c6eb32a60849153a8780186b312ec4"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga13c6eb32a60849153a8780186b312ec4">MXC_F_RPU_SYSRAM6_DMA0ACNW_POS</a>   1</td></tr>
<tr class="memdesc:ga13c6eb32a60849153a8780186b312ec4"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA0ACNW Position. <br /></td></tr>
<tr class="separator:ga13c6eb32a60849153a8780186b312ec4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaf243ae313491830b7ae49c1aa45e267c"><td class="memItemLeft" align="right" valign="top"><a id="gaf243ae313491830b7ae49c1aa45e267c"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gaf243ae313491830b7ae49c1aa45e267c">MXC_F_RPU_SYSRAM6_DMA0ACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_DMA0ACNW_POS))</td></tr>
<tr class="memdesc:gaf243ae313491830b7ae49c1aa45e267c"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA0ACNW Mask. <br /></td></tr>
<tr class="separator:gaf243ae313491830b7ae49c1aa45e267c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gab0bc9e2bc9a72902f60638874176fef8"><td class="memItemLeft" align="right" valign="top"><a id="gab0bc9e2bc9a72902f60638874176fef8"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gab0bc9e2bc9a72902f60638874176fef8">MXC_F_RPU_SYSRAM6_DMA1ACNR_POS</a>   2</td></tr>
<tr class="memdesc:gab0bc9e2bc9a72902f60638874176fef8"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA1ACNR Position. <br /></td></tr>
<tr class="separator:gab0bc9e2bc9a72902f60638874176fef8"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga91432447e5d304186ad50e121dc50dd9"><td class="memItemLeft" align="right" valign="top"><a id="ga91432447e5d304186ad50e121dc50dd9"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga91432447e5d304186ad50e121dc50dd9">MXC_F_RPU_SYSRAM6_DMA1ACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_DMA1ACNR_POS))</td></tr>
<tr class="memdesc:ga91432447e5d304186ad50e121dc50dd9"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA1ACNR Mask. <br /></td></tr>
<tr class="separator:ga91432447e5d304186ad50e121dc50dd9"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaa357694675ab53231fddece06825d5f6"><td class="memItemLeft" align="right" valign="top"><a id="gaa357694675ab53231fddece06825d5f6"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gaa357694675ab53231fddece06825d5f6">MXC_F_RPU_SYSRAM6_DMA1ACNW_POS</a>   3</td></tr>
<tr class="memdesc:gaa357694675ab53231fddece06825d5f6"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA1ACNW Position. <br /></td></tr>
<tr class="separator:gaa357694675ab53231fddece06825d5f6"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga38b8133f97f6cdd267c767800f51a8b8"><td class="memItemLeft" align="right" valign="top"><a id="ga38b8133f97f6cdd267c767800f51a8b8"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga38b8133f97f6cdd267c767800f51a8b8">MXC_F_RPU_SYSRAM6_DMA1ACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_DMA1ACNW_POS))</td></tr>
<tr class="memdesc:ga38b8133f97f6cdd267c767800f51a8b8"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_DMA1ACNW Mask. <br /></td></tr>
<tr class="separator:ga38b8133f97f6cdd267c767800f51a8b8"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gae32064dfb32a8269130b2a2269695b92"><td class="memItemLeft" align="right" valign="top"><a id="gae32064dfb32a8269130b2a2269695b92"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gae32064dfb32a8269130b2a2269695b92">MXC_F_RPU_SYSRAM6_USBACNR_POS</a>   4</td></tr>
<tr class="memdesc:gae32064dfb32a8269130b2a2269695b92"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_USBACNR Position. <br /></td></tr>
<tr class="separator:gae32064dfb32a8269130b2a2269695b92"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga99c0e4857cdbe4cf14ee23d6133a5a1c"><td class="memItemLeft" align="right" valign="top"><a id="ga99c0e4857cdbe4cf14ee23d6133a5a1c"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga99c0e4857cdbe4cf14ee23d6133a5a1c">MXC_F_RPU_SYSRAM6_USBACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_USBACNR_POS))</td></tr>
<tr class="memdesc:ga99c0e4857cdbe4cf14ee23d6133a5a1c"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_USBACNR Mask. <br /></td></tr>
<tr class="separator:ga99c0e4857cdbe4cf14ee23d6133a5a1c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga739b13377e68f770517c981e55659b8b"><td class="memItemLeft" align="right" valign="top"><a id="ga739b13377e68f770517c981e55659b8b"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga739b13377e68f770517c981e55659b8b">MXC_F_RPU_SYSRAM6_USBACNW_POS</a>   5</td></tr>
<tr class="memdesc:ga739b13377e68f770517c981e55659b8b"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_USBACNW Position. <br /></td></tr>
<tr class="separator:ga739b13377e68f770517c981e55659b8b"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga01de80c6ed1d2b40beb4162320cd6143"><td class="memItemLeft" align="right" valign="top"><a id="ga01de80c6ed1d2b40beb4162320cd6143"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga01de80c6ed1d2b40beb4162320cd6143">MXC_F_RPU_SYSRAM6_USBACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_USBACNW_POS))</td></tr>
<tr class="memdesc:ga01de80c6ed1d2b40beb4162320cd6143"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_USBACNW Mask. <br /></td></tr>
<tr class="separator:ga01de80c6ed1d2b40beb4162320cd6143"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga0f37efb8e8e06a7e948b2c3a53ef34b4"><td class="memItemLeft" align="right" valign="top"><a id="ga0f37efb8e8e06a7e948b2c3a53ef34b4"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga0f37efb8e8e06a7e948b2c3a53ef34b4">MXC_F_RPU_SYSRAM6_SYS0ACNR_POS</a>   6</td></tr>
<tr class="memdesc:ga0f37efb8e8e06a7e948b2c3a53ef34b4"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS0ACNR Position. <br /></td></tr>
<tr class="separator:ga0f37efb8e8e06a7e948b2c3a53ef34b4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5461e61892a60fd7fa4c571800b049ca"><td class="memItemLeft" align="right" valign="top"><a id="ga5461e61892a60fd7fa4c571800b049ca"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga5461e61892a60fd7fa4c571800b049ca">MXC_F_RPU_SYSRAM6_SYS0ACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SYS0ACNR_POS))</td></tr>
<tr class="memdesc:ga5461e61892a60fd7fa4c571800b049ca"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS0ACNR Mask. <br /></td></tr>
<tr class="separator:ga5461e61892a60fd7fa4c571800b049ca"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga228be8cab4d3a6dcb9fe86b1d434968f"><td class="memItemLeft" align="right" valign="top"><a id="ga228be8cab4d3a6dcb9fe86b1d434968f"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga228be8cab4d3a6dcb9fe86b1d434968f">MXC_F_RPU_SYSRAM6_SYS0ACNW_POS</a>   7</td></tr>
<tr class="memdesc:ga228be8cab4d3a6dcb9fe86b1d434968f"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS0ACNW Position. <br /></td></tr>
<tr class="separator:ga228be8cab4d3a6dcb9fe86b1d434968f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gae66df934a07e57cbf70cc531703c25b4"><td class="memItemLeft" align="right" valign="top"><a id="gae66df934a07e57cbf70cc531703c25b4"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gae66df934a07e57cbf70cc531703c25b4">MXC_F_RPU_SYSRAM6_SYS0ACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SYS0ACNW_POS))</td></tr>
<tr class="memdesc:gae66df934a07e57cbf70cc531703c25b4"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS0ACNW Mask. <br /></td></tr>
<tr class="separator:gae66df934a07e57cbf70cc531703c25b4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga715460fbcc792b91d18950e700fbf11a"><td class="memItemLeft" align="right" valign="top"><a id="ga715460fbcc792b91d18950e700fbf11a"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga715460fbcc792b91d18950e700fbf11a">MXC_F_RPU_SYSRAM6_SYS1ACNR_POS</a>   8</td></tr>
<tr class="memdesc:ga715460fbcc792b91d18950e700fbf11a"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS1ACNR Position. <br /></td></tr>
<tr class="separator:ga715460fbcc792b91d18950e700fbf11a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gadc85b3ddbfc4f5e1e1946171a576f83b"><td class="memItemLeft" align="right" valign="top"><a id="gadc85b3ddbfc4f5e1e1946171a576f83b"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gadc85b3ddbfc4f5e1e1946171a576f83b">MXC_F_RPU_SYSRAM6_SYS1ACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SYS1ACNR_POS))</td></tr>
<tr class="memdesc:gadc85b3ddbfc4f5e1e1946171a576f83b"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS1ACNR Mask. <br /></td></tr>
<tr class="separator:gadc85b3ddbfc4f5e1e1946171a576f83b"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaaf02b543252d610baa104d97071dcdd6"><td class="memItemLeft" align="right" valign="top"><a id="gaaf02b543252d610baa104d97071dcdd6"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gaaf02b543252d610baa104d97071dcdd6">MXC_F_RPU_SYSRAM6_SYS1ACNW_POS</a>   9</td></tr>
<tr class="memdesc:gaaf02b543252d610baa104d97071dcdd6"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS1ACNW Position. <br /></td></tr>
<tr class="separator:gaaf02b543252d610baa104d97071dcdd6"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga6a73d941a5af145cde9145804eb8c59a"><td class="memItemLeft" align="right" valign="top"><a id="ga6a73d941a5af145cde9145804eb8c59a"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga6a73d941a5af145cde9145804eb8c59a">MXC_F_RPU_SYSRAM6_SYS1ACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SYS1ACNW_POS))</td></tr>
<tr class="memdesc:ga6a73d941a5af145cde9145804eb8c59a"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SYS1ACNW Mask. <br /></td></tr>
<tr class="separator:ga6a73d941a5af145cde9145804eb8c59a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga316b6cee212d67c26894ccb278cc2751"><td class="memItemLeft" align="right" valign="top"><a id="ga316b6cee212d67c26894ccb278cc2751"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga316b6cee212d67c26894ccb278cc2751">MXC_F_RPU_SYSRAM6_SDMADACNR_POS</a>   10</td></tr>
<tr class="memdesc:ga316b6cee212d67c26894ccb278cc2751"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMADACNR Position. <br /></td></tr>
<tr class="separator:ga316b6cee212d67c26894ccb278cc2751"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5af5059a070e46d3c34cc8c4bde35dcf"><td class="memItemLeft" align="right" valign="top"><a id="ga5af5059a070e46d3c34cc8c4bde35dcf"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga5af5059a070e46d3c34cc8c4bde35dcf">MXC_F_RPU_SYSRAM6_SDMADACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SDMADACNR_POS))</td></tr>
<tr class="memdesc:ga5af5059a070e46d3c34cc8c4bde35dcf"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMADACNR Mask. <br /></td></tr>
<tr class="separator:ga5af5059a070e46d3c34cc8c4bde35dcf"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga3cc7d47586b19ef4dc6198b2fc936f6d"><td class="memItemLeft" align="right" valign="top"><a id="ga3cc7d47586b19ef4dc6198b2fc936f6d"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga3cc7d47586b19ef4dc6198b2fc936f6d">MXC_F_RPU_SYSRAM6_SDMADACNW_POS</a>   11</td></tr>
<tr class="memdesc:ga3cc7d47586b19ef4dc6198b2fc936f6d"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMADACNW Position. <br /></td></tr>
<tr class="separator:ga3cc7d47586b19ef4dc6198b2fc936f6d"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga5918a9bc1fa120da502f4bb6c9bb594f"><td class="memItemLeft" align="right" valign="top"><a id="ga5918a9bc1fa120da502f4bb6c9bb594f"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga5918a9bc1fa120da502f4bb6c9bb594f">MXC_F_RPU_SYSRAM6_SDMADACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SDMADACNW_POS))</td></tr>
<tr class="memdesc:ga5918a9bc1fa120da502f4bb6c9bb594f"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMADACNW Mask. <br /></td></tr>
<tr class="separator:ga5918a9bc1fa120da502f4bb6c9bb594f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga12e49a9095eb05dd0bb187577961a662"><td class="memItemLeft" align="right" valign="top"><a id="ga12e49a9095eb05dd0bb187577961a662"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga12e49a9095eb05dd0bb187577961a662">MXC_F_RPU_SYSRAM6_SDMAIACNR_POS</a>   12</td></tr>
<tr class="memdesc:ga12e49a9095eb05dd0bb187577961a662"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMAIACNR Position. <br /></td></tr>
<tr class="separator:ga12e49a9095eb05dd0bb187577961a662"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga78fd24fdada7d1c7b724ac7ae8334a8f"><td class="memItemLeft" align="right" valign="top"><a id="ga78fd24fdada7d1c7b724ac7ae8334a8f"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga78fd24fdada7d1c7b724ac7ae8334a8f">MXC_F_RPU_SYSRAM6_SDMAIACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SDMAIACNR_POS))</td></tr>
<tr class="memdesc:ga78fd24fdada7d1c7b724ac7ae8334a8f"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMAIACNR Mask. <br /></td></tr>
<tr class="separator:ga78fd24fdada7d1c7b724ac7ae8334a8f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gacbb14fae341a0b1639782d44d41c53c5"><td class="memItemLeft" align="right" valign="top"><a id="gacbb14fae341a0b1639782d44d41c53c5"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gacbb14fae341a0b1639782d44d41c53c5">MXC_F_RPU_SYSRAM6_SDMAIACNW_POS</a>   13</td></tr>
<tr class="memdesc:gacbb14fae341a0b1639782d44d41c53c5"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMAIACNW Position. <br /></td></tr>
<tr class="separator:gacbb14fae341a0b1639782d44d41c53c5"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gab39ac3dfa7bae2feb1d4f5c96bb59b8f"><td class="memItemLeft" align="right" valign="top"><a id="gab39ac3dfa7bae2feb1d4f5c96bb59b8f"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gab39ac3dfa7bae2feb1d4f5c96bb59b8f">MXC_F_RPU_SYSRAM6_SDMAIACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SDMAIACNW_POS))</td></tr>
<tr class="memdesc:gab39ac3dfa7bae2feb1d4f5c96bb59b8f"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDMAIACNW Mask. <br /></td></tr>
<tr class="separator:gab39ac3dfa7bae2feb1d4f5c96bb59b8f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga825132e7bb142f654989d3c87b6bb531"><td class="memItemLeft" align="right" valign="top"><a id="ga825132e7bb142f654989d3c87b6bb531"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga825132e7bb142f654989d3c87b6bb531">MXC_F_RPU_SYSRAM6_CRYPTOACNR_POS</a>   14</td></tr>
<tr class="memdesc:ga825132e7bb142f654989d3c87b6bb531"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_CRYPTOACNR Position. <br /></td></tr>
<tr class="separator:ga825132e7bb142f654989d3c87b6bb531"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga426958297c80cad537ce9059db2ffbfa"><td class="memItemLeft" align="right" valign="top"><a id="ga426958297c80cad537ce9059db2ffbfa"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga426958297c80cad537ce9059db2ffbfa">MXC_F_RPU_SYSRAM6_CRYPTOACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_CRYPTOACNR_POS))</td></tr>
<tr class="memdesc:ga426958297c80cad537ce9059db2ffbfa"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_CRYPTOACNR Mask. <br /></td></tr>
<tr class="separator:ga426958297c80cad537ce9059db2ffbfa"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga3d0df3f9b8414c43287966bb6e536b5b"><td class="memItemLeft" align="right" valign="top"><a id="ga3d0df3f9b8414c43287966bb6e536b5b"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga3d0df3f9b8414c43287966bb6e536b5b">MXC_F_RPU_SYSRAM6_CRYPTOACNW_POS</a>   15</td></tr>
<tr class="memdesc:ga3d0df3f9b8414c43287966bb6e536b5b"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_CRYPTOACNW Position. <br /></td></tr>
<tr class="separator:ga3d0df3f9b8414c43287966bb6e536b5b"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:gaf7556a588001235d12c158ec7c78e4aa"><td class="memItemLeft" align="right" valign="top"><a id="gaf7556a588001235d12c158ec7c78e4aa"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#gaf7556a588001235d12c158ec7c78e4aa">MXC_F_RPU_SYSRAM6_CRYPTOACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_CRYPTOACNW_POS))</td></tr>
<tr class="memdesc:gaf7556a588001235d12c158ec7c78e4aa"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_CRYPTOACNW Mask. <br /></td></tr>
<tr class="separator:gaf7556a588001235d12c158ec7c78e4aa"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga4c16a556309f42dcc1285c82e2e6630c"><td class="memItemLeft" align="right" valign="top"><a id="ga4c16a556309f42dcc1285c82e2e6630c"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga4c16a556309f42dcc1285c82e2e6630c">MXC_F_RPU_SYSRAM6_SDIOACNR_POS</a>   16</td></tr>
<tr class="memdesc:ga4c16a556309f42dcc1285c82e2e6630c"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDIOACNR Position. <br /></td></tr>
<tr class="separator:ga4c16a556309f42dcc1285c82e2e6630c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga92bad1a5f3fc09e5bf029f6702e3807b"><td class="memItemLeft" align="right" valign="top"><a id="ga92bad1a5f3fc09e5bf029f6702e3807b"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga92bad1a5f3fc09e5bf029f6702e3807b">MXC_F_RPU_SYSRAM6_SDIOACNR</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SDIOACNR_POS))</td></tr>
<tr class="memdesc:ga92bad1a5f3fc09e5bf029f6702e3807b"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDIOACNR Mask. <br /></td></tr>
<tr class="separator:ga92bad1a5f3fc09e5bf029f6702e3807b"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga949394694e43636bbc22c2f71335412c"><td class="memItemLeft" align="right" valign="top"><a id="ga949394694e43636bbc22c2f71335412c"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga949394694e43636bbc22c2f71335412c">MXC_F_RPU_SYSRAM6_SDIOACNW_POS</a>   17</td></tr>
<tr class="memdesc:ga949394694e43636bbc22c2f71335412c"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDIOACNW Position. <br /></td></tr>
<tr class="separator:ga949394694e43636bbc22c2f71335412c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga8b6babf0e81c12fc3924663d1ce46874"><td class="memItemLeft" align="right" valign="top"><a id="ga8b6babf0e81c12fc3924663d1ce46874"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__RPU__SYSRAM6.html#ga8b6babf0e81c12fc3924663d1ce46874">MXC_F_RPU_SYSRAM6_SDIOACNW</a>   ((uint32_t)(0x1UL << MXC_F_RPU_SYSRAM6_SDIOACNW_POS))</td></tr>
<tr class="memdesc:ga8b6babf0e81c12fc3924663d1ce46874"><td class="mdescLeft"> </td><td class="mdescRight">SYSRAM6_SDIOACNW Mask. <br /></td></tr>
<tr class="separator:ga8b6babf0e81c12fc3924663d1ce46874"><td class="memSeparator" colspan="2"> </td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
</div><!-- contents -->
</div><!-- doc-content -->
<!-- HTML footer for doxygen 1.8.12-->
<!-- start footer part -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
<ul>
<li class="footer">
<a href="http://www.maximintegrated.com/index.html">
<img class="footer" align="middle" src="MI_Logo_Small_Footer_RGB_150dpi.png" alt="Maxim Integrated"/></a> 0.2 </li>
</ul>
</div>
</body>
</html>