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This is an archived project. Repository and other project resources are read-only.
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card10
micropython
Commits
794c3210
Commit
794c3210
authored
6 years ago
by
Damien George
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py/asmxtensa: Use narrow version of add instr to reduce native code size
parent
a0a29724
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2 changed files
py/asmxtensa.c
+3
-3
3 additions, 3 deletions
py/asmxtensa.c
py/asmxtensa.h
+3
-3
3 additions, 3 deletions
py/asmxtensa.h
with
6 additions
and
6 deletions
py/asmxtensa.c
+
3
−
3
View file @
794c3210
...
...
@@ -95,7 +95,7 @@ void asm_xtensa_exit(asm_xtensa_t *as) {
asm_xtensa_op_addi
(
as
,
ASM_XTENSA_REG_A1
,
ASM_XTENSA_REG_A1
,
as
->
stack_adjust
);
}
else
{
asm_xtensa_op_movi
(
as
,
ASM_XTENSA_REG_A9
,
as
->
stack_adjust
);
asm_xtensa_op_add
(
as
,
ASM_XTENSA_REG_A1
,
ASM_XTENSA_REG_A1
,
ASM_XTENSA_REG_A9
);
asm_xtensa_op_add
_n
(
as
,
ASM_XTENSA_REG_A1
,
ASM_XTENSA_REG_A1
,
ASM_XTENSA_REG_A9
);
}
asm_xtensa_op_ret_n
(
as
);
...
...
@@ -183,7 +183,7 @@ void asm_xtensa_mov_reg_local_addr(asm_xtensa_t *as, uint reg_dest, int local_nu
asm_xtensa_op_addi
(
as
,
reg_dest
,
ASM_XTENSA_REG_A1
,
off
);
}
else
{
asm_xtensa_op_movi
(
as
,
reg_dest
,
off
);
asm_xtensa_op_add
(
as
,
reg_dest
,
reg_dest
,
ASM_XTENSA_REG_A1
);
asm_xtensa_op_add
_n
(
as
,
reg_dest
,
reg_dest
,
ASM_XTENSA_REG_A1
);
}
}
...
...
@@ -206,7 +206,7 @@ void asm_xtensa_mov_reg_pcrel(asm_xtensa_t *as, uint reg_dest, uint label) {
mp_asm_base_get_cur_to_write_bytes
(
&
as
->
base
,
pad
);
// Add PC to relative offset
asm_xtensa_op_add
(
as
,
reg_dest
,
reg_dest
,
ASM_XTENSA_REG_A0
);
asm_xtensa_op_add
_n
(
as
,
reg_dest
,
reg_dest
,
ASM_XTENSA_REG_A0
);
}
#endif // MICROPY_EMIT_XTENSA || MICROPY_EMIT_INLINE_XTENSA
This diff is collapsed.
Click to expand it.
py/asmxtensa.h
+
3
−
3
View file @
794c3210
...
...
@@ -113,8 +113,8 @@ void asm_xtensa_op24(asm_xtensa_t *as, uint32_t op);
// raw instructions
static
inline
void
asm_xtensa_op_add
(
asm_xtensa_t
*
as
,
uint
reg_dest
,
uint
reg_src_a
,
uint
reg_src_b
)
{
asm_xtensa_op
24
(
as
,
ASM_XTENSA_ENCODE_RRR
(
0
,
0
,
8
,
reg_dest
,
reg_src_a
,
reg_src_b
));
static
inline
void
asm_xtensa_op_add
_n
(
asm_xtensa_t
*
as
,
uint
reg_dest
,
uint
reg_src_a
,
uint
reg_src_b
)
{
asm_xtensa_op
16
(
as
,
ASM_XTENSA_ENCODE_RRR
N
(
10
,
reg_dest
,
reg_src_a
,
reg_src_b
));
}
static
inline
void
asm_xtensa_op_addi
(
asm_xtensa_t
*
as
,
uint
reg_dest
,
uint
reg_src
,
int
imm8
)
{
...
...
@@ -307,7 +307,7 @@ void asm_xtensa_mov_reg_pcrel(asm_xtensa_t *as, uint reg_dest, uint label);
#define ASM_OR_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_or((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_XOR_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_xor((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_AND_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_and((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_ADD_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_add((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_ADD_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_add
_n
((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_SUB_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_sub((as), (reg_dest), (reg_dest), (reg_src))
#define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_xtensa_op_mull((as), (reg_dest), (reg_dest), (reg_src))
...
...
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