stmhal: Add flash write support and flash storage driver.

stmhal/Makefile

@@ -78,12 +78,12 @@ SRC_C = \
 	exti.c \
 	usrsw.c \
 	rtc.c \
+	flash.c \
+	storage.c \
 	sdcard.c \
 
 #	lcd.c \
 #	servo.c \
-#	flash.c \
-#	storage.c \
 #	accel.c \
 #	timer.c \
 #	audio.c \
@@ -100,6 +100,8 @@ SRC_HAL = $(addprefix $(HAL_DIR)/src/,\
 	stm32f4xx_hal.c \
 	stm32f4xx_hal_cortex.c \
 	stm32f4xx_hal_dma.c \
+	stm32f4xx_hal_flash.c \
+	stm32f4xx_hal_flash_ex.c \
 	stm32f4xx_hal_gpio.c \
 	stm32f4xx_hal_pcd.c \
 	stm32f4xx_hal_rcc.c \

stmhal/flash.c

+#include <stm32f4xx_hal.h>
+
+#include "flash.h"
+
+/* Base address of the Flash sectors */
+#define ADDR_FLASH_SECTOR_0     ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */
+#define ADDR_FLASH_SECTOR_1     ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */
+#define ADDR_FLASH_SECTOR_2     ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */
+#define ADDR_FLASH_SECTOR_3     ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */
+#define ADDR_FLASH_SECTOR_4     ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */
+#define ADDR_FLASH_SECTOR_5     ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */
+#define ADDR_FLASH_SECTOR_6     ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */
+#define ADDR_FLASH_SECTOR_7     ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */
+#define ADDR_FLASH_SECTOR_8     ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */
+#define ADDR_FLASH_SECTOR_9     ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */
+#define ADDR_FLASH_SECTOR_10    ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */
+#define ADDR_FLASH_SECTOR_11    ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */
+
+static const uint32_t flash_info_table[26] = {
+    ADDR_FLASH_SECTOR_0, FLASH_SECTOR_0,
+    ADDR_FLASH_SECTOR_1, FLASH_SECTOR_1,
+    ADDR_FLASH_SECTOR_2, FLASH_SECTOR_2,
+    ADDR_FLASH_SECTOR_3, FLASH_SECTOR_3,
+    ADDR_FLASH_SECTOR_4, FLASH_SECTOR_4,
+    ADDR_FLASH_SECTOR_5, FLASH_SECTOR_5,
+    ADDR_FLASH_SECTOR_6, FLASH_SECTOR_6,
+    ADDR_FLASH_SECTOR_7, FLASH_SECTOR_7,
+    ADDR_FLASH_SECTOR_8, FLASH_SECTOR_8,
+    ADDR_FLASH_SECTOR_9, FLASH_SECTOR_9,
+    ADDR_FLASH_SECTOR_10, FLASH_SECTOR_10,
+    ADDR_FLASH_SECTOR_11, FLASH_SECTOR_11,
+    ADDR_FLASH_SECTOR_11 + 0x20000, 0,
+};
+
+uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) {
+    if (addr >= flash_info_table[0]) {
+        for (int i = 0; i < 24; i += 2) {
+            if (addr < flash_info_table[i + 2]) {
+                if (start_addr != NULL) {
+                    *start_addr = flash_info_table[i];
+                }
+                if (size != NULL) {
+                    *size = flash_info_table[i + 2] - flash_info_table[i];
+                }
+                return flash_info_table[i + 1];
+            }
+        }
+    }
+    return 0;
+}
+
+void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) {
+    // check there is something to write
+    if (num_word32 == 0) {
+        return;
+    }
+
+    // unlock
+    HAL_FLASH_Unlock();
+
+    // Clear pending flags (if any)
+    __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
+                           FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR);
+
+    // erase the sector(s)
+    FLASH_EraseInitTypeDef EraseInitStruct;
+    EraseInitStruct.TypeErase = TYPEERASE_SECTORS;
+    EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V
+    EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL);
+    EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1;
+    uint32_t SectorError = 0;
+    if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) {
+        // error occurred during sector erase
+        return;
+    }
+
+    // program the flash word by word
+    for (int i = 0; i < num_word32; i++) {
+        if (HAL_FLASH_Program(TYPEPROGRAM_WORD, flash_dest, *src) != HAL_OK) {
+            // error occurred during flash write
+            return;
+        }
+        flash_dest += 4;
+        src += 1;
+    }
+
+    // lock the flash
+    HAL_FLASH_Lock();
+}

stmhal/flash.h

+uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size);
+void flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32);

stmhal/main.c

@@ -29,13 +29,13 @@
 #include "usrsw.h"
 #include "usb.h"
 #include "rtc.h"
+#include "storage.h"
 #include "sdcard.h"
 #if 0
 #include "ff.h"
 #include "lexerfatfs.h"
 #include "servo.h"
 #include "lcd.h"
-#include "storage.h"
 #include "accel.h"
 #include "timer.h"
 #include "pybwlan.h"
@@ -232,9 +232,7 @@ int main(void) {
 #if MICROPY_HW_HAS_SDCARD
     sdcard_init();
 #endif
-#if 0
     storage_init();
-#endif
 
     int first_soft_reset = true;
 

stmhal/storage.c

+#include <stdint.h>
+#include <string.h>
+#include <stm32f4xx_hal.h>
+
+#include "misc.h"
+#include "systick.h"
+#include "mpconfig.h"
+#include "qstr.h"
+#include "obj.h"
+#include "led.h"
+#include "flash.h"
+#include "storage.h"
+
+#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
+#define FLASH_PART1_START_BLOCK (0x100)
+#define FLASH_PART1_NUM_BLOCKS (224) // 16k+16k+16k+64k=112k
+#define FLASH_MEM_START_ADDR (0x08004000) // sector 1, 16k
+
+static bool flash_is_initialised = false;
+static bool flash_cache_dirty;
+static uint32_t flash_cache_sector_id;
+static uint32_t flash_cache_sector_start;
+static uint32_t flash_cache_sector_size;
+static uint32_t flash_tick_counter_last_write;
+
+static void flash_cache_flush(void) {
+    if (flash_cache_dirty) {
+        // sync the cache RAM buffer by writing it to the flash page
+        flash_write(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4);
+        flash_cache_dirty = false;
+        // indicate a clean cache with LED off
+        led_state(PYB_LED_R1, 0);
+    }
+}
+
+static uint8_t *flash_cache_get_addr_for_write(uint32_t flash_addr) {
+    uint32_t flash_sector_start;
+    uint32_t flash_sector_size;
+    uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size);
+    if (flash_cache_sector_id != flash_sector_id) {
+        flash_cache_flush();
+        memcpy((void*)CACHE_MEM_START_ADDR, (const void*)flash_sector_start, flash_sector_size);
+        flash_cache_sector_id = flash_sector_id;
+        flash_cache_sector_start = flash_sector_start;
+        flash_cache_sector_size = flash_sector_size;
+    }
+    flash_cache_dirty = true;
+    // indicate a dirty cache with LED on
+    led_state(PYB_LED_R1, 1);
+    return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start;
+}
+
+static uint8_t *flash_cache_get_addr_for_read(uint32_t flash_addr) {
+    uint32_t flash_sector_start;
+    uint32_t flash_sector_size;
+    uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size);
+    if (flash_cache_sector_id == flash_sector_id) {
+        // in cache, copy from there
+        return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start;
+    }
+    // not in cache, copy straight from flash
+    return (uint8_t*)flash_addr;
+}
+
+void storage_init(void) {
+    if (!flash_is_initialised) {
+        flash_cache_dirty = false;
+        flash_cache_sector_id = 0;
+        flash_is_initialised = true;
+        flash_tick_counter_last_write = 0;
+    }
+}
+
+uint32_t storage_get_block_size(void) {
+    return FLASH_BLOCK_SIZE;
+}
+
+uint32_t storage_get_block_count(void) {
+    return FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS;
+}
+
+bool storage_needs_flush(void) {
+    // wait 2 seconds after last write to flush
+    return flash_cache_dirty && sys_tick_has_passed(flash_tick_counter_last_write, 2000);
+}
+
+void storage_flush(void) {
+    flash_cache_flush();
+}
+
+static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) {
+    buf[0] = boot;
+
+    if (num_blocks == 0) {
+        buf[1] = 0;
+        buf[2] = 0;
+        buf[3] = 0;
+    } else {
+        buf[1] = 0xff;
+        buf[2] = 0xff;
+        buf[3] = 0xff;
+    }
+
+    buf[4] = type;
+
+    if (num_blocks == 0) {
+        buf[5] = 0;
+        buf[6] = 0;
+        buf[7] = 0;
+    } else {
+        buf[5] = 0xff;
+        buf[6] = 0xff;
+        buf[7] = 0xff;
+    }
+
+    buf[8] = start_block;
+    buf[9] = start_block >> 8;
+    buf[10] = start_block >> 16;
+    buf[11] = start_block >> 24;
+
+    buf[12] = num_blocks;
+    buf[13] = num_blocks >> 8;
+    buf[14] = num_blocks >> 16;
+    buf[15] = num_blocks >> 24;
+}
+
+bool storage_read_block(uint8_t *dest, uint32_t block) {
+    //printf("RD %u\n", block);
+    if (block == 0) {
+        // fake the MBR so we can decide on our own partition table
+
+        for (int i = 0; i < 446; i++) {
+            dest[i] = 0;
+        }
+
+        build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, FLASH_PART1_NUM_BLOCKS);
+        build_partition(dest + 462, 0, 0, 0, 0);
+        build_partition(dest + 478, 0, 0, 0, 0);
+        build_partition(dest + 494, 0, 0, 0, 0);
+
+        dest[510] = 0x55;
+        dest[511] = 0xaa;
+
+        return true;
+
+    } else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
+        // non-MBR block, get data from flash memory, possibly via cache
+        uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
+        uint8_t *src = flash_cache_get_addr_for_read(flash_addr);
+        memcpy(dest, src, FLASH_BLOCK_SIZE);
+        return true;
+
+    } else {
+        // bad block number
+        return false;
+    }
+}
+
+bool storage_write_block(const uint8_t *src, uint32_t block) {
+    //printf("WR %u\n", block);
+    if (block == 0) {
+        // can't write MBR, but pretend we did
+        return true;
+
+    } else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) {
+        // non-MBR block, copy to cache
+        uint32_t flash_addr = FLASH_MEM_START_ADDR + (block - FLASH_PART1_START_BLOCK) * FLASH_BLOCK_SIZE;
+        uint8_t *dest = flash_cache_get_addr_for_write(flash_addr);
+        memcpy(dest, src, FLASH_BLOCK_SIZE);
+        flash_tick_counter_last_write = HAL_GetTick();
+        return true;
+
+    } else {
+        // bad block number
+        return false;
+    }
+}

stmhal/storage.h

+#define FLASH_BLOCK_SIZE (512)
+
+void storage_init(void);
+uint32_t storage_get_block_size(void);
+uint32_t storage_get_block_count(void);
+bool storage_needs_flush(void);
+void storage_flush(void);
+bool storage_read_block(uint8_t *dest, uint32_t block);
+bool storage_write_block(const uint8_t *src, uint32_t block);