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Commit 2249f589 authored by oharboe's avatar oharboe
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remove obsolete reset_mode

git-svn-id: svn://svn.berlios.de/openocd/trunk@833 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent 35e84a2a
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with 20 additions and 20 deletions
......@@ -10,7 +10,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/at91r40008_reset.script
......
......@@ -15,7 +15,7 @@ jtag_ntrst_delay 0
######################
#target <type> <endianess> <reset mode> <JTAG pos> <variant>
target arm926ejs little reset_init 0 arm926ejs
target arm926ejs little 0 arm926ejs
target_script 0 reset event/at91sam9260_reset.script
run_and_halt_time 0 30
......
......@@ -15,6 +15,6 @@ jtag_ntrst_delay 200
######################
#target <type> <endianess> <reset mode> <JTAG pos> <variant>
target arm926ejs little reset_run 0 arm926ejs
target arm926ejs little 0 arm926ejs
run_and_halt_time 0 30
......@@ -10,7 +10,7 @@ daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/eir-sam7se512_reset.script
......
......@@ -5,7 +5,7 @@ jtag_ntrst_delay 100
#target configuration
daemon_startup attach
#target <type> <endianess> <reset mode>
target arm920t little reset_halt 0
target arm920t little 0
working_area 0 0x80014000 0x1000 backup
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
......
......@@ -12,7 +12,7 @@ jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target <type> <endianess> <reset mode>
target arm920t little run_and_init 0 arm920t
target arm920t little 0 arm920t
# speed up memory downloads
arm7 fast_memory_access enable
......
......@@ -9,5 +9,5 @@ jtag_device 7 0x1 0x7f 0x7e
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target xscale big run_and_halt 0 IXP42x
target xscale big 0 IXP42x
run_and_halt_time 0 30
......@@ -16,7 +16,7 @@ jtag_device 4 0x1 0xf 0xe
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
target cortex_m3 little reset_halt 0 lm3s
target cortex_m3 little 0 lm3s
# 4k working area at base of ram
working_area 0 0x20000000 0x4000 nobackup
......
......@@ -16,7 +16,7 @@ jtag_device 4 0x1 0xf 0xe
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
target cortex_m3 little reset_halt 0 lm3s
target cortex_m3 little 0 lm3s
# 8k working area at base of ram
working_area 0 0x20000000 0x2000 nobackup
......
......@@ -8,7 +8,7 @@ jtag_device 4 0x1 0xf 0xe
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank <driver> <base> <size> <chip_width> <bus_width>
......
......@@ -15,7 +15,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
target_script 0 reset event/lpc2148_reset.script
......
......@@ -7,7 +7,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
target arm7tdmi little 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
......
......@@ -11,6 +11,6 @@ jtag_device 4 0x0 0x0 0xe
jtag_device 5 0x1 0x0 0x1e
#target <type> <endianess> <reset mode>
target arm11 little reset_halt 1
target arm11 little 1
run_and_halt_time 0 0
......@@ -9,5 +9,5 @@ jtag_ntrst_delay 100
#target configuration
daemon_startup reset
#target <type> <endianness> <startup mode> <chainpos> <variant>
target arm926ejs little run_and_halt 0 arm926ejs
target arm926ejs little 0 arm926ejs
run_and_halt_time 0 500
......@@ -6,7 +6,7 @@ reset_config srst_only
jtag_device 7 0x1 0x7f 0x7e
# target configuration
target xscale big reset_init 0 ixp42x
target xscale big 0 ixp42x
run_and_halt_time 0 30
# maps to PXA internal RAM. If you are using a PXA255
......
......@@ -14,7 +14,7 @@ jtag_device 8 0x0 0x0 0x0
daemon_startup reset
#target <type> <endianness> <reset mode> <chainpos> <variant>
target arm926ejs little run_and_init 1 arm926ejs
target arm926ejs little 1 arm926ejs
target_script 0 reset event/omap5912_reset.script
run_and_halt_time 0 30
......
jtag_device 5 0x1 0x1f 0x1e
jtag_nsrst_delay 200
jtag_ntrst_delay 200
target xscale little reset_init 0 pxa255
target xscale little 0 pxa255
reset_config trst_and_srst
run_and_halt_time 0 30
......
......@@ -12,7 +12,7 @@ reset_config trst_and_srst separate
jtag_device 7 0x1 0x7f 0x7e
#target configuration
daemon_startup reset
target xscale little reset_halt 0 pxa27x
target xscale little 0 pxa27x
# maps to PXA internal RAM. If you are using a PXA255
# you must initialize SDRAM or leave this option off
working_area 0 0x5c000000 0x10000 nobackup
......
......@@ -7,7 +7,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/sam7s256_reset.script
......
......@@ -7,7 +7,7 @@ jtag_device 4 0x1 0xf 0xe
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi
target arm7tdmi little 0 arm7tdmi
run_and_halt_time 0 30
target_script 0 reset event/sam7x256_reset.script
......
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