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Commit 39423e98 authored by ntfreak's avatar ntfreak
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- docs patch from Thomas Kindler 

git-svn-id: svn://svn.berlios.de/openocd/trunk@1422 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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configure.in
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......@@ -80,7 +80,7 @@ AC_ARG_WITH(ftd2xx,
# Option Given.
cat << __EOF__
The option: --with-ftd2xx=<PATH> has been removed replaced.
The option: --with-ftd2xx=<PATH> has been removed.
On Linux, the new option is:
--with-ftd2xx-linux-tardir=/path/to/files
......
doc/openocd.texi
+ 334
− 342
View file @ 39423e98
......@@ -52,7 +52,7 @@ This manual documents edition @value{EDITION} of the Open On-Chip Debugger
@menu
* About:: About OpenOCD.
* Developers:: OpenOCD developers
* Developers:: OpenOCD Developers
* Building:: Building OpenOCD
* JTAG Hardware Dongles:: JTAG Hardware Dongles
* Running:: Running OpenOCD
......@@ -70,11 +70,11 @@ This manual documents edition @value{EDITION} of the Open On-Chip Debugger
* Sample Scripts:: Sample Target Scripts
* TFTP:: TFTP
* GDB and OpenOCD:: Using GDB and OpenOCD
* TCL scripting API:: Tcl scripting API
* Upgrading:: Deprecated/Removed Commands
* Target library:: Target library
* Tcl Scripting API:: Tcl Scripting API
* Upgrading:: Deprecated/Removed commands
* Target Library:: Target Library
* FAQ:: Frequently Asked Questions
* TCL Crash Course:: TCL Crash Course
* Tcl Crash Course:: Tcl Crash Course
* License:: GNU Free Documentation License
@comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
@comment case issue with ``Index.html'' and ``index.html''
......@@ -92,14 +92,14 @@ in-system programming and boundary-scan testing for embedded target
devices.
@b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
with the JTAG (IEEE 1149.1) complient taps on your target board.
with the JTAG (IEEE 1149.1) compliant taps on your target board.
@b{Dongles:} OpenOCD currently many types of hardware dongles: USB
@b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
Based, Parallel Port Based, and other standalone boxes that run
OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
@b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920t,
ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
@b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
debugged via the GDB Protocol.
......@@ -139,9 +139,9 @@ If you are a @b{PACKAGER} of OpenOCD if you
@enumerate
@item @b{Sell dongles} and include pre-built binaries
@item @b{Supply tools} ie: A complete development solution
@item @b{Supply tools} i.e.: A complete development solution
@item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
@item @b{Build packages} ie: RPM files, or DEB files for a Linux Distro
@item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
@end enumerate
As a @b{PACKAGER} - you are at the top of the food chain. You solve
......@@ -151,8 +151,8 @@ please let us know. That said, would also like you to follow a few
suggestions:
@enumerate
@item @b{Always build with Printer Ports Enabled}
@item @b{Try where possible to use LIBFTDI + LIBUSB} You cover more bases
@item @b{Always build with printer ports enabled}
@item @b{Try to use LIBFTDI + LIBUSB where possible}. You cover more bases
@end enumerate
It is your decision..
......@@ -166,7 +166,7 @@ It is your decision..
@item @b{MORE} platforms are supported
@item @b{MORE} complete solution
@end itemize
@item @b{Why not LIBFTDI + LIBUSB} (ie: ftd2xx instead)
@item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)
@itemize @bullet
@item @b{LESS} Some say it is slower.
@item @b{LESS} complex to distribute (external dependencies)
......@@ -178,11 +178,11 @@ It is your decision..
You can download the current SVN version with SVN client of your choice from the
following repositories:
(@uref{svn://svn.berlios.de/openocd/trunk})
@uref{svn://svn.berlios.de/openocd/trunk}
or
(@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk}
Using the SVN command line client, you can use the following command to fetch the
latest version (make sure there is no (non-svn) directory called "openocd" in the
......@@ -208,7 +208,7 @@ a FTDI FT2232 based interface:
homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
@end itemize
libftdi is supported under windows. Do not use versions earlier then 0.14.
libftdi is supported under Windows. Do not use versions earlier then 0.14.
In general, the D2XX driver provides superior performance (several times as fast),
but has the draw-back of being binary-only - though that isn't that bad, as it isn't
......@@ -282,7 +282,7 @@ There are 2 methods of using the FTD2232, either (1) using the
FTDICHIP.COM closed source driver, or (2) the open (and free) driver
libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
The FTDICHIP drivers come as either a (win32) ZIP file, or a (linux)
The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
TAR.GZ file. You must unpack them ``some where'' convient. As of this
writing (12/26/2008) FTDICHIP does not supply means to install these
files ``in an appropriate place'' As a result, there are two
......@@ -315,7 +315,7 @@ Linux FTDICHIP solution
Cygwin/Linux LIBFTDI solution
Assumes:
1a) For Windows: The windows port of LIBUSB is in place.
1a) For Windows: The Windows port of LIBUSB is in place.
1b) For Linux: libusb has been built and is inplace.
2) And libftdi has been built and installed
......@@ -344,11 +344,11 @@ openocd @option{-v} is executed.
@node JTAG Hardware Dongles
@chapter JTAG Hardware Dongles
@cindex dongles
@cindex ftdi
@cindex FTDI
@cindex wiggler
@cindex zy1000
@cindex printer port
@cindex usb adapter
@cindex USB Adapter
@cindex rtck
Defined: @b{dongle}: A small device that plugins into a computer and serves as
......@@ -378,7 +378,7 @@ dongle, but a standalone box.
@section USB FT2232 Based
There are many USB jtag dongles on the market, many of them are based
There are many USB JTAG dongles on the market, many of them are based
on a chip from ``Future Technology Devices International'' (FTDI)
known as the FTDI FT2232.
......@@ -505,7 +505,7 @@ Title: FlashLINK JTAG programing cable for PSD and uPSD
@itemize @bullet
@item @b{ep93xx}
@* An EP93xx based linux machine using the GPIO pins directly.
@* An EP93xx based Linux machine using the GPIO pins directly.
@item @b{at91rm9200}
@* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
......@@ -589,7 +589,7 @@ There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
@section Small configuration file method
This is the prefered method, it is simple and is works well for many
This is the preferred method. It is simple and works well for many
people. The developers of OpenOCD would encourage you to use this
method. If you create a new configuration please email new
configurations to the development list.
......@@ -663,10 +663,10 @@ standard distribution configuration files as needed.
Some key things you should look at and understand are:
@enumerate
@item The RESET configuration of your debug environment as a hole
@item The reset configuration of your debug environment as a whole
@item Is there a ``work area'' that OpenOCD can use?
@* For ARM - work areas mean up to 10x faster downloads.
@item For MMU/MPU based ARM chips (ie: ARM9 and later) will that work area still be available?
@item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
@item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
@end enumerate
......@@ -679,26 +679,25 @@ This section/chapter is aimed at developers and integrators of
OpenOCD. These are guidelines for creating new boards and new target
configurations as of 28/Nov/2008.
However, you the user of OpenOCD should be some what familiar with
However, you, the user of OpenOCD, should be somewhat familiar with
this section as it should help explain some of the internals of what
you might be looking at.
The user should find under @t{$(INSTALLDIR)/lib/openocd} the
following directories:
The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
@itemize @bullet
@item @b{interface}
@*Think JTAG Dongle. Files that configure the jtag dongle go here.
@*Think JTAG Dongle. Files that configure the JTAG dongle go here.
@item @b{board}
@* Thing Circuit Board, PWA, PCB, they go by many names. Board files
@* Think Circuit Board, PWA, PCB, they go by many names. Board files
contain initialization items that are specific to a board - for
example: The SDRAM initialization sequence for the board, or the type
of external flash and what address it is found at. Any initialization
sequence to enable that external flash or sdram should be found in the
board file. Boards may also contain multiple targets, ie: Two cpus, or
sequence to enable that external flash or SDRAM should be found in the
board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
a CPU and an FPGA or CPLD.
@item @b{target}
@* Think CHIP. The ``target'' directory represents a jtag tap (or
@* Think chip. The ``target'' directory represents a JTAG tap (or
chip) OpenOCD should control, not a board. Two common types of targets
are ARM chips and FPGA or CPLD chips.
@end itemize
......@@ -722,7 +721,7 @@ A preconfigured interface file should exist for every interface in use
today, that said, perhaps some interfaces have only been used by the
sole developer who created it.
@b{FIXME/NOTE:} We need to add support for a variable like TCL variable
@b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
tcl_platform(platform), it should be called jim_platform (because it
is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
``cygwin'' or ``mingw''
......@@ -745,12 +744,12 @@ Or:
The board file should contain one or more @t{source [find
target/FOO.cfg]} statements along with any board specific things.
In summery the board files should contain (if present)
In summary the board files should contain (if present)
@enumerate
@item External flash configuration (ie: the flash on CS0)
@item SDRAM configuration (size, speed, etc)
@item Board specific IO configuration (ie: GPIO pins might disable a 2nd flash)
@item External flash configuration (i.e.: the flash on CS0)
@item SDRAM configuration (size, speed, etc.
@item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
@item Multiple TARGET source statements
@item All things that are not ``inside a chip''
@item Things inside a chip go in a 'target' file
......@@ -766,15 +765,15 @@ Or:
openocd -f target/FOOBAR.cfg
@end example
In summery the target files should contain
In summary the target files should contain
@enumerate
@item Set Defaults
@item Create Taps
@item Reset Configuration
@item Work Areas
@item CPU/Chip/CPU-Core Specific features
@item OnChip Flash
@item Set defaults
@item Create taps
@item Reset configuration
@item Work areas
@item CPU/Chip/CPU-Core specific features
@item On-Chip flash
@end enumerate
@subsection Important variable names
......@@ -793,8 +792,8 @@ tap identifier dotted name.
@* When OpenOCD examines the JTAG chain, it will attempt to identify
every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
to verify the tap id number verses configuration file and may issue an
error or warning like this. The hope is this will help pin point
problem OpenOCD configurations.
error or warning like this. The hope is that this will help to pinpoint
problems in OpenOCD configurations.
@example
Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
......@@ -830,12 +829,12 @@ The user (or board file) should reasonably be able to:
@end itemize
@subsection TCL Variables Guide Line
@subsection Tcl Variables Guide Line
The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
Thus the rule we follow in OpenOCD is this: Variables that begin with
a leading underscore are temporal in nature, and can be modified and
used at will within a ?TARGET? configuration file
a leading underscore are temporary in nature, and can be modified and
used at will within a ?TARGET? configuration file.
@b{EXAMPLE:} The user should be able to do this:
......@@ -849,14 +848,14 @@ used at will within a ?TARGET? configuration file
source [find target/pxa270.cfg]
# variable: _TARGETNAME = network.cpu
# other commands can refer to the "network.cpu" tap.
$_TARGETNAME configure .... params for this cpu..
$_TARGETNAME configure .... params for this CPU..
set ENDIAN little
set CHIPNAME video
source [find target/pxa270.cfg]
# variable: _TARGETNAME = video.cpu
# other commands can refer to the "video.cpu" tap.
$_TARGETNAME configure .... params for this cpu..
$_TARGETNAME configure .... params for this CPU..
unset ENDIAN
set CHIPNAME xilinx
......@@ -896,7 +895,7 @@ if @{ [info exists CPUTAPID ] @} @{
@end example
@subsection Creating Taps
After the ``defaults'' are choosen, [see above], the taps are created.
After the ``defaults'' are choosen [see above] the taps are created.
@b{SIMPLE example:} such as an Atmel AT91SAM7X256
......@@ -943,7 +942,7 @@ set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
@b{Tap Naming Convention}
See the command ``jtag newtap'' for detail, but in breif the names you should use are:
See the command ``jtag newtap'' for detail, but in brief the names you should use are:
@itemize @bullet
@item @b{tap}
......@@ -963,20 +962,20 @@ managed. If these are @b{CHIP SPECIFIC} they go here, if they are
@subsection Work Areas
Work areas are small RAM areas used by OpenOCD to speed up downloads,
and to download small snippits of code to program flash chips.
and to download small snippets of code to program flash chips.
If the chip includes an form of ``on-chip-ram'' - and many do - define
If the chip includes a form of ``on-chip-ram'' - and many do - define
a reasonable work area and use the ``backup'' option.
@b{PROBLEMS:} On more complex chips, this ``work area'' may become
inaccessable if/when the application code enables or disables the MMU.
inaccessible if/when the application code enables or disables the MMU.
@subsection ARM Core Specific Hacks
If the chip has a DCC, enable it. If the chip is an arm9 with some
special high speed download - enable it.
If the chip has a DCC, enable it. If the chip is an ARM9 with some
special high speed download features - enable it.
If the chip has an ARM ``vector catch'' feature - by defeault enable
If the chip has an ARM ``vector catch'' feature - by default enable
it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
user is really writing a handler for those situations - they can
easily disable it. Experiance has shown the ``vector catch'' is
......@@ -1010,31 +1009,31 @@ OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
learn more about JIM here: @url{http://jim.berlios.de}
@itemize @bullet
@item @b{JIM vrs TCL}
@item @b{JIM vs. Tcl}
@* JIM-TCL is a stripped down version of the well known Tcl language,
which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
fewer features. JIM-Tcl is a single .C file and a single .H file and
impliments the basic TCL command set along. In contrast: Tcl 8.6 is a
4.2MEG zip file containing 1540 files.
impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
4.2 MB .zip file containing 1540 files.
@item @b{Missing Features}
@* Our practice has been: Add/clone the Real TCL feature if/when
@* Our practice has been: Add/clone the real Tcl feature if/when
needed. We welcome JIM Tcl improvements, not bloat.
@item @b{Scripts}
@* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
command interpretor today (28/nov/2008) is a mixture of (newer)
JIM-Tcl commands, and (older) the orginal command interpretor.
command interpreter today (28/nov/2008) is a mixture of (newer)
JIM-Tcl commands, and (older) the orginal command interpreter.
@item @b{Commands}
@* At the OpenOCD telnet command line (or via the GDB mon command) one
can type a Tcl for() loop, set variables, etc.
@item @b{Historical Note}
@* JIM-Tcl was introduced to OpenOCD in Spring 2008.
@* JIM-Tcl was introduced to OpenOCD in spring 2008.
@item @b{Need a Crash Course In TCL?}
@* See: @xref{TCL Crash Course}.
@item @b{Need a crash course in Tcl?}
@* See: @xref{Tcl Crash Course}.
@end itemize
......@@ -1071,9 +1070,9 @@ the memory read/write commands.
@item @b{tcl_port} <@var{number}>
@cindex tcl_port
@*Intended as a machine interface. Port on which to listen for
incoming TCL syntax. This port is intended as a simplified RPC
incoming Tcl syntax. This port is intended as a simplified RPC
connection that can be used by clients to issue commands and get the
output from the TCL engine.
output from the Tcl engine.
@item @b{gdb_port} <@var{number}>
@cindex gdb_port
......@@ -1097,14 +1096,14 @@ the same issue.
@item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
@cindex gdb_detach
@*Configures what OpenOCD will do when gdb detaches from the daemon.
@*Configures what OpenOCD will do when GDB detaches from the daemon.
Default behaviour is <@var{resume}>
@item @b{gdb_memory_map} <@var{enable|disable}>
@cindex gdb_memory_map
@*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
requested. gdb will then know when to set hardware breakpoints, and program flash
using the gdb load command. @option{gdb_flash_program enable} will also need enabling
@*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
requested. GDB will then know when to set hardware breakpoints, and program flash
using the GDB load command. @option{gdb_flash_program enable} must also be enabled
for flash programming to work.
Default behaviour is <@var{enable}>
@xref{gdb_flash_program}.
......@@ -1153,10 +1152,10 @@ jtag_speed 0
@verbatim
interface arm-jtag-ew
@end verbatim
@section Interface Conmmand
@section Interface Command
The interface command tells OpenOCD what type of jtag dongle you are
using. Depending upon the type of dongle, you may need to have one or
The interface command tells OpenOCD what type of JTAG dongle you are
using. Depending on the type of dongle, you may need to have one or
more additional commands.
@itemize @bullet
......@@ -1194,16 +1193,16 @@ libusb.
@* Gateworks GW16012 JTAG programmer.
@item @b{jlink}
@* Segger jlink usb adapter
@* Segger jlink USB adapter
@item @b{rlink}
@* Raisonance RLink usb adapter
@* Raisonance RLink USB adapter
@item @b{vsllink}
@* vsllink is part of Versaloon which is a versatile USB programmer.
@item @b{arm-jtag-ew}
@* Olimex ARM-JTAG-EW usb adapter
@* Olimex ARM-JTAG-EW USB adapter
@comment - End parameters
@end itemize
@comment - End Interface
......@@ -1283,7 +1282,7 @@ interface on exiting OpenOCD
specified, the FTDI default value is used. This setting is only valid
if compiled with FTD2XX support.
@b{TODO:} Confirm the following: On windows the name needs to end with
@b{TODO:} Confirm the following: On Windows the name needs to end with
a ``space A''? Or not? It has to do with the FTD2xx driver. When must
this be added and when must it not be added? Why can't the code in the
interface or in OpenOCD automatically add this if needed? -- Duane.
......@@ -1300,7 +1299,7 @@ signals. Valid layouts are
@item @b{usbjtag}
"USBJTAG-1" layout described in the original OpenOCD diploma thesis
@item @b{jtagkey}
Amontec JTAGkey and JTAGkey-tiny
Amontec JTAGkey and JTAGkey-Tiny
@item @b{signalyzer}
Signalyzer
@item @b{olimex-jtag}
......@@ -1326,15 +1325,15 @@ Axiom AXM-0432
@item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
@*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
@example
ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
@end example
@item @b{ft2232_latency} <@var{ms}>
@*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
@*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
ft2232_read() fails to return the expected number of bytes. This can be caused by
USB communication delays and has proved hard to reproduce and debug. Setting the
FT2232 latency timer to a larger value increases delays for short USB packages but it
FT2232 latency timer to a larger value increases delays for short USB packets but it
also reduces the risk of timeouts before receiving the expected number of bytes.
The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
@end itemize
......@@ -1349,9 +1348,9 @@ Currently, there are no options available for the ep93xx interface.
@cindex jtag_khz
It is debatable if this command belongs here - or in a board
configuration file. In fact, in some situations the jtag speed is
changed during the target initialization process (ie: (1) slow at
reset, (2) program the cpu clocks, (3) run fast)
configuration file. In fact, in some situations the JTAG speed is
changed during the target initialisation process (i.e.: (1) slow at
reset, (2) program the CPU clocks, (3) run fast)
Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
......@@ -1359,11 +1358,11 @@ Not all interfaces support ``rtck''. If the interface device can not
support the rate asked for, or can not translate from kHz to
jtag_speed, then an error is returned.
Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
Make sure the JTAG clock is no more than @math{1/6th CPU-Clock}. This is
especially true for synthesized cores (-S). Also see RTCK.
@b{NOTE: Script writers} If the target chip requires/uses RTCK -
please use the command: 'jtag_rclk FREQ'. This TCL proc (in
please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
startup.tcl) attempts to enable RTCK, if that fails it falls back to
the specified frequency.
......@@ -1372,7 +1371,7 @@ the specified frequency.
jtag_rclk 3000
@end example
@item @b{DEPRICATED} @b{jtag_speed} - please use jtag_khz above.
@item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
@cindex jtag_speed
@*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
speed. The actual effect of this option depends on the JTAG interface used.
......@@ -1394,7 +1393,7 @@ pre_reset and post_reset events.
@node Reset Configuration
@chapter Reset Configuration
@cindex reset configuration
@cindex Reset Configuration
Every system configuration may require a different reset
configuration. This can also be quite confusing. Please see the
......@@ -1416,7 +1415,7 @@ deasserted.
@section reset_config
@b{Note:} To maintainer types and integrators. Where exactly the
@b{Note:} To maintainers and integrators: Where exactly the
``reset configuration'' goes is a good question. It touches several
things at once. In the end, if you have a board file - the board file
should define it and assume 100% that the DONGLE supports
......@@ -1426,17 +1425,17 @@ chip. @i{Grr.... nothing is every pretty.}
@* @b{Problems:}
@enumerate
@item Every JTAG Dongle is slightly different, some dongles impliment reset differently.
@item Every JTAG Dongle is slightly different, some dongles implement reset differently.
@item Every board is also slightly different; some boards tie TRST and SRST together.
@item Every chip is slightly different; some chips internally tie the two signals together.
@item Some may not impliment all of the signals the same way.
@item Some may not implement all of the signals the same way.
@item Some signals might be push-pull, others open-drain/collector.
@end enumerate
@b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
reset the TAP via TRST and send commands through the JTAG tap to halt
the CPU at the reset vector before the 1st instruction is executed,
and finally release the SRST signal.
@*Depending upon your board vendor, your chip vendor, etc, these
@*Depending on your board vendor, chip vendor, etc., these
signals may have slightly different names.
OpenOCD defines these signals in these terms:
......@@ -1463,7 +1462,7 @@ testlogic is reset together with the reset of the system (e.g. Philips
LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
the system is reset together with the test logic (only hypothetical, I
haven't seen hardware with such a bug, and can be worked around).
@option{combined} imples both @option{srst_pulls_trst} and
@option{combined} implies both @option{srst_pulls_trst} and
@option{trst_pulls_srst}. The default behaviour if no option given is
@option{separate}.
......@@ -1498,7 +1497,7 @@ Tap Uses:
@itemize @bullet
@item @b{Debug Target} A tap can be used by a GDB debug target
@item @b{Flash Programing} Some chips program the flash via JTAG
@item @b{Boundry Scan} Some chips support boundry scan.
@item @b{Boundry Scan} Some chips support boundary scan.
@end itemize
......@@ -1542,12 +1541,12 @@ bits long, during Capture-IR 0x42 is loaded into the IR, and bits
@itemize @bullet
@item @b{-expected-id NUMBER}
@* By default it is zero. If non-zero represents the
expected tap ID used when the Jtag Chain is examined. See below.
expected tap ID used when the JTAG chain is examined. See below.
@item @b{-disable}
@item @b{-enable}
@* By default not specified the tap is enabled. Some chips have a
jtag route controller (JRC) that is used to enable and/or disable
specific jtag taps. You can later enable or disable any JTAG tap via
JTAG route controller (JRC) that is used to enable and/or disable
specific JTAG taps. You can later enable or disable any JTAG tap via
the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
DOTTED.NAME}
@comment END Optional
......@@ -1562,22 +1561,22 @@ DOTTED.NAME}
@* newtap is a sub command of the ``jtag'' command
@item @b{Big Picture Background}
@*GDB Talks to OpenOCD using the GDB protocol via
tcpip. OpenOCD then uses the JTAG interface (the dongle) to
TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
control the JTAG chain on your board. Your board has one or more chips
in a @i{daisy chain configuration}. Each chip may have one or more
jtag taps. GDB ends up talking via OpenOCD to one of the taps.
JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
@item @b{NAME Rules}
@*Names follow ``C'' symbol name rules (start with alpha ...)
@item @b{TAPNAME - Conventions}
@itemize @bullet
@item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
@item @b{cpu} - the main cpu of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
@item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
@item @b{flash} - if the chip has a flash tap, example: str912.flash
@item @b{bs} - for boundary scan if this is a seperate tap.
@item @b{jrc} - for jtag route controller (example: OMAP3530 found on Beagleboards)
@item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
@item @b{unknownN} - where N is a number if you have no idea what the tap is for
@item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
@item @b{When in doubt} - use the chip makers name in their data sheet.
@item @b{When in doubt} - use the chip maker's name in their data sheet.
@end itemize
@item @b{DOTTED.NAME}
@* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
......@@ -1591,12 +1590,12 @@ important.
@item @b{Multi Tap Example}
@* This example is based on the ST Microsystems STR912. See the ST
document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
28/102, Figure 3: Jtag chaining inside the STR91xFA}.
28/102, Figure 3: JTAG chaining inside the STR91xFA}.
@url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
@*@b{checked: 28/nov/2008}
The diagram shows the TDO pin connects to the flash tap, flash TDI
The diagram shows that the TDO pin connects to the flash tap, flash TDI
connects to the CPU debug tap, CPU TDI connects to the boundary scan
tap which then connects to the TDI pin.
......@@ -1631,7 +1630,7 @@ have the taps created in the proper order.
@* @b{Removed: 28/nov/2008} This command has been removed and replaced
by the ``jtag newtap'' command. The documentation remains here so that
one can easily convert the old syntax to the new syntax. About the old
syntax: The old syntax is positional, ie: The 3rd parameter is the
syntax: The old syntax is positional, i.e.: The 3rd parameter is the
``irmask''. The new syntax requires named prefixes, and supports
additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
@b{jtag newtap} command for details.
......@@ -1657,20 +1656,20 @@ when querying the state of the JTAG taps.
@cindex JRC
@cindex route controller
These commands are used when your target has a JTAG Route controller
that effectively adds or removes a tap from the jtag chain in a
These commands are used when your target has a JTAG route controller
that effectively adds or removes a tap from the JTAG chain in a
non-standard way.
The ``standard way'' to remove a tap would be to place the tap in
bypass mode. But with the advent of modern chips, this is not always a
good solution. Some taps operate slowly, others operate fast, and
there are other JTAG clock syncronization problems one must face. To
solve that problem, the JTAG Route controller was introduced. Rather
then ``bypass'' the tap, the tap is completely removed from the
there are other JTAG clock synchronisation problems one must face. To
solve that problem, the JTAG route controller was introduced. Rather
than ``bypass'' the tap, the tap is completely removed from the
circuit and skipped.
From OpenOCD's view point, a JTAG TAP is in one of 3 states:
From OpenOCD's point of view, a JTAG tap is in one of 3 states:
@itemize @bullet
@item @b{Enabled - Not In ByPass} and has a variable bit length
......@@ -1685,15 +1684,15 @@ The IEEE JTAG definition has no concept of a ``disabled'' tap.
This command returns 1 if the named tap is currently enabled, 0 if not.
This command exists so that scripts that manipulate a JRC (like the
Omap3530 has) can determine if OpenOCD thinks a tap is presently
enabled, or disabled.
OMAP3530 has) can determine if OpenOCD thinks a tap is presently
enabled or disabled.
@page
@node Target Configuration
@chapter Target Configuration
This chapter discusses how to create a GDB Debug Target. Before
creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.
This chapter discusses how to create a GDB debug target. Before
creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
@section targets [NAME]
@b{Note:} This command name is PLURAL - not singular.
......@@ -1701,8 +1700,8 @@ creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.
With NO parameter, this plural @b{targets} command lists all known
targets in a human friendly form.
With a parameter, this pural @b{targets} command sets the current
target to the given name. (ie: If there are multiple debug targets)
With a parameter, this plural @b{targets} command sets the current
target to the given name. (i.e.: If there are multiple debug targets)
Example:
@verbatim
......@@ -1722,7 +1721,7 @@ see below for details.
The TARGET command accepts these sub-commands:
@itemize @bullet
@item @b{create} .. parameters ..
@* creates a new target, See below for details.
@* creates a new target, see below for details.
@item @b{types}
@* Lists all supported target types (perhaps some are not yet in this document).
@item @b{names}
......@@ -1768,8 +1767,8 @@ commands with a specific target name and effect only that target.
@b{Model:} The Tcl/Tk language has the concept of object commands. A
good example is a on screen button, once a button is created a button
has a name (a path in TK terms) and that name is useable as a 1st
class command. For example in TK, one can create a button and later
has a name (a path in Tk terms) and that name is useable as a 1st
class command. For example in Tk, one can create a button and later
configure it like this:
@example
......@@ -1784,13 +1783,13 @@ configure it like this:
@end example
In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
button. Commands avaialble as a ``target object'' are:
button. Commands available as a ``target object'' are:
@comment START targetobj commands.
@itemize @bullet
@item @b{configure} - configure the target; see Target Config/Cget Options below
@item @b{cget} - query the target configuration; see Target Config/Cget Options below
@item @b{curstate} - current target state (running, halt, etc)
@item @b{curstate} - current target state (running, halt, etc.
@item @b{eventlist}
@* Intended for a human to see/read the currently configure target events.
@item @b{Various Memory Commands} See the ``mww'' command elsewhere.
......@@ -1845,7 +1844,7 @@ To specify an event action, either during target creation, or later
via ``$_TARGETNAME configure'' see this example.
Syntactially, the option is: ``-event NAME BODY'' where NAME is a
target event name, and BODY is a tcl procedure or string of commands
target event name, and BODY is a Tcl procedure or string of commands
to execute.
The programmers model is the ``-command'' option used in Tcl/Tk
......@@ -1865,9 +1864,9 @@ creates and invokes small procedure. The second inlines the procedure.
The following events are available:
@itemize @bullet
@item @b{debug-halted}
@* The target has halted for debug reasons (ie: breakpoint)
@* The target has halted for debug reasons (i.e.: breakpoint)
@item @b{debug-resumed}
@* The target has resumed (ie: gdb said run)
@* The target has resumed (i.e.: gdb said run)
@item @b{early-halted}
@* Occurs early in the halt process
@item @b{examine-end}
......@@ -1889,7 +1888,7 @@ The following events are available:
@item @b{gdb-flash-write-end}
@* After GDB writes to the flash
@item @b{gdb-start}
@* Before the taret steps, gdb is trying to start/resume the tarfget
@* Before the taret steps, gdb is trying to start/resume the target
@item @b{halted}
@* The target has halted
@item @b{old-gdb_program_config}
......@@ -1944,7 +1943,6 @@ jtag configure DOTTED.NAME -event tap-disable @{
@end example
@end itemize
@section target create
@cindex target
@cindex target creation
......@@ -1960,7 +1958,7 @@ jtag configure DOTTED.NAME -event tap-disable @{
DOTTED.NAME, this name is also used to create the target object
command.
@item @b{TYPE}
@* Specifies the target type, ie: arm7tdmi, or cortexM3. Currently supported targes are:
@* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
@comment START types
@itemize @minus
@item @b{arm7tdmi}
......@@ -1978,8 +1976,7 @@ command.
@comment end TYPES
@end itemize
@item @b{PARAMS}
@*PARAMs are various target configure parameters, the following are mandatory
at configuration:
@*PARAMs are various target configuration parameters. The following ones are mandatory:
@comment START mandatory
@itemize @bullet
@item @b{-endian big|little}
......@@ -2000,7 +1997,7 @@ via the configure option or to query the target via cget.
@item @b{-work-area-size [ADDRESS]} specify/set the work area
@item @b{-work-area-backup [0|1]} does the work area get backed up
@item @b{-endian [big|little]}
@item @b{-variant [NAME]} some chips have varients OpenOCD needs to know about
@item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
@item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
@end itemize
Example:
......@@ -2013,14 +2010,14 @@ Example:
@}
@end example
@section Target Varients
@section Target Variants
@itemize @bullet
@item @b{arm7tdmi}
@* Unknown (please write me)
@item @b{arm720t}
@* Unknown (please write me) (simular to arm7tdmi)
@* Unknown (please write me) (similar to arm7tdmi)
@item @b{arm9tdmi}
@* Varients: @option{arm920t}, @option{arm922t} and @option{arm940t}
@* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
This enables the hardware single-stepping support found on these
cores.
@item @b{arm920t}
......@@ -2028,7 +2025,7 @@ cores.
@item @b{arm966e}
@* None (this is also used as the ARM946)
@item @b{cortex_m3}
@* use variant <@var{-variant lm3s}> when debugging luminary lm3s targets. This will cause
@* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
be detected and the normal reset behaviour used.
......@@ -2042,7 +2039,7 @@ provide a functional SRST line on the EJTAG connector. This causes
OpenOCD to instead use an EJTAG software reset command to reset the
processor. You still need to enable @option{srst} on the reset
configuration command to enable OpenOCD hardware reset functionality.
@comment END varients
@comment END variants
@end itemize
@section working_area - Command Removed
@cindex working_area
......@@ -2064,11 +2061,11 @@ possible, use a working_area that doesn't need to be backed up, as
performing a backup slows down operation.
@node Flash Configuration
@chapter Flash Programing
@chapter Flash programming
@cindex Flash Configuration
@b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
flash that a micro may boot from. Perhaps you the reader would like to
flash that a micro may boot from. Perhaps you, the reader, would like to
contribute support for this.
Flash Steps:
......@@ -2081,7 +2078,7 @@ via a script in some automated way. For example: To program the boot
flash on your board.
@item GDB Flashing
@* Flashing via GDB requires the flash be configured via ``flash
bank'', and the GDB flash features be enabled. See the Daemon
bank'', and the GDB flash features be enabled. See the daemon
configuration section for more details.
@end enumerate
......@@ -2175,16 +2172,16 @@ and <@var{bus_width}> bytes using the selected flash <driver>.
@subsection External Flash - cfi options
@cindex cfi options
CFI flash are external flash chips - often they are connected to a
specific chip select on the micro. By default at hard reset most
micros have the ablity to ``boot'' from some flash chip - typically
attached to the chips CS0 pin.
CFI flashes are external flash chips - often they are connected to a
specific chip select on the CPU. By default, at hard reset, most
CPUs have the ablity to ``boot'' from some flash chip - typically
attached to the CPU's CS0 pin.
For other chip selects: OpenOCD does not know how to configure, or
access a specific chip select. Instead you the human might need to via
other commands (like: mww) configure additional chip selects, or
access a specific chip select. Instead you, the human, might need to
configure additional chip selects via other commands (like: mww) , or
perhaps configure a GPIO pin that controls the ``write protect'' pin
on the FLASH chip.
on the flash chip.
@b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
<@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
......@@ -2194,11 +2191,11 @@ to significantly speed up operation.
@var{chip_width} and @var{bus_width} are specified in bytes.
The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
@var{x16_as_x8} ???
@subsection Internal Flash (Micro Controllers)
@subsection Internal Flash (Microcontrollers)
@subsubsection lpc2000 options
@cindex lpc2000 options
......@@ -2230,7 +2227,7 @@ reading the chip-id and type.
@cindex str9 options
@b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
@*The str9 needs the flash controller to be configured prior to Flash programming, eg.
@*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
@example
str9x flash_config 0 4 2 0 0x80000
@end example
......@@ -2239,17 +2236,17 @@ This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
@subsubsection str9 options (str9xpec driver)
@b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
@*Before using the flash commands the turbo mode will need enabling using str9xpec
@*Before using the flash commands the turbo mode must be enabled using str9xpec
@option{enable_turbo} <@var{num>.}
Only use this driver for locking/unlocking the device or configuring the option bytes.
Use the standard str9 driver for programming. @xref{STR9 specific commands}.
@subsubsection stellaris (LM3Sxxx) options
@cindex stellaris (LM3Sxxx) options
@subsubsection Stellaris (LM3Sxxx) options
@cindex Stellaris (LM3Sxxx) options
@b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
@*stellaris flash plugin only require the @var{target#}.
@*Stellaris flash plugin only require the @var{target#}.
@subsubsection stm32x options
@cindex stm32x options
......@@ -2263,8 +2260,8 @@ Use the standard str9 driver for programming. @xref{STR9 specific commands}.
@b{flash bank aduc702x} 0 0 0 0 <@var{target#}>
@*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout).
@subsection mFlash configuration
@cindex mFlash configuration
@subsection mFlash Configuration
@cindex mFlash Configuration
@b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
<@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
@cindex mflash bank
......@@ -2283,12 +2280,12 @@ mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
mflash bank pxa270 0x08000000 2 2 43 -1 51 0
@end example
@section Micro Controller Specific Flash Commands
@section Microcontroller specific Flash Commands
@subsection AT91SAM7 specific commands
@cindex AT91SAM7 specific commands
The flash configuration is deduced from the chip identification register. The flash
controller handles erases automatically on a page (128/265 byte) basis so erase is
controller handles erases automatically on a page (128/265 byte) basis, so erase is
not necessary for flash programming. AT91SAM7 processors with less than 512K flash
only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
that can be erased separatly. Only an EraseAll command is supported by the controller
......@@ -2308,11 +2305,11 @@ These are flash specific commands when using the str9xpec driver.
@itemize @bullet
@item @b{str9xpec enable_turbo} <@var{num}>
@cindex str9xpec enable_turbo
@*enable turbo mode, simply this will remove the str9 from the chain and talk
@*enable turbo mode, will simply remove the str9 from the chain and talk
directly to the embedded flash controller.
@item @b{str9xpec disable_turbo} <@var{num}>
@cindex str9xpec disable_turbo
@*restore the str9 into jtag chain.
@*restore the str9 into JTAG chain.
@item @b{str9xpec lock} <@var{num}>
@cindex str9xpec lock
@*lock str9 device. The str9 will only respond to an unlock command that will
......@@ -2336,13 +2333,13 @@ the str9.
Standard driver @option{str9x} programmed via the str9 core. Normally used for
flash programming as it is faster than the @option{str9xpec} driver.
@item
Direct programming @option{str9xpec} using the flash controller, this is
Direct programming @option{str9xpec} using the flash controller. This is an
ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
core does not need to be running to program using this flash driver. Typical use
for this driver is locking/unlocking the target and programming the option bytes.
@end enumerate
Before we run any cmds using the @option{str9xpec} driver we must first disable
Before we run any commands using the @option{str9xpec} driver we must first disable
the str9 core. This example assumes the @option{str9xpec} driver has been
configured for flash bank 0.
@example
......@@ -2363,7 +2360,7 @@ reset halt
The above example will read the str9 option bytes.
When performing a unlock remember that you will not be able to halt the str9 - it
has been locked. Halting the core is not required for the @option{str9xpec} driver
as mentioned above, just issue the cmds above manually or from a telnet prompt.
as mentioned above, just issue the commands above manually or from a telnet prompt.
@subsection STR9 configuration
@cindex STR9 configuration
......@@ -2373,7 +2370,7 @@ as mentioned above, just issue the cmds above manually or from a telnet prompt.
@cindex str9x flash_config
@*Configure str9 flash controller.
@example
eg. str9x flash_config 0 4 2 0 0x80000
e.g. str9x flash_config 0 4 2 0 0x80000
This will setup
BBSR - Boot Bank Size register
NBBSR - Non Boot Bank Size register
......@@ -2432,13 +2429,12 @@ These are flash specific commands when using the Stellaris driver.
@*mass erase flash memory.
@end itemize
@node General Commands
@chapter General Commands
@cindex commands
The commands documented in this chapter here are common commands that
you a human may want to type and see the output of. Configuration type
you, as a human, may want to type and see the output of. Configuration type
commands are documented elsewhere.
Intent:
......@@ -2446,10 +2442,10 @@ Intent:
@item @b{Source Of Commands}
@* OpenOCD commands can occur in a configuration script (discussed
elsewhere) or typed manually by a human or supplied programatically,
or via one of several Tcp/Ip Ports.
or via one of several TCP/IP Ports.
@item @b{From the human}
@* A human should interact with the Telnet interface (default port: 4444,
@* A human should interact with the telnet interface (default port: 4444,
or via GDB, default port 3333)
To issue commands from within a GDB session, use the @option{monitor}
......@@ -2457,7 +2453,7 @@ command, e.g. use @option{monitor poll} to issue the @option{poll}
command. All output is relayed through the GDB session.
@item @b{Machine Interface}
The TCL interface intent is to be a machine interface. The default TCL
The Tcl interface's intent is to be a machine interface. The default Tcl
port is 5555.
@end itemize
......@@ -2471,7 +2467,7 @@ port is 5555.
@subsection shutdown
@cindex shutdown
@*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
@*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
@subsection debug_level [@var{n}]
@cindex debug_level
......@@ -2503,7 +2499,7 @@ openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
@subsection script <@var{file}>
@cindex script
@*Execute commands from <file>
Also see: ``source [find FILENAME]''
See also: ``source [find FILENAME]''
@section Target state handling
@subsection power <@var{on}|@var{off}>
......@@ -2516,8 +2512,8 @@ Not all interfaces support this.
@cindex reg
@*Access a single register by its number[@option{#}] or by its [@option{name}].
No arguments: list all available registers for the current target.
Number or name argument: display a register
Number or name and value arguments: set register value
Number or name argument: display a register.
Number or name and value arguments: set register value.
@subsection poll [@option{on}|@option{off}]
@cindex poll
......@@ -2536,7 +2532,7 @@ will stop OpenOCD from waiting.
@cindex wait_halt
@*Wait for the target to enter debug mode. Optional [@option{ms}] is
a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
arg given.
arg is given.
@subsection resume [@var{address}]
@cindex resume
......@@ -2567,18 +2563,18 @@ configurations)
@subsection soft_reset_halt
@cindex reset
@*Requesting target halt and executing a soft reset. This often used
@*Requesting target halt and executing a soft reset. This is often used
when a target cannot be reset and halted. The target, after reset is
released begins to execute code. OpenOCD attempts to stop the CPU and
then sets the Program counter back at the reset vector. Unfortunatlly
that code that was executed may have left hardware in an unknown
then sets the program counter back to the reset vector. Unfortunately
the code that was executed may have left the hardware in an unknown
state.
@section Memory access commands
@subsection meminfo
display available ram memory.
@subsection Memory Peek/Poke type commands
display available RAM memory.
@subsection Memory peek/poke type commands
These commands allow accesses of a specific size to the memory
system. Often these are used to configure the current target in some
special way. For example - one may need to write certian values to the
......@@ -2586,7 +2582,7 @@ SDRAM controller to enable SDRAM.
@enumerate
@item To change the current target see the ``targets'' (plural) command
@item In system level scripts these commands are depricated, please use the TARGET object versions.
@item In system level scripts these commands are deprecated, please use the TARGET object versions.
@end enumerate
@itemize @bullet
......@@ -2610,7 +2606,7 @@ SDRAM controller to enable SDRAM.
@*write memory byte (8bit)
@end itemize
@section Image Loading Commands
@section Image loading commands
@subsection load_image
@b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
@cindex load_image
......@@ -2621,18 +2617,18 @@ SDRAM controller to enable SDRAM.
@cindex fast_load_image
@anchor{fast_load_image}
@*Normally you should be using @b{load_image} or GDB load. However, for
testing purposes or when IO overhead is significant(OpenOCD running on embedded
host), then storing the image in memory and uploading the image to the target
testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
host), storing the image in memory and uploading the image to the target
can be a way to upload e.g. multiple debug sessions when the binary does not change.
Arguments as @b{load_image}, but image is stored in OpenOCD host
Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
memory, i.e. does not affect target. This approach is also useful when profiling
target programming performance as IO and target programming can easily be profiled
seperately.
target programming performance as I/O and target programming can easily be profiled
separately.
@subsection fast_load
@b{fast_load}
@cindex fast_image
@anchor{fast_image}
@*Loads image stored in memory by @b{fast_load_image} to current target. Must be preceeded by fast_load_image.
@*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
@subsection dump_image
@b{dump_image} <@var{file}> <@var{address}> <@var{size}>
@cindex dump_image
......@@ -2643,7 +2639,7 @@ seperately.
@b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
@cindex verify_image
@*Verify <@var{file}> against target memory starting at <@var{address}>.
This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
@section Breakpoint commands
......@@ -2668,7 +2664,8 @@ This will first attempt comparison using a crc checksum, if this fails it will t
@itemize
@item @b{profile} <@var{seconds}> <@var{gmon.out}>
Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
@end itemize
@section Target Specific Commands
......@@ -2700,7 +2697,7 @@ The target is resumed in the currently set @option{core_mode}.
@cindex ARM7/9 specific commands
These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
ARM920t or ARM926EJ-S.
ARM920T or ARM926EJ-S.
@itemize @bullet
@item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
@cindex arm7_9 dbgrq
......@@ -2711,13 +2708,13 @@ safe for all but ARM7TDMI--S cores (like Philips LPC).
@anchor{arm7_9 fast_memory_access}
@*Allow OpenOCD to read and write memory without checking completion of
the operation. This provides a huge speed increase, especially with USB JTAG
cables (FT2232), but might be unsafe if used with targets running at a very low
speed, like the 32kHz startup clock of an AT91RM9200.
cables (FT2232), but might be unsafe if used with targets running at very low
speeds, like the 32kHz startup clock of an AT91RM9200.
@item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
@cindex arm7_9 dcc_downloads
@*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
unsafe, especially with targets running at a very low speed. This command was introduced
unsafe, especially with targets running at very low speeds. This command was introduced
with OpenOCD rev. 60.
@end itemize
......@@ -2749,7 +2746,7 @@ with OpenOCD rev. 60.
@option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
@option{irq} @option{fiq}.
Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
@end itemize
@subsection ARM966E specific commands
......@@ -2773,8 +2770,8 @@ Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
@*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
@item @b{arm920t cache_info}
@cindex arm920t cache_info
@*Print information about the caches found. This allows you to see if your target
is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
@*Print information about the caches found. This allows to see whether your target
is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
@item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
@cindex arm920t md<bhw>_phys
@*Display memory at physical address addr.
......@@ -2792,8 +2789,8 @@ is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
@*Translate a virtual address to a physical address.
@end itemize
@subsection ARM926EJS specific commands
@cindex ARM926EJS specific commands
@subsection ARM926EJ-S specific commands
@cindex ARM926EJ-S specific commands
@itemize @bullet
@item @b{arm926ejs cp15} <@var{num}> [@var{value}]
......@@ -2857,13 +2854,13 @@ See libdcc in the contrib dir for more details.
@node JTAG Commands
@chapter JTAG Commands
@cindex JTAG commands
@cindex JTAG Commands
Generally most people will not use the bulk of these commands. They
are mostly used by the OpenOCD developers or those who need to
directly manipulate the JTAG taps.
In general these commands control JTAG taps at a very low level. For
example if you need to control a JTAG Route Controller (ie: the
example if you need to control a JTAG Route Controller (i.e.: the
OMAP3530 on the Beagle Board has one) you might use these commands in
a script or an event procedure.
@section Commands
......@@ -2943,33 +2940,33 @@ Available tap_states are:
@node TFTP
@chapter TFTP
@cindex TFTP
If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can
be used to access files on PCs(either developer PC or some other PC).
If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
be used to access files on PCs (either the developer's PC or some other PC).
The way this works on the ZY1000 is to prefix a filename by
"/tftp/ip/" and append the tftp path on the tftp
"/tftp/ip/" and append the TFTP path on the TFTP
server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
if the file was hosted on the embedded host.
In order to achieve decent performance, you must choose a tftp server
In order to achieve decent performance, you must choose a TFTP server
that supports a packet size bigger than the default packet size (512 bytes). There
are numerous tftp servers out there(free and commercial) and you will have to do
are numerous TFTP servers out there (free and commercial) and you will have to do
a bit of googling to find something that fits your requirements.
@node Sample Scripts
@chapter Sample Scripts
@cindex scripts
This page shows how to use the target library.
This page shows how to use the Target Library.
The configuration script can be divided in the following section:
The configuration script can be divided into the following sections:
@itemize @bullet
@item daemon configuration
@item interface
@item jtag scan chain
@item target configuration
@item flash configuration
@item Daemon configuration
@item Interface
@item JTAG scan chain
@item Target configuration
@item Flash configuration
@end itemize
Detailed information about each section can be found at OpenOCD configuration.
......@@ -2993,14 +2990,14 @@ to debug remote targets.
@cindex Connecting to GDB
@anchor{Connecting to GDB}
Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
instance 6.3 has a known bug where it produces bogus memory access
instance GDB 6.3 has a known bug that produces bogus memory access
errors, which has since been fixed: look up 1836 in
@url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
@*OpenOCD can communicate with GDB in two ways:
@enumerate
@item
A socket (tcp) connection is typically started as follows:
A socket (TCP/IP) connection is typically started as follows:
@example
target remote localhost:3333
@end example
......@@ -3019,11 +3016,11 @@ session.
GDB command line.
OpenOCD supports the gdb @option{qSupported} packet, this enables information
to be sent by the gdb server (OpenOCD) to GDB. Typical information includes
packet size and device memory map.
to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
packet size and the device's memory map.
Previous versions of OpenOCD required the following GDB options to increase
the packet size and speed up GDB communication.
the packet size and speed up GDB communication:
@example
set remote memory-write-packet-size 1024
set remote memory-write-packet-size fixed
......@@ -3035,25 +3032,25 @@ This is now handled in the @option{qSupported} PacketSize and should not be requ
@section Programming using GDB
@cindex Programming using GDB
By default the target memory map is sent to GDB, this can be disabled by
the following OpenOCD config option:
By default the target memory map is sent to GDB. This can be disabled by
the following OpenOCD configuration option:
@example
gdb_memory_map disable
@end example
For this to function correctly a valid flash config must also be configured
For this to function correctly a valid flash configuration must also be set
in OpenOCD. For faster performance you should also configure a valid
working area.
Informing GDB of the memory map of the target will enable GDB to protect any
flash area of the target and use hardware breakpoints by default. This means
flash areas of the target and use hardware breakpoints by default. This means
that the OpenOCD option @option{gdb_breakpoint_override} is not required when
using a memory map. @xref{gdb_breakpoint_override}.
To view the configured memory map in GDB, use the gdb command @option{info mem}
All other unasigned addresses within GDB are treated as RAM.
To view the configured memory map in GDB, use the GDB command @option{info mem}
All other unassigned addresses within GDB are treated as RAM.
GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
this can be changed to the old behaviour by using the following GDB command.
GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
This can be changed to the old behaviour by using the following GDB command
@example
set mem inaccessible-by-default off
@end example
......@@ -3066,7 +3063,7 @@ areas to be programmed lie within the target flash area the vFlash packets
will be used.
If the target needs configuring before GDB programming, an event
script can be executed.
script can be executed:
@example
$_TARGETNAME configure -event EVENTNAME BODY
@end example
......@@ -3074,11 +3071,11 @@ $_TARGETNAME configure -event EVENTNAME BODY
To verify any flash programming the GDB command @option{compare-sections}
can be used.
@node TCL scripting API
@chapter TCL scripts
@cindex TCL scripting API
@cindex TCL scripts
@section API Rules
@node Tcl Scripting API
@chapter Tcl Scripting API
@cindex Tcl Scripting API
@cindex Tcl scripts
@section API rules
The commands are stateless. E.g. the telnet command line has a concept
of currently active target, the Tcl API proc's take this sort of state
......@@ -3115,36 +3112,36 @@ Thus, to get the names of the associative array is easy:
Lists returned must be relatively small. Otherwise a range
should be passed in to the proc in question.
@section Internal Low Level Commands
@section Internal low-level Commands
By Low level, the intent is a human would not directly use these commands.
By low-level, the intent is a human would not directly use these commands.
Low level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
is the low level API upon which "flash banks" is implemented.
@itemize @bullet
@item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
Read memory and return as a TCL array for script processing
Read memory and return as a Tcl array for script processing
@item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
Convert a TCL array to memory locations and write the values
Convert a Tcl array to memory locations and write the values
@item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
Return information about the flash banks
@end itemize
OpenOCD commands can consist of two words, e.g. "flash banks". The
startup.tcl "unknown" proc will translate this into a tcl proc
startup.tcl "unknown" proc will translate this into a Tcl proc
called "flash_banks".
@section OpenOCD specific Global Variables
@subsection HostOS
Real TCL has ::tcl_platform(), and platform::identify, and many other
variables. JimTCL, as implimented in OpenOCD creates $HostOS which
holds one of the following values.
Real Tcl has ::tcl_platform(), and platform::identify, and many other
variables. JimTCL, as implemented in OpenOCD creates $HostOS which
holds one of the following values:
@itemize @bullet
@item @b{winxx} Built using Microsoft Visual Studio
......@@ -3169,7 +3166,7 @@ Certain OpenOCD commands have been deprecated/removed during the various revisio
@item @b{arm7_9 force_hw_bkpts}
@cindex arm7_9 force_hw_bkpts
@*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
for flash if the gdb memory map has been set up(default when flash is declared in
for flash if the GDB memory map has been set up(default when flash is declared in
target configuration). @xref{gdb_breakpoint_override}.
@item @b{arm7_9 sw_bkpts}
@cindex arm7_9 sw_bkpts
......@@ -3233,34 +3230,34 @@ clocks are not synchronised, they are ``asynchronous''
In order for the two to work together they must be synchronised. Otherwise
the two systems will get out of sync with each other and nothing will
work. There are 2 basic options.
work. There are 2 basic options:
@enumerate
@item
Use a special circuit.
@item
One clock must be some multiple slower the the other.
One clock must be some multiple slower than the other.
@end enumerate
@b{Does this really matter?} For some chips and some situations, this
is a non-issue (ie: A 500MHz ARM926) but for others - for example some
ATMEL SAM7 and SAM9 chips start operation from reset at 32kHz -
is a non-issue (i.e.: A 500MHz ARM926) but for others - for example some
Atmel SAM7 and SAM9 chips start operation from reset at 32kHz -
program/enable the oscillators and eventually the main clock. It is in
those critical times you must slow the jtag clock to sometimes 1 to
those critical times you must slow the JTAG clock to sometimes 1 to
4kHz.
Imagine debugging that 500MHz ARM926 hand held battery powered device
Imagine debugging a 500MHz ARM926 hand held battery powered device
that ``deep sleeps'' at 32kHz between every keystroke. It can be
painful.
@b{Solution #1 - A special circuit}
In order to make use of this your jtag dongle must support the RTCK
In order to make use of this, your JTAG dongle must support the RTCK
feature. Not all dongles support this - keep reading!
The RTCK signal often found in some ARM chips is used to help with
this problem. ARM has a good description of the problem described at
this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
28/nov/2008]. Link title: ``How does the jtag synchronisation logic
28/nov/2008]. Link title: ``How does the JTAG synchronisation logic
work? / how does adaptive clocking work?''.
The nice thing about adaptive clocking is that ``battery powered hand
......@@ -3272,19 +3269,19 @@ down code, slow step out until the system speeds up.
Often this is a perfectly acceptable solution.
In the most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
the target clock speed. But what is that ``magic division'' it varies
depending upon the chips on your board. @b{ARM Rule of thumb} Most ARM
based systems require an 8:1 division. @b{Xilinx Rule of thumb} is
In most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
the target clock speed. But what that ``magic division'' is varies
depending on the chips on your board. @b{ARM rule of thumb} Most ARM
based systems require an 8:1 division. @b{Xilinx rule of thumb} is
1/12 the clock speed.
Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
You can still debug the 'lower power' situations - you just need to
You can still debug the 'low power' situations - you just need to
manually adjust the clock speed at every step. While painful and
teadious, it is not always practical.
tedious, it is not always practical.
It is however easy to ``code your way around it'' - ie: Cheat a little
It is however easy to ``code your way around it'' - i.e.: Cheat a little,
have a special debug mode in your application that does a ``high power
sleep''. If you are careful - 98% of your problems can be debugged
this way.
......@@ -3297,7 +3294,7 @@ To set the JTAG frequency use the command:
@end example
@item @b{Win32 Pathnames} Why does not backslashes in paths under Windows doesn't work?
@item @b{Win32 Pathnames} Why don't backslashes work in Windows paths?
OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
around Windows filenames.
......@@ -3316,7 +3313,7 @@ around Windows filenames.
@item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
Make sure you have Cygwin installed, or at least a version of OpenOCD that
claims to come with all the necessary dlls. When using Cygwin, try launching
claims to come with all the necessary DLLs. When using Cygwin, try launching
OpenOCD from the Cygwin shell.
@item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
......@@ -3324,15 +3321,14 @@ Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
GDB issues software breakpoints when a normal breakpoint is requested, or to implement
source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
software breakpoints consume one of the two available hardware breakpoints.
@item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
and works sometimes fine.
@item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
Make sure the core frequency specified in the @option{flash lpc2000} line matches the
clock at the time you're programming the flash. If you've specified the crystal's
frequency, make sure the PLL is disabled, if you've specified the full core speed
frequency, make sure the PLL is disabled. If you've specified the full core speed
(e.g. 60MHz), make sure the PLL is enabled.
@item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
......@@ -3351,16 +3347,16 @@ beyond the last valid frame. It might be possible to prevent this by setting up
a proper "initial" stack frame, if you happen to know what exactly has to
be done, feel free to add this here.
@b{Simple:} In your startup code - push 8 registers of ZEROs onto the
@b{Simple:} In your startup code - push 8 registers of zeros onto the
stack before calling main(). What GDB is doing is ``climbing'' the run
time stack by reading various values on the stack using the standard
call frame for the target. GDB keeps going - until one of 2 things
happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
stackframes have been processed. By pushing ZEROs on the stack, GDB
stackframes have been processed. By pushing zeros on the stack, GDB
gracefully stops.
@b{Debugging Interrupt Service Routines} - In your ISR before you call
your C code, do the same, artifically push some zeros on to the stack,
your C code, do the same - artifically push some zeros onto the stack,
remember to pop them off when the ISR is done.
@b{Also note:} If you have a multi-threaded operating system, they
......@@ -3379,7 +3375,7 @@ independently. With this setup, it's not possible to halt the core right out of
reset, everything else should work fine.
@item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
unstable. When single-stepping over large blocks of code, GDB and OpenOCD
quit with an error message. Is there a stability issue with OpenOCD?
......@@ -3434,29 +3430,29 @@ references a jtag newtap and a flash bank references a target).
You can use the ``scan_chain'' command to verify and display the tap order.
@item @b{JTAG Tap Order} JTAG Tap Order - Command Order
@item @b{JTAG Tap Order} JTAG tap order - command order
Many newer devices have multiple JTAG taps. For example: ST
Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
``CortexM3'' tap. Example: The STM32 reference manual, Document ID:
``Cortex-M3'' tap. Example: The STM32 reference manual, Document ID:
RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
connected to the Boundary Scan Tap, which then connects to the
CortexM3 Tap, which then connects to the TDO pin.
connected to the boundary scan tap, which then connects to the
Cortex-M3 tap, which then connects to the TDO pin.
Thus, the proper order for the STM32 chip is: (1) The CortexM3, then
(2) The Boundary Scan Tap. If your board includes an additional JTAG
Thus, the proper order for the STM32 chip is: (1) The Cortex-M3, then
(2) The boundary scan tap. If your board includes an additional JTAG
chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
place it before or after the stm32 chip in the chain. For example:
place it before or after the STM32 chip in the chain. For example:
@itemize @bullet
@item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
@item STM32 BS TDO (output) -> STM32 CortexM3 TDI (input)
@item STM32 CortexM3 TDO (output) -> SM32 TDO Pin
@item STM32 BS TDO (output) -> STM32 Cortex-M3 TDI (input)
@item STM32 Cortex-M3 TDO (output) -> SM32 TDO Pin
@item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
@item Xilinx TDO Pin -> OpenOCD TDO (input)
@end itemize
The ``jtag device'' commands would thus be in the order shown below. Note
The ``jtag device'' commands would thus be in the order shown below. Note:
@itemize @bullet
@item jtag newtap Xilinx tap -irlen ...
......@@ -3475,27 +3471,27 @@ TODO.
@end enumerate
@node TCL Crash Course
@chapter TCL Crash Course
@cindex TCL
@node Tcl Crash Course
@chapter Tcl Crash Course
@cindex Tcl
Not everyone knows TCL - this is not intended to be a replacement for
learning TCL, the intent of this chapter is to give you some idea of
how the TCL Scripts work.
Not everyone knows Tcl - this is not intended to be a replacement for
learning Tcl, the intent of this chapter is to give you some idea of
how the Tcl scripts work.
This chapter is written with two audiences in mind. (1) OpenOCD users
who need to understand a bit more of how JIM-Tcl works so they can do
something useful, and (2) those that want to add a new command to
OpenOCD.
@section TCL Rule #1
@section Tcl Rule #1
There is a famous joke, it goes like this:
@enumerate
@item Rule #1: The wife is always correct
@item Rule #2: If you think otherwise, See Rule #1
@end enumerate
The TCL equal is this:
The Tcl equal is this:
@enumerate
@item Rule #1: Everything is a string
......@@ -3503,15 +3499,15 @@ The TCL equal is this:
@end enumerate
As in the famous joke, the consequences of Rule #1 are profound. Once
you understand Rule #1, you will understand TCL.
you understand Rule #1, you will understand Tcl.
@section TCL Rule #1b
@section Tcl Rule #1b
There is a second pair of rules.
@enumerate
@item Rule #1: Control flow does not exist. Only commands
@* For example: the classic FOR loop or IF statement is not a control
flow item, they are commands, there is no such thing as control flow
in TCL.
in Tcl.
@item Rule #2: If you think otherwise, See Rule #1
@* Actually what happens is this: There are commands that by
convention, act like control flow key words in other languages. One of
......@@ -3519,38 +3515,38 @@ those commands is the word ``for'', another command is ``if''.
@end enumerate
@section Per Rule #1 - All Results are strings
Every TCL command results in a string. The word ``result'' is used
Every Tcl command results in a string. The word ``result'' is used
deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
Everything is a string}
@section TCL Quoting Operators
In life of a TCL script, there are two important periods of time, the
@section Tcl Quoting Operators
In life of a Tcl script, there are two important periods of time, the
difference is subtle.
@enumerate
@item Parse Time
@item Evaluation Time
@end enumerate
The two key items here are how ``quoted things'' work in TCL. TCL has
The two key items here are how ``quoted things'' work in Tcl. Tcl has
three primary quoting constructs, the [square-brackets] the
@{curly-braces@} and ``double-quotes''
By now you should know $VARIABLES always start with a $DOLLAR
sign. BTW, to set a variable, you actually use the command ``set'', as
sign. BTW: To set a variable, you actually use the command ``set'', as
in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
= 1'' statement, but without the equal sign.
@itemize @bullet
@item @b{[square-brackets]}
@* @b{[square-brackets]} are command subsitution. It operates much
@* @b{[square-brackets]} are command substitutions. It operates much
like Unix Shell `back-ticks`. The result of a [square-bracket]
operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
string}. These two statments are roughly identical.
string}. These two statements are roughly identical:
@example
# bash example
X=`date`
echo "The Date is: $X"
# TCL example
# Tcl example
set X [date]
puts "The Date is: $X"
@end example
......@@ -3567,31 +3563,31 @@ is a string}
@*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
'single-quote' operators in BASH shell scripts, with the added
feature: @{curly-braces@} nest, single quotes can not. @{@{@{this is
feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
28/nov/2008, Jim/OpenOCD does not have a date command.
@end itemize
@section Consequences of Rule 1/2/3/4
The consequences of Rule 1 is profound.
The consequences of Rule 1 are profound.
@subsection Tokenizing & Execution.
@subsection Tokenisation & Execution.
Of course, whitespace, blank lines and #comment lines are handled in
the normal way.
As a script is parsed, each (multi) line in the script file is
tokenized and according to the quoting rules. After tokenizing, that
tokenised and according to the quoting rules. After tokenisation, that
line is immedatly executed.
Multi line statements end with one or more ``still-open''
@{curly-braces@} which - eventually - a few lines later closes.
@{curly-braces@} which - eventually - closes a few lines later.
@subsection Command Execution
Remember earlier: There is no such thing as ``control flow''
statements in TCL. Instead there are COMMANDS that simpily act like
Remember earlier: There are no ``control flow''
statements in Tcl. Instead there are COMMANDS that simply act like
control flow operators.
Commands are executed like this:
......@@ -3620,10 +3616,10 @@ of the function. Not the choice of words: LIST and BODY. The PROC
command stores these items in a table somewhere so it can be found by
``LookupCommand()''
@subsection The FOR Command
@subsection The FOR command
The most interesting command to look at is the FOR command. In TCL,
the FOR command is normally implimented in C. Remember, FOR is a
The most interesting command to look at is the FOR command. In Tcl,
the FOR command is normally implemented in C. Remember, FOR is a
command just like any other command.
When the ascii text containing the FOR command is parsed, the parser
......@@ -3643,7 +3639,7 @@ Remember @i{Rule #1 - Everything is a string.} The key point is this:
Often many of those parameters are in @{curly-braces@} - thus the
variables inside are not expanded or replaced until later.
Remember that every TCL command looks like the classic ``main( argc,
Remember that every Tcl command looks like the classic ``main( argc,
argv )'' function in C. In JimTCL - they actually look like this:
@example
......@@ -3653,28 +3649,28 @@ MyCommand( Jim_Interp *interp,
Jim_Obj * const *argvs );
@end example
Real TCL is nearly identical. Although the newer versions have
Real Tcl is nearly identical. Although the newer versions have
introduced a byte-code parser and intepreter, but at the core, it
still operates in the same basic way.
@subsection FOR Command Implimentation
@subsection FOR command implementation
To understand TCL it is perhaps most helpful to see the FOR
To understand Tcl it is perhaps most helpful to see the FOR
command. Remember, it is a COMMAND not a control flow structure.
In TCL there are two underying C helper functions.
In Tcl there are two underlying C helper functions.
Remember Rule #1 - You are a string.
The @b{first} helper parses and executes commands found in an ascii
string. Commands can be seperated by semi-colons, or newlines. While
parsing, variables are expanded per the quoting rules
string. Commands can be seperated by semicolons, or newlines. While
parsing, variables are expanded via the quoting rules.
The @b{second} helper evaluates an ascii string as a numerical
expression and returns a value.
Here is an example of how the @b{FOR} command could be
implimented. The pseudo code below does not show error handling.
implemented. The pseudo code below does not show error handling.
@example
void Execute_AsciiString( void *interp, const char *string );
......@@ -3717,7 +3713,7 @@ MyForCommand( void *interp,
Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
in the same basic way.
@section OpenOCD TCL Usage
@section OpenOCD Tcl Usage
@subsection source and find commands
@b{Where:} In many configuration files
......@@ -3727,13 +3723,13 @@ in the same basic way.
@item The FIND command is in square brackets.
@* The FIND command is executed with the parameter FILENAME. It should
find the full path to the named file. The RESULT is a string, which is
subsituted on the orginal command line.
substituted on the orginal command line.
@item The command source is executed with the resulting filename.
@* SOURCE reads a file and executes as a script.
@end enumerate
@subsection format command
@b{Where:} Generally occurs in numerous places.
@* TCL no command like @b{printf()}, intead it has @b{format}, which is really more like
@* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
@b{sprintf()}.
@b{Example}
@example
......@@ -3750,7 +3746,7 @@ subsituted on the orginal command line.
@* Refer to Rule #1.
@item The PUTS command outputs the text.
@end enumerate
@subsection Body Or Inlined Text
@subsection Body or Inlined Text
@b{Where:} Various TARGET scripts.
@example
#1 Good
......@@ -3778,7 +3774,7 @@ command.
@*There are 4 examples:
@enumerate
@item The TCLBODY is a simple string that happens to be a proc name
@item The TCLBODY is several simple commands semi-colon seperated
@item The TCLBODY is several simple commands seperated by semicolons
@item The TCLBODY is a multi-line @{curly-brace@} quoted string
@item The TCLBODY is a string with variables that get expanded.
@end enumerate
......@@ -3798,7 +3794,7 @@ Jim/OpenOCD does not have a date command@}
@subsection Global Variables
@b{Where:} You might discover this when writing your own procs @* In
simple terms: Inside a PROC, if you need to access a global variable
you must say so. Also see ``upvar''. Example:
you must say so. See also ``upvar''. Example:
@example
proc myproc @{ @} @{
set y 0 #Local variable Y
......@@ -3807,7 +3803,7 @@ proc myproc @{ @} @{
@}
@end example
@section Other Tcl Hacks
@b{Dynamic Variable Creation}
@b{Dynamic variable creation}
@example
# Dynamically create a bunch of variables.
for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
......@@ -3819,7 +3815,7 @@ for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
set $vn [expr (1 << $x)]
@}
@end example
@b{Dynamic Proc/Command Creation}
@b{Dynamic proc/command creation}
@example
# One "X" function - 5 uart functions.
foreach who @{A B C D E@}
......@@ -3827,9 +3823,9 @@ foreach who @{A B C D E@}
@}
@end example
@node Target library
@chapter Target library
@cindex Target library
@node Target Library
@chapter Target Library
@cindex Target Library
OpenOCD comes with a target configuration script library. These scripts can be
used as-is or serve as a starting point.
......@@ -3838,17 +3834,15 @@ The target library is published together with the OpenOCD executable and
the path to the target library is in the OpenOCD script search path.
Similarly there are example scripts for configuring the JTAG interface.
The command line below uses the example parport configuration scripts
The command line below uses the example parport configuration script
that ship with OpenOCD, then configures the str710.cfg target and
finally issues the init and reset command. The communication speed
finally issues the init and reset commands. The communication speed
is set to 10kHz for reset and 8MHz for post reset.
@example
openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
@end example
To list the target scripts available:
@example
......@@ -3860,8 +3854,6 @@ at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
@end example
@include fdl.texi
@node OpenOCD Index
......
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