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Commit 56a04a34 authored by oharboe's avatar oharboe
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Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instruction into

the ITR register but it will only be executed when the DSCR[13]
bit is set. The documentation is a bit weird as it classifies
the DSCR as read-only but the pseudo code is writing to it as
well. This is working on a beagleboard.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2634 b42882b7-edfa-0310-969c-e2dbd0fdcd60
parent f36d0083
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