Rick Altherr <kc8apf@kc8apf.net> switch to new syntax for target events

git-svn-id: svn://svn.berlios.de/openocd/trunk@1116 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/target/str710.cfg

@@ -12,7 +12,11 @@ jtag_device 4 0x1 0xf 0xe
 target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
 [new_target_name] configure -event reset-start { jtag_khz 10 }
 [new_target_name] configure -event reset-init { jtag_khz 6000 }
-[new_target_name] configure -event old-gdb_program_config { script event/str710_program.script }
+[new_target_name] configure -event gdb-flash-erase-start {
+	flash protect 0 0 7 off
+	flash protect 1 0 1 off
+}
+
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0
 
 #flash bank str7x <base> <size> 0 0 <target#> <variant>

src/target/target/str730.cfg

@@ -19,7 +19,10 @@ jtag_ntrst_delay 500
 target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
 [new_target_name] configure -event reset-start { jtag_khz 10 }
 [new_target_name] configure -event reset-init { jtag_khz 3000 }
-[new_target_name] configure -event old-gdb_program_config { script event/str730_program.script }
+[new_target_name] configure -event gdb-ash-erase-start {
+	flash protect 0 0 7 off
+}
+
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
 
 #flash bank <driver> <base> <size> <chip_width> <bus_width>

src/target/target/str750.cfg

@@ -20,7 +20,11 @@ target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdm
 
 [new_target_name] configure -event reset-start  { jtag_khz 10 }
 [new_target_name] configure -event reset-init { jtag_khz 3000 }
-[new_target_name] configure -event old-gdb_program_config { script event/str750_program.script }
+[new_target_name] configure -event gdb-ash-erase-start {
+	flash protect 0 0 7 off
+	flash protect 1 0 1 off
+}
+
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
 
 #flash bank <driver> <base> <size> <chip_width> <bus_width>

src/target/target/wi-9c.cfg

@@ -15,7 +15,78 @@ jtag_ntrst_delay 0
 ######################
 
 target create target0 arm926ejs -endian big -chain-position 0 -variant arm926ejs
-[new_target_name] configure -event reset-init { script event/wi-9c_reset.script }
+[new_target_name] configure -event reset-init {
+	mww 0x90600104 0x33313333
+	mww 0xA0700000 0x00000001  # Enable the memory controller.
+	mww 0xA0700024 0x00000006  # Set the refresh counter 6
+	mww 0xA0700028 0x00000001  # 
+	mww 0xA0700030 0x00000001  # Set the precharge period
+	mww 0xA0700034 0x00000004  # Active to precharge command period is 16 clock cycles
+	mww 0xA070003C 0x00000001  # tAPR
+	mww 0xA0700040 0x00000005  # tDAL
+	mww 0xA0700044 0x00000001  # tWR
+	mww 0xA0700048 0x00000006  # tRC 32 clock cycles  
+	mww 0xA070004C 0x00000006  # tRFC 32 clock cycles
+	mww 0xA0700054 0x00000001  # tRRD
+	mww 0xA0700058 0x00000001  # tMRD
+	mww 0xA0700100 0x00004280  # Dynamic Config 0 (cs4) 
+	mww 0xA0700120 0x00004280  # Dynamic Config 1 (cs5)
+	mww 0xA0700140 0x00004280  # Dynamic Config 2 (cs6)
+	mww 0xA0700160 0x00004280  # Dynamic Config 3 (cs7)
+	#
+	mww 0xA0700104 0x00000203  # CAS latency is 2 at 100 MHz
+	mww 0xA0700124 0x00000203  # CAS latency is 2 at 100 MHz
+	mww 0xA0700144 0x00000203  # CAS latency is 2 at 100 MHz
+	mww 0xA0700164 0x00000203  # CAS latency is 2 at 100 MHz
+	#
+	mww 0xA0700020 0x00000103  # issue SDRAM PALL command
+	#
+	mww 0xA0700024 0x00000001  # Set the refresh counter to be as small as possible
+	#
+	# Add some dummy writes to give the SDRAM time to settle, it needs two
+	# AHB clock cycles, here we poke in the debugger flag, this lets
+	# the software know that we are in the debugger
+	mww 0xA0900000 0x00000002
+	mww 0xA0900000 0x00000002
+	mww 0xA0900000 0x00000002
+	mww 0xA0900000 0x00000002
+	mww 0xA0900000 0x00000002
+	#
+	mdw 0xA0900000 
+	mdw 0xA0900000 
+	mdw 0xA0900000 
+	mdw 0xA0900000 
+	mdw 0xA0900000 
+	#
+	mww 0xA0700024 0x00000030 # Set the refresh counter to 30
+	mww 0xA0700020 0x00000083 # Issue SDRAM MODE command
+	#
+	# Next we perform a read of RAM.
+	# mw = move word.
+	mdw 0x00022000
+	# mw 0x00022000:P, r3  # 22000 for cas2 latency, 32000 for cas 3
+	#
+	mww 0xA0700020 0x00000003   # issue SDRAM NORMAL command
+	mww 0xA0700100 0x00084280   # Enable buffer access
+	mww 0xA0700120 0x00084280   # Enable buffer access
+	mww 0xA0700140 0x00084280   # Enable buffer access
+	mww 0xA0700160 0x00084280   # Enable buffer access
+
+	#Set byte lane state (static mem 1)"
+	mww 0xA0700220, 0x00000082
+	#Flash Start
+	mww 0xA09001F8, 0x50000000
+	#Flash Mask Reg
+	mww 0xA09001FC, 0xFF000001
+	mww 0xA0700028, 0x00000001
+
+	#  RAMAddr = 0x00020000
+	#  RAMSize = 0x00004000
+
+	# Set the processor mode
+	reg cpsr 0xd3
+}
+
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x00000000 -work-area-size 0x1000 -work-area-backup 1
 
 #####################

src/target/target/xba_revA3.cfg

@@ -10,7 +10,51 @@ jtag_ntrst_delay 100
 jtag_device 7 0x1 0x7f 0x7e
 
 target create target0 xscale -endian big -chain-position 0 -variant ixp42x
-[new_target_name] configure -event reset-init { script event/xba_revA3.script }
+[new_target_name] configure -event reset-init {
+	#############################################################################
+	# setup expansion bus CS, disable external wdt
+	#############################################################################
+	mww 0xc4000000  0xbd113842  #CS0  : Flash, write enabled @0x50000000
+	mww 0xc4000004  0x94d10013  #CS1
+	mww 0xc4000008  0x95960003  #CS2
+	mww 0xc400000c  0x00000000  #CS3
+	mww 0xc4000010  0x80900003  #CS4
+	mww 0xc4000014  0x9d520003  #CS5
+	mww 0xc4000018  0x81860001  #CS6
+	mww 0xc400001c  0x80900003  #CS7
+
+	#############################################################################
+	# init SDRAM controller: 16MB, one bank, CL3
+	#############################################################################
+	mww 0xCC000000  0x2A # SDRAM_CFG: 64MBit, CL3
+	mww 0xCC000004     0 # disable refresh
+	mww 0xCC000008     3 # NOP
+	sleep 100
+	mww 0xCC000004  2100 # set refresh counter
+	mww 0xCC000008     2 # Precharge All Banks
+	sleep 100
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     4 # Auto Refresh
+	mww 0xCC000008     1 # Mode Select CL3
+
+	#mww 0xc4000020  0xffffee # CFG0: remove expansion bus boot flash
+	#mirror at 0x00000000
+
+	#big endian
+	reg XSCALE_CTRL 0xF8
+
+	#
+	# detect flash
+	#
+	flash probe 0
+}
+
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0