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20 authors
  1. Jul 15, 2009
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 930269b4
      zwelch authored 
      More instructions decoded:

	A5.3.5 Load/store multiple 

The preferred PUSH/POP syntax is shown when appropriate.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2539 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      930269b4
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 421b8e13
      zwelch authored 
      More instructions decoded:

	A5.3.14 Multiply, and multiply accumulate 
	A5.3.15 Long multiply, long multiply accumulate, divide

The EABI requires *adjacent* register pairs, but the long multiply
ops can use any pair of registers; interesting.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2538 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      421b8e13
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 889bd3e7
      zwelch authored 
      More Thumb2 32-bit opcode support:

	 A5.3.10 Store single data item 

Byte, word, halfword.  Offset, pre-index, post-index.  And
a "make like you're unprivileged" option when using small
immediate offsets.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2537 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      889bd3e7
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 84e86e9a
      zwelch authored 
      Print old-style Thumb NOP instructions as such.  (GCC uses "mov r8, r8"
instead of the architected NOP which is new in Thumb2.)


git-svn-id: svn://svn.berlios.de/openocd/trunk@2536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      84e86e9a
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · d2088f0d
      zwelch authored 
      Make disassembly of the Thumb load-literal instruction show the
address of the literal being loaded (so users can avoid doing
that math themselves).  Add and use an Align(PC,4) utility.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2535 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      d2088f0d
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · f163d000
      zwelch authored 
      Make the Thumb2 disassembler handle more 32-bit instructions:

  A5.3.3 Data processing (plain binary immediate)

These use mostly twelve bit literals, but there are also bitfield
and saturated add primitives.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2534 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      f163d000
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 0165ae44
      zwelch authored 
      Make the Thumb2 disassembler handle more 32-bit instructions:

  A5.3.1 Data processing (modified immediate)

My small sample shows GCC likes to use many of these instructions.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2533 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      0165ae44
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 8b89224c
      zwelch authored 
      Make the Thumb2 disassembler handle a bunch of 32-bit instructions:

  A5.3.4 Branches and miscellaneous control
 
Note that this shifts some responsabililty out of helper functions,
making the code and layout simpler for 32-bit decoders:  they only
need to know how to format the instruction and its parameters.

Also, technical note:  with this patch, Thumb1 decoders could now
call the Thumb2 decoder if they wanted to get nicer treatment of
the exiting 32-bit B/BLX instructions.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2532 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      8b89224c
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · b71e3aff
      zwelch authored 
      Change layout of Thumb disassembly to work better with Thumb2:

 - Move opcode to the left, allowing space for four hex bytes:
    * after address, two spaces not one tab (taking 6 spaces)
    * after 2-byte opcode, four spaces before tab
 - Also, after opcode mnemonic use a tab not a space, to make
   operands line up

Sample output (after some patches decoding a few 32-bit instructions):

0x00003e5a  0xf4423200	ORR	r2, r2, #131072	; 0x20000
0x00003e5e  0x601a    	STR 	r2, [r3, #0x0]
0x00003e60  0x2800    	CMP	r0, #0x00
0x00003e62  0xd1f3    	BNE	0x00003e4c
0x00003e64  0xf008fa38	BL	0x0000c2d8

The affected lines of code now wrap at sane margins too.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2531 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      b71e3aff
    • zwelch's avatar
      David Brownell <david-b@pacbell.net>: · 309870e4
      zwelch authored 
      Initial support for disassembling Thumb2 code.  This works only for
Cortex-M3 cores so far.  Eventually other cores will also need Thumb2
support ... but they don't yet support any kind of disassembly.

 - Update the 16-bit Thumb decoder:
 
     * Understand CPS, REV*, SETEND, {U,S}XT{B,H} opcodes added
       by ARMv6.  (It already seems to treat CPY as MOV.)

     * Understand CB, CBNZ, WFI, IT, and other opcodes added by
       in Thumb2.

 - A new Thumb2 instruction decode routine is provided.
 
     * This has a different signature:  pass the target, not the
       instruction, so it can fetch a second halfword when needed.  
       The instruction size is likewise returned to the caller.

     * 32-bit instructions are recognized but not yet decoded.
   
 - Start using the current "UAL" syntax in some cases.  "SWI" is
   renamed as "SVC"; "LDMIA" as "LDM"; "STMIA" as "STM".

 - Define a new "cortex_m3 disassemble addr count" command to give
   access to this disassembly.

Sanity checked against "objdump -d" output; a bunch of the new
instructions checked out fine.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2530 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      309870e4
    • oharboe's avatar
      print errno when parport fails to open. · 2ff59c9a
      oharboe authored 
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2529 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      2ff59c9a
    • oharboe's avatar
      retire Eclipse settings, charset will be set elsewhere. · e76fe13a
      oharboe authored 
      git-svn-id: svn://svn.berlios.de/openocd/trunk@2528 b42882b7-edfa-0310-969c-e2dbd0fdcd60
      e76fe13a
  3. Jul 14, 2009
  5. Jul 13, 2009
  7. Jul 12, 2009
  9. Jul 11, 2009
  11. Jul 10, 2009
  13. Jul 08, 2009