Passes cmd_ctx into parse_load_image_command_args for reporting the
parsing errors therein.

This helper eliminates significant amount of redundant code in command
handler functions throughout the system.  It wraps the lower-level
parse_* macros to implement a policy for reporting parse errors to the
active command context (cmd_ctx).  If errors do occur, this macro causes
the calling function to abort with the proper return code.

The arm920t has a concept of read modify write cycles
that may have to be represented in the mrcmcr interface
eventually.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Now matches machine code syntax and old arm11 syntax.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

This avoids polluting help for targets that can never support mrc/mcr

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Fail watchpoint_add() if it's the same address but the
parameters are different ... don't just assume having
the same address means the same watchpoint!  (Note that
overlapping watchpoints aren't detected...)

Handle unrecognized return codes more sanely; don't exit()!
And describe command params right.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Expose most DWT registers via Tcl; there are a few more, but
those are mostly for profiling along with the ITM.  Having
this set available enables operations which aren't possible
with just the standard watchpoint operations.

The cycle counter may be interesting.  Turn it on after reset
by setting the LSB of the dwt_ctrl register, and it counts
CPU clocks.  You can program the comparator 0 watchpoint to
trigger on a given cycle count, rather than a data address.

Likewise, comparator 1 may be able to match data values given
address matches from one or two other comparators.  (Not all
hardware supports this capability though; try it.  That is
something the standard watchpoint methods should eventually
handle, for the single address case.)

Minor cleanup:  remove needless functional indirection for
exposing the v7m architctural registers.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

There's no reason to read which interrupts are enabled from
the NVIC; that state isn't used.  Plus, it's highly dynamic
since firmware can change it at any time; remove the support
for those state records.

Remove duplicate definition of DWT_CTRL address; shrink a line.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Fix the watchpoint error checks, and do them in add(), not later
in set() when it's mostly too late.  Support the full range of
watchpoint sizes (1 to 32K bytes each), and check alignments.

Minor cleanup of DWT access:  shrink lines, use "+" for address
calculations, comment a few issues.  Add debug message reporting
DWT capabilities, matching the message for FBP, and some minor
code and spec review comments.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Add Doxygen for the exported ARMv7-M interfaces.

Make the non-exported stuff static.  Remove functions and
data which are now observably unused.

Add comment about a small speedup that the run_algorithm()
logic could use.  Shrink a few too-long lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

improve default target->read/write_phys_memory, produce
more sensible error messages if the mmu interface
functions have not been implemented yet vs. will
not be implemented(e.g. cortex m3).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Removing unused code makes it much less mysterius.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Previous patch somehow made GCC lose some of its cookies;
work around, zero-init that struct.

Clean up code from the previous patch.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

There was a fixed 20 second timeout which is too little
for large, slow timeout checks.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

To support breakpoints, flush data cache line and invalidate
instruction cache when 4 and 2 byte words are written.

The previous code was trying to write directly to the physical
memory, which was buggy and had a number of other situations
that were not handled.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

Fixed bug: if virtual address for working memory was not specified
and MMU was enabled, then address 0 would be used.

Require working address to be specified for both MMU enabled
and disabled case.

For some completely inexplicable reason this fixes the regression
in svn 2646 for flash write in arm926ejs target. The logs showed
that MMU was disabled in the case below:

https://lists.berlios.de/pipermail/openocd-development/2009-November/011882.html



Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

This change is necessary to debug AT91SAM9260 on my PC with a
FT2232H dongle.

Signed-off-by: Dimitar Dimitrov <dinuxbg@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Just use the array of names we're given, ignoring indices.
The "reserved means don't use" patch missed that change.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

I'm suspecting this code can never have worked, since the
original commit (svn #335) in early 2008.

Fix is just copy/paste from another (working) function.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>

The code works like follow (N = bit_len):

	N	-1	%4	2<<	-1	~ (binary)
	--------------------------------------------------
	1	0	0	2	1	1111 1110
	2	1	1	4	3	1111 1100
	3	2	2	8	7	1111 1000
	4	3	3	16	15	1111 0000
	5	4	0	2	1	1111 1110
	6	5	1	4	3	1111 1100
	7	6	2	8	7	1111 1000
	8	7	3	16	15	1111 0000
	...	...	...	...	...	...

Addresses a bug reported by FangfangLi <ffli@syntest.com.cn>.

[dbrownell@users.sourceforge.net: fix spelling bug too]

Signed-off-by: Michael Roth <mroth@nessie.de>
Cc: FangfangLi <ffli@syntest.com.cn>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Implement XSVF support for detailed state path transitions,
by collecting sequences of XSTATE transitions into paths
and then calling pathmove().

It seems that the Xilinx tools want to force state-by-state
transitions instead of relying on the standardized SVF paths.
Like maybe there are XSVF tools not implementing SVF paths,
which are all that we support using svf_statemove().

So from IRPAUSE, instead of just issuing "XSTATE DRPAUSE"
they will issue XSTATES for each intermediate state: first
IREXIT2, then IRUPDATE, DRSELECT, DRCAPTURE, DREXIT1, and
finally DRPAUSE.  This works now.

Handling of paths that go *through* reset is a trifle dodgey,
but it should be safe.

Tested-by: Wookey <wookey@wookware.org>

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Unneeded exports cause confusion about the module interfaces.
Make most functions static, and fix some line-too-long issues.
Delete some now-obviously-unused code.

The forward decls are just code clutter; move their references
later, after the normal declarations.  (Or vice versa.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Unneeded exports cause confusion about the module interfaces.
Only the Feroceon code builds on this, so only routines it
reuses should be public..  Make most remaining functions
static, and fix some of the line-too-long issues.

The forward decls are just code clutter; move their references
later, after the normal declarations.  Turns out we don't need
even one forward declaration in this file.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

The Hex parser uses a fixed number of sections.  When the
number of sections in the file is greater than that, the
stack get corrupted and a CHECKSUM ERROR is detected
which is very confusing.

This checks the number of sections read, and increases
IMAGE_MAX_SECTIONS so it works on my file.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

Only type 1 branch instruction has a condition code, not type 2.
Currently they're both tagged with ARM_B which doesn't allow for the
distinction.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

A Thumb BLX instruction is branching to ARM code, and therefore the
first 2 bits of the target address must be cleared.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

This patch includes partial support for these new JTAG adapters.
More complete support will require updates to the libftdi code,
for EEPROM access.

[dbrownell@users.sourceforge.net: fix whitespace, linelen, etc ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>