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rahix authoredThis commit introduces a way to control core 1. This is archieved by a predefined API-Interrupt: The reset interrupt. When triggered, it will bring the core back into its default state and wait for a new vector address from Epicardium. Once this vector address is transferred, it will start the new payload. This method only works as long as core 1 is responsive to the API interrupts. Cases where this might not be the case: - During times where core 1 has interrupts disabled - When in a higher priority exception handler - When core 1 has corrupted its IVT Signed-off-by:
Rahix <rahix@rahix.de>rahix authoredThis commit introduces a way to control core 1. This is archieved by a predefined API-Interrupt: The reset interrupt. When triggered, it will bring the core back into its default state and wait for a new vector address from Epicardium. Once this vector address is transferred, it will start the new payload. This method only works as long as core 1 is responsive to the API interrupts. Cases where this might not be the case: - During times where core 1 has interrupts disabled - When in a higher priority exception handler - When core 1 has corrupted its IVT Signed-off-by:Rahix <rahix@rahix.de>
interrupt-receiver.c 418 B
#include "max32665.h"
#include "tmr.h"
#include "api/common.h"
#include "epicardium.h"
void __dispatch_isr(api_int_id_t);
/* Timer Interrupt used for control char notification */
void TMR5_IRQHandler(void)
{
TMR_IntClear(MXC_TMR5);
__dispatch_isr(API_CALL_MEM->int_id);
API_CALL_MEM->int_id = (-1);
}
/* Reset Handler */
void __epic_isr_reset(void)
{
API_CALL_MEM->int_id = (-1);
API_CALL_MEM->reset_stub();
}