The vector table's alignment requirements depend on the number of
interrupts [1].  In our case, we have 0x6E(=110) interrupts and thus an
alignment requirement of 0x80(=128).

To satisfy this requirement, this commit moves the IVT to the beginning
of .text and enforces a 128 byte alignment.  Please note that the
headers which come before .text will push the IVT to 0x100 instead of
having it directly in the beginning at 0x00.

[1]: https://developer.arm.com/docs/dui0553/a/cortex-m4-peripherals/system-control-block/vector-table-offset-register



Signed-off-by: Rahix <rahix@rahix.de>