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Commit 719ff6ea authored by schneider's avatar schneider
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fix(openocd): config file support for second flash bank

parent 6a02b0e7
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#!/bin/sh #!/bin/sh
set -e set -e
echo "build image" $1 $2 $3
PYTHON="$1" PYTHON="$1"
ELF="$2" ELF="$2"
BIN="$3" BIN="$3"
......
...@@ -6,12 +6,12 @@ crc = 0 ...@@ -6,12 +6,12 @@ crc = 0
data = open(sys.argv[1], 'rb').read() data = open(sys.argv[1], 'rb').read()
crc = crc16.crc16xmodem(data) crc = crc16.crc16xmodem(data)
print(crc) #print(crc)
padded = data + bytes([crc >> 8, crc & 0xFF]) padded = data + bytes([crc >> 8, crc & 0xFF])
crc = 0 crc = 0
crc = crc16.crc16xmodem(padded) crc = crc16.crc16xmodem(padded)
print(crc) #print(crc)
open(sys.argv[1], 'wb').write(padded) open(sys.argv[1], 'wb').write(padded)
...@@ -20,8 +20,11 @@ ...@@ -20,8 +20,11 @@
#define PARTITION_START (0x10000000 + 64 * 1024) #define PARTITION_START (0x10000000 + 64 * 1024)
#define PARTITION_END (0x10000000 + 512 * 1024 - 1) /* TODO: check if 1 MB also works. Might have to enable the second bank */ //#define PARTITION_END (0x10000000 + 512 * 1024 - 1) /* TODO: check if 1 MB also works. Might have to enable the second bank */
//#define PARTITION_END (0x10000000 + 1024 * 1024 - 1) #define PARTITION_END (0x10000000 + 1024 * 1024 - 1)
//#define PARTITION_START (0x10080000)
//#define PARTITION_END (0x10000000 + 1024 * 1024 - 1) /* TODO: check if 1 MB also works. Might have to enable the second bank */
extern void run_usbmsc(void); extern void run_usbmsc(void);
...@@ -188,13 +191,14 @@ int main(void) ...@@ -188,13 +191,14 @@ int main(void)
while(1); while(1);
} }
//MXC_FLC0->clkdiv = 96;
//MXC_FLC0->clkdiv = 96;
if(mount()) { if(mount()) {
if(check_integrity()) { if(check_integrity()) {
printf("Found valid application image\n"); printf("Found valid application image\n");
if(is_update_needed()) { if(is_update_needed()) {
printf("Trying to update application from external flash\n"); printf("Trying to update application from external flash\n");
MXC_FLC0->clkdiv = 54;
erase_partition(); erase_partition();
flash_partition(); flash_partition();
} else { } else {
......
...@@ -60,6 +60,7 @@ custom_target( ...@@ -60,6 +60,7 @@ custom_target(
name + '.bin', name + '.bin',
build_by_default: true, build_by_default: true,
output: name + '.bin', output: name + '.bin',
#output: 'card10.bin',
input: elf, input: elf,
command: [build_image, '@INPUT@', '@OUTPUT0@'], command: [build_image, '@INPUT@', '@OUTPUT0@'],
) )
...@@ -174,7 +174,7 @@ void card10_diag(void) ...@@ -174,7 +174,7 @@ void card10_diag(void)
void core1_start(void) { void core1_start(void) {
//MXC_GCR->gp0 = (uint32_t)(&__isr_vector_core1); //MXC_GCR->gp0 = (uint32_t)(&__isr_vector_core1);
MXC_GCR->gp0 = 0x10040000; MXC_GCR->gp0 = 0x10080000;
MXC_GCR->perckcn1 &= ~MXC_F_GCR_PERCKCN1_CPU1; MXC_GCR->perckcn1 &= ~MXC_F_GCR_PERCKCN1_CPU1;
} }
......
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
/* If used, they should be adjusted for the external Flash/RAM size */ /* If used, they should be adjusted for the external Flash/RAM size */
MEMORY { MEMORY {
SPIX (rx) : ORIGIN = 0x08000000, LENGTH = 128M SPIX (rx) : ORIGIN = 0x08000000, LENGTH = 128M
FLASH (rx) : ORIGIN = 0x10040000, LENGTH = 256k FLASH (rx) : ORIGIN = 0x10080000, LENGTH = 512k
SRAM (rwx) : ORIGIN = 0x20040000, LENGTH = 256k SRAM (rwx) : ORIGIN = 0x20040000, LENGTH = 256k
SPID (r) : ORIGIN = 0x80000000, LENGTH = 512M SPID (r) : ORIGIN = 0x80000000, LENGTH = 512M
} }
......
...@@ -199,14 +199,18 @@ int FLC_PageErase(uint32_t address) ...@@ -199,14 +199,18 @@ int FLC_PageErase(uint32_t address)
uint32_t addr; uint32_t addr;
mxc_flc_regs_t *flc = NULL; mxc_flc_regs_t *flc = NULL;
printf("%p\n", address);
// Get FLC Instance // Get FLC Instance
if ((err = SYS_FLC_GetByAddress(&flc, address)) != E_NO_ERROR) { if ((err = SYS_FLC_GetByAddress(&flc, address)) != E_NO_ERROR) {
printf("A\n");
return err; return err;
} }
if ((err = SYS_FLC_GetPhysicalAddress(address, &addr)) < E_NO_ERROR) { if ((err = SYS_FLC_GetPhysicalAddress(address, &addr)) < E_NO_ERROR) {
printf("B\n");
return err; return err;
} }
if ((err = prepare_flc(flc)) != E_NO_ERROR) { if ((err = prepare_flc(flc)) != E_NO_ERROR) {
printf("C\n");
return err; return err;
} }
...@@ -227,6 +231,7 @@ int FLC_PageErase(uint32_t address) ...@@ -227,6 +231,7 @@ int FLC_PageErase(uint32_t address)
/* Check access violations */ /* Check access violations */
if (flc->intr & MXC_F_FLC_INTR_AF) { if (flc->intr & MXC_F_FLC_INTR_AF) {
flc->intr &= ~MXC_F_FLC_INTR_AF; flc->intr &= ~MXC_F_FLC_INTR_AF;
printf("D\n");
return E_BAD_STATE; return E_BAD_STATE;
} }
......
...@@ -9,8 +9,10 @@ reset_config none ...@@ -9,8 +9,10 @@ reset_config none
# Set flash parameters # Set flash parameters
set FLASH_BASE 0x10000000 set FLASH_BASE 0x10000000
set FLASH_SIZE 0x300000 set FLASH_BASE1 0x10080000
set FLASH_SIZE 0x80000
set FLC_BASE 0x40029000 set FLC_BASE 0x40029000
set FLC_BASE1 0x40029400
set FLASH_SECTOR 0x2000 set FLASH_SECTOR 0x2000
set FLASH_CLK 96 set FLASH_CLK 96
set FLASH_OPTIONS 0x01 set FLASH_OPTIONS 0x01
......
...@@ -93,3 +93,8 @@ if { [info exists FLASH_OPTIONS] } { ...@@ -93,3 +93,8 @@ if { [info exists FLASH_OPTIONS] } {
flash bank $_CHIPNAME.flash max32xxx $_FLASH_BASE $_FLASH_SIZE 0 0 $_CHIPNAME.cpu \ flash bank $_CHIPNAME.flash max32xxx $_FLASH_BASE $_FLASH_SIZE 0 0 $_CHIPNAME.cpu \
$_FLC_BASE $_FLASH_SECTOR $_FLASH_CLK $_FLASH_OPTIONS $_FLC_BASE $_FLASH_SECTOR $_FLASH_CLK $_FLASH_OPTIONS
if { [info exists FLASH_BASE1] } {
flash bank $_CHIPNAME.flash1 max32xxx $FLASH_BASE1 $_FLASH_SIZE 0 0 $_CHIPNAME.cpu \
$FLC_BASE1 $_FLASH_SECTOR $_FLASH_CLK $_FLASH_OPTIONS
}
...@@ -67,6 +67,15 @@ custom_target( ...@@ -67,6 +67,15 @@ custom_target(
name + '.bin', name + '.bin',
build_by_default: true, build_by_default: true,
output: name + '.bin', output: name + '.bin',
input: elf, #input: [elf, 'epicardium/epicardium.bin'],
input: [elf],
command: [build_image, '@INPUT@', '@OUTPUT0@'], command: [build_image, '@INPUT@', '@OUTPUT0@'],
) )
#custom_target(
# name + '.b1n',
# build_by_default: true,
# output: name + '.b1n',
# input: bin,
# command: [build_image, '@INPUT@', '@OUTPUT0@'],
#)
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