- May 31, 2019
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Damien George authored
Because py/mpconfig.h has header include guards.
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Martin Dybdal authored
The patch solves the problem where multiple Timer objects (e.g. multiple Timer(0) instances) could initialise multiple handles to the same internal timer. The list of timers is now maintained not for "active" timers (where init is called), but for all timers created. The timers are only removed from the list of timers on soft-reset (machine_timer_deinit_all). Fixes #4078.
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Damien George authored
To enable define MICROPY_HW_USB_CDC_NUM to 3.
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- May 30, 2019
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Damien George authored
The board config option MICROPY_HW_USB_ENABLE_CDC2 is now changed to MICROPY_HW_USB_CDC_NUM, and the latter should be defined to the maximum number of CDC interfaces to support (defaults to 1).
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- May 29, 2019
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Damien George authored
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Andrew Leech authored
Otherwise flushing and disabling the D-cache will give a hard-fault when SDRAM is used. Fixes #4818.
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- May 28, 2019
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Damien George authored
EAGAIN should be for pure non-blocking mode and ETIMEDOUT for when there is a finite (but non-zero) timeout enabled.
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Damien George authored
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Tom Manning authored
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- May 24, 2019
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Andrew Leech authored
Set the active MPU region to the actual size of SDRAM configured and invalidate the rest of the memory-mapped region, to prevent errors due to CPU speculation. Also update the attributes of the SDRAM region as per ST recommendations, and change region numbers to avoid conflicts elsewhere in the codebase (see eth usage).
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Damien George authored
Fixes issue #4795.
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Paul Sokolovsky authored
I2C can't be enabled in prj_base.conf because it's a board-specific feature. For example, if a board doesn't have I2C but CONFIG_I2C=y then the build will fail (on Zephyr build system side). The patch here gets the qemu_cortex_m3 build working again.
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Paul Sokolovsky authored
So it fits better with existing narrative.
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- May 23, 2019
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stijn authored
This enables going back to previous wrapped lines using backspace or left arrow: instead of just sticking to the beginning of a line, the cursor will move a line up.
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Andrew Leech authored
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- May 22, 2019
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Damien George authored
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Damien George authored
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Damien George authored
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Damien George authored
As part of this, ctrl-C is now able to interrupt a running program.
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- May 21, 2019
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Glenn Ruben Bakke authored
Defining NRFX_STATIC_ASSERT macro to be empty, but available to nrfx.
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Damien George authored
On MCUs that have an I2C TIMINGR register, this can now be explicitly set via the "timingr" keyword argument to the I2C constructor, for both machine.I2C and pyb.I2C. This allows to configure precise timing values when the defaults are inadequate.
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Damien George authored
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Andrew Leech authored
Previously the hardware I2C timeout was hard coded to 50ms which isn't guaranteed to be enough depending on the clock stretching specs of the I2C device(s) in use. This patch ensures the hardware I2C implementation honors the existing timeout argument passed to the machine.I2C constructor. The default timeout for software and hardware I2C is now 50ms.
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- May 20, 2019
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Damien George authored
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Damien George authored
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Damien George authored
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Damien George authored
Fixes issue #4794.
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- May 17, 2019
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Damien George authored
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Paul Sokolovsky authored
For modules I initially created or made substantial contributions to.
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Damien George authored
Recent gcc versions (at least 9.1) give a warning about using "sp" in the clobber list. Such code is removed by this patch. A dedicated function is instead used to set SP and branch to the bootloader so the code has full control over what happens. Fixes issue #4785.
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Damien George authored
This also fixes deleting the PPP task, since eTaskGetState() never returns eDeleted. A limitation with this patch: once the PPP is deactivated (ppp.active(0)) it cannot be used again. A new PPP instance must be created instead.
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- May 15, 2019
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Damien George authored
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iabdalkader authored
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iabdalkader authored
Only the M4 and M7 MCUs have an FPU and FPU_IRQn, and FPU_IRQn is not always the last entry/IRQ number.
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iabdalkader authored
The H7 HAL uses SPI IRQs when the SPI is running in DMA mode.
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iabdalkader authored
This is required for the H7 DMA to work.
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- May 14, 2019
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stijn authored
This allows figuring out the number of bytes in the memoryview object as len(memview) * memview.itemsize. The feature is enabled via MICROPY_PY_BUILTINS_MEMORYVIEW_ITEMSIZE and is disabled by default.
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- May 13, 2019
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iabdalkader authored
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Damien George authored
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Damien George authored
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