- Oct 14, 2009
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David Brownell authored
This makes the documentation a closer match to "help" output: - "pathmove" somehow was not documented in the User's Guide - "jtag_nsrst_assert_width" and "jtag_ntrst_assert_width" are new; both needed descriptions. - Removed two undocumented and fairly useless script mechanisms: * production/production_info/production_test ... using it, requires replacing everything; so having it adds no value. * cpu ... way out of date; hopeless to keep that current Note that anyone using that "production" stuff already defines their own procedures, and can keep using them with no change. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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- Oct 13, 2009
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Øyvind Harboe authored
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- Oct 12, 2009
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Øyvind Harboe authored
arm11 burst writes are now only enabled for writes larger than 1 word. Single word writes are frequently used from reset init scripts to non-memory peripherals.
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Øyvind Harboe authored
Retire arm11 no_increment. Intended for future expansion to read/write to ports. New arm11 commands would have to be added to exploit it.
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- Oct 09, 2009
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David Brownell authored
Fix formatting and layout bugs in the new "translating configuration files" bit. Make it a section within the chapter about config files. Add a crossreference. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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David Brownell authored
We added two overridable procedures; document them, and the two jtag arp_* operations they necessarily expose. Update the comment about the jtag_init_reset() routine; it's been obsolete for as long as it's had SRST support. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net>
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Øyvind Harboe authored
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- Oct 08, 2009
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David Brownell authored
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dbrownell authored
Also, talk about "mainline" not "trunk". The release.txt and release.sh files need more updates. git-svn-id: svn://svn.berlios.de/openocd/trunk@2825 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Oct 07, 2009
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dbrownell authored
It had a very little bit of content; move that to the more extensive chapter on config file guidelines, and give more current "ls" output to show the available library code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2820 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2819 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
- revert to previous default: don't talk JTAG during SRST - add "srst_nogates" flag, the converse of "srst_gates_jtag" - with no args, display the current configuration And update the User's Guide text with bullet lists to be a bit more clear. git-svn-id: svn://svn.berlios.de/openocd/trunk@2818 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
- The guess-rev.sh script is now a tweaked version of "setlocalversion" as seen in Linux, U-Boot, and various other projects. When it finds source control support (git, hg, svn) it uses IDs from there. Else (specific to this project) it reports itself as "-snapshot", e.g. from gitweb. I verified this new "guess-rev.sh" script runs under Cygwin. - Also update the generic version strings to be like "0.3.0-dev" (during development) instead of the very long "0.3.0-in-development". These also show up in the PDF docs. For better tracking, we might eventually change these strings to include the version IDs too. - Change the startup banner version strings so they include the guess-rev output. Development and release versions with GIT will be like Open On-Chip Debugger 0.3.0-dev-00282-g7191a4f-dirty (2009-10-05-20:57) Open On-Chip Debugger 0.3.0 (2009-10-05-20:57) instead of the previous SVN-specific (even when using git-svn!) Open On-Chip Debugger 0.3.0-in-development (2009-10-05-01:39) svn:exported Open On-Chip Debugger 0.3.0 (2009-10-05-01:39) Release git-svn-id: svn://svn.berlios.de/openocd/trunk@2809 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Oct 05, 2009
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dbrownell authored
The model is that this fires after scanchain verification, when it's safe to call "jtag tapenable $TAPNAME". So it will fire as part of non-error paths of "init" and "reset" command processing. However it will *NOT* trigger during "jtag_reset" processing, which skips all scan chain verification, or after verification errors. ALSO: - switch DaVinci chips to use this new mechanism - log TAP activation/deactivation, since their IDCODEs aren't verified - unify "enum jtag_event" scripted event notifications - remove duplicative JTAG_TAP_EVENT_POST_RESET git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Oct 02, 2009
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dbrownell authored
- ETB * report _actual_ hardware status, not just expected status * add a missing diagnostic on a potential ETB setup error * prefix any diagnostics with "ETB" - ETM * make "etm status" show ETM hardware status too, instead of just traceport status (which previously was fake, sigh) - Docs * flesh out "etm tracemode" docs a bit * clarify "etm status" ... previously it was traceport status * explain "etm trigger_percent" as a *traceport* option ETM+ETB tracing still isn't behaving, but now I can see that part of the reason is that the ETB turns itself off almost immediately after being enabled, and before collecting any data. git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 30, 2009
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zwelch authored
- Improve and clarify the wording of the introduction. - Add section on version taggging. - Some other minor corrections. git-svn-id: svn://svn.berlios.de/openocd/trunk@2788 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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zwelch authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2783 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 29, 2009
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dbrownell authored
- Commands were supposed to have been "arm11 memwrite ..." not "memwrite ..." - Get rid of obfuscatory macros - Re-alphabetize - Add docs for "arm11 vcr" git-svn-id: svn://svn.berlios.de/openocd/trunk@2776 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2775 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2774 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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oharboe authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2769 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 28, 2009
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oharboe authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2766 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 26, 2009
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dbrownell authored
Change the handling of the "-ircapture" and "-irmask" parameters to be slightly more sensible, given that the JTAG spec describes what is required, and that we already require that conformance in one place. IR scan returns some bitstring with LSBs "01". - First, provide and use default values that satisfy the IEEE spec. Existing TAP configs will override the defaults, but those parms are no longer required. - Second, warn if any TAP gets set up to violate the JTAG spec. It's likely a bug, but maybe not; else this should be an error. Improve the related diagnostics to say which TAP is affected. And associated minor fixes/cleanups to comments and diagnostics. git-svn-id: svn://svn.berlios.de/openocd/trunk@2758 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 23, 2009
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dbrownell authored
only expose the registers which are actually present. They could be missing for two basic reasons: - This version might not support them at all; e.g. ETMv1.1 doesn't have some control/status registers. (My sample of ARM9 boards shows all with ETMv1.3 support, FWIW.) - The configuration on this chip may not populate as many registers as possible; e.g. only two data value comparators instead of eight. Includes a bugfix in the "etm info" command: only one of the two registers is missing on older silicon, so show the first one before bailing. Update ETM usage docs to explain that those registers need to be written to configure what is traced, and that some ETM configs are not yet handled. Also, give some examples of the kinds of constrained trace which could be arranged. git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 22, 2009
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dbrownell authored
of a (NOR) flash chip: allow passing "last" as an alias for the number of the last sector. Improve several aspects of error checking while we're at it. From: Johnny Halfmoon <jhalfmoon@milksnot.com> git-svn-id: svn://svn.berlios.de/openocd/trunk@2746 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 21, 2009
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dbrownell authored
Highlight that the "post-reset" event kicks in before the scan chain is validated, which limits what can be done in a post-reset handler. git-svn-id: svn://svn.berlios.de/openocd/trunk@2745 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2744 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 20, 2009
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dbrownell authored
done on exit from the config stage, how JTAG clocking issues can trigger errors there, and how to avoid such problems. git-svn-id: svn://svn.berlios.de/openocd/trunk@2737 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 19, 2009
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dbrownell authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2729 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 17, 2009
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dbrownell authored
Erase logic: - command invocation + treat "nand erase N" (no offset/length) as "erase whole chip N" + catch a few more bogus parameter cases, like length == 0 (sigh) - nand_erase() should be static - on error + say which block failed, and if it was a bad block + don't give up after the first error; try to erase the rest - on success, say which nand device was erased (name isn't unique) Device list ("nand list"): - say how many blocks there are - split summary into two lines - give example in the docs Doc tweaks: - Use @option{...} for DaVinci's supported hardware ECC options For the record, I've observed that _sometimes_ erasing bad blocks causes failure reports, and that manufacturer bad block markers aren't always erasable (even when erasing their blocks doesn't trigger an error report). git-svn-id: svn://svn.berlios.de/openocd/trunk@2724 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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oharboe authored
srst_gates_jtag option. at91sam9260 needs retesting, and possibly srst_gates_jtag added to reset_config. Could i.MX27 be a case where srst does not pull trst, but really srst gates jtag clock? git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
- update comments to say so. - update docs to clarify that the "arm9tdmi" command prefix is a misnomer. - bugfix some messages that wrongly assume only ARM9TDMI based processors use this code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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dbrownell authored
JTAG clocking by gating the core clock, and workarounds. Most details are with the "halt" command, which is one of the first places this issue will be noticed. git-svn-id: svn://svn.berlios.de/openocd/trunk@2718 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 16, 2009
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oharboe authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 12, 2009
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oharboe authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2700 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 09, 2009
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oharboe authored
Fix docs on ARM11 MCR and MRC coprocessor commands: correct read-vs-write; and describe the params. (ARM920 and ARM926 have cp15-specific commands; this approach is more generic. MCR2, MRC2, MCRR, MCRR2, MRRC, and MRRC2 instructions could also get exposed.) git-svn-id: svn://svn.berlios.de/openocd/trunk@2679 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Sep 08, 2009
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oharboe authored
Provide an "armv7a disassemble" command. Current omissions include VFP (except as coprocessor instructions), Neon, and various Thumb2 opcodes that are not available in ARMv7-M processors. git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Aug 30, 2009
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oharboe authored
- Itemize the list of private customization examples for openocd.cfg - Add "override defaults" as a customization, specifically for the work area (back it up or relocate it) - Highlight some work area location issues git-svn-id: svn://svn.berlios.de/openocd/trunk@2651 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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oharboe authored
git-svn-id: svn://svn.berlios.de/openocd/trunk@2650 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Aug 25, 2009
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oharboe authored
For ARMv4/ARMv5: - better command parameter error checking - don't require an instruction count; default to one - recognize thumb function addresses - make function static - shorten some too-long lines For Cortex-M3: - don't require an instruction count; default to one With the relevant doc updates. --- Nyet done: invoke the thumb2 disassembler on v4/v5, to better handle branch instructions. git-svn-id: svn://svn.berlios.de/openocd/trunk@2624 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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