This patch simplifies how sentinel values are stored on the stack when
doing an unwind return or jump.  Instead of storing two values on the stack
for an unwind jump it now stores only one: a negative small integer means
unwind-return and a non-negative small integer means unwind-jump with the
value being the number of exceptions to unwind.  The savings in code size
are:

   bare-arm:   -56
minimal x86:   -68
   unix x64:   -80
unix nanbox:    -4
      stm32:   -56
     cc3200:   -64
    esp8266:   -76
      esp32:  -156

The array should be of type unsigned byte because that is the type of the
values being stored.  And changing to uint8_t helps to prevent warnings
from some static analysers.

For consistency with all of the other tests that are named builtin_XXX.py.

Note that the check for elem!=NULL is removed for the
MP_MAP_LOOKUP_ADD_IF_NOT_FOUND case because mp_map_lookup will always
return non-NULL for such a case.

The calls to rtc_init_start(), sdcard_init() and storage_init() are all
guarded by a check for first_soft_reset, so it's simpler to just put them
all before the soft-reset loop, without the check.

The call to machine_init() can also go before the soft-reset loop because
it is only needed to check the reset cause which can happen once at the
first boot.  To allow this to work, the reset cause must be set to SOFT
upon a soft-reset, which is the role of the new function machine_deinit().

To use the LSE bypass feature (where an external source provides the RTC
clock) a board must set the config variable MICROPY_HW_RTC_USE_BYPASS.

Upon boot the RTC early-init function should detect if LSE or LSI is
already selected/running and, if so, use it.  When the LSI has previously
(in the previous reset cycle) been selected as the clock source the only
way to reliably tell is if the RTCSEL bits of the RCC_BDCR are set to the
correct LSI value.  In particular the RCC_CSR bits for LSI control do not
indicate if the LSI is ready even if it is selected.

This patch removes the check on the RCC_CSR bits for the LSI being on and
ready and only uses the check on the RCC_BDCR to see if the LSI should be
used straightaway.  This was tested on a PYBLITEv1.0 and with the patch the
LSI persists correctly as the RTC source as long as the backup domain
remains powered.

Previously, if LSE is selected but fails and the RTC falls back to LSI,
then the rtc_info flags would incorrectly state that LSE is used.  This
patch fixes that by setting the bit in rtc_info only after the clock is
ready.

Also, change ValueError to TypeError if the argument to this function is
not of an SPI type.

There is an underlying hardware SPI driver (built on top of the STM HAL)
and then on top of this sits the legacy pyb.SPI class as well as the
machine.SPI class.  This patch improves the separation between these
layers, in particular decoupling machine.SPI from pyb.SPI.

This patch combines the compiler optimisation code for double and triple
tuple-to-tuple assignment, taking it from two separate if-blocks to one
combined if-block.  This can be done because the code for both of these
optimisations has a lot in common.  Combining them together reduces code
size for ports that have the triple-tuple optimisation enabled (and doesn't
change code size for ports that have it disabled).

The I2C sub-system is independent from the uPy state (eg the heap) and so
can safely persist across a soft reset.

The SPI sub-system is independent from the uPy state (eg the heap) and so
can safely persist across a soft reset.  And this is actually necessary for
drivers that rely on SPI and that also need to persist across soft reset
(eg external SPI flash memory).

It saves code size and RAM, and is more efficient to execute.

This patch adds support in the USBD configuration and CDC-MSC-HID class for
high-speed USB mode.  To enable it the board configuration must define
USE_USB_HS, and either not define USE_USB_HS_IN_FS, or be an STM32F723 or
STM32F733 MCU which have a built-in HS PHY.  High-speed mode is then
selected dynamically by passing "high_speed=True" to the pyb.usb_mode()
function, otherwise it defaults to full-speed mode.

This patch has been tested on an STM32F733.

By defining MICROPY_HW_USB_MAIN_DEV a given board can select to use either
USB_PHY_FS_ID or USB_PHY_HS_ID as the main USBD peripheral, on which the
REPL will appear.  If not defined this will be automatically configured.

Select this mode in boot.py via: pyb.usb_mode('MSC')

This will get the SDMMC clock up to 48MHz.

So that the IRQ can be used by other peripheral drivers if needed.

There's no need to have these as separate functions, they just take up
unnecessary code space and combining them allows to factor common code, and
also allows to support arbitrary string descriptor indices.

Using WFI allows the CPU to sleep while it is waiting, reducing power
consumption.

The routine waits for the DMA to finish, which is signalled from a DMA IRQ
handler.  Using WFI makes the CPU sleep while waiting for the IRQ to arrive
which decreases power consumption.  To make it work correctly the check for
the change in state must be atomic and so IRQs must be disabled during the
check.  The key feature of the Cortex MCU that makes this possible is that
WFI will exit when an IRQ arrives even if IRQs are disabled.

machine.SPI(0) results in ValueError on ESP8266.  SPI(1) is the user
hardware SPI port (or use SPI(-1) for software SPI).

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